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GET /api/patches/807366/?format=api
{ "id": 807366, "url": "http://patchwork.ozlabs.org/api/patches/807366/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170830002745.29526-2-bsingharora@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20170830002745.29526-2-bsingharora@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170830002745.29526-2-bsingharora@gmail.com/", "date": "2017-08-30T00:27:45", "name": "[2/2] powerpc/xmon: revisit SPR support", "commit_ref": "d1e1b351f50f9e5941f436f6c63949731979e00c", "pull_url": null, "state": "accepted", "archived": false, "hash": "bc84c81f41e5b6741dbdd99ff639845b2e99c3fa", "submitter": { "id": 9347, "url": "http://patchwork.ozlabs.org/api/people/9347/?format=api", "name": "Balbir Singh", "email": "bsingharora@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170830002745.29526-2-bsingharora@gmail.com/mbox/", "series": [ { "id": 509, "url": "http://patchwork.ozlabs.org/api/series/509/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=509", "date": "2017-08-30T00:27:44", "name": "[1/2] powerpc/xmon: hdec is now 64bits", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/509/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807366/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807366/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhmg91hDkz9s8w\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 30 Aug 2017 10:32:37 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xhmg90GtmzDqGV\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 30 Aug 2017 10:32:37 +1000 (AEST)", "from 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"X-Mailer": "git-send-email 2.9.4", "In-Reply-To": "<20170830002745.29526-1-bsingharora@gmail.com>", "References": "<20170830002745.29526-1-bsingharora@gmail.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "linuxppc-dev@lists.ozlabs.org", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "This patch readjusts the SPR's adds support for IAMR/AMR\nUAMOR/AMOR based on their supported ISA revisions.\n\nThere is also support for printing the PIDR/TIDR for\nISA 300 and PSSCR and PTCR in ISA 300 hypervisor mode.\nSPRN_PSSCR_PR is the privileged mode access and is used\nwhen we are not in hypervisor mode.\n\nSigned-off-by: Balbir Singh <bsingharora@gmail.com>\n---\n arch/powerpc/include/asm/reg.h | 1 +\n arch/powerpc/xmon/xmon.c | 34 ++++++++++++++++++++++++++++++----\n 2 files changed, 31 insertions(+), 4 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h\nindex c36823d..2c4366a 100644\n--- a/arch/powerpc/include/asm/reg.h\n+++ b/arch/powerpc/include/asm/reg.h\n@@ -356,6 +356,7 @@\n #define SPRN_PMSR\t0x355 /* Power Management Status Reg */\n #define SPRN_PMMAR\t0x356\t/* Power Management Memory Activity Register */\n #define SPRN_PSSCR\t0x357\t/* Processor Stop Status and Control Register (ISA 3.0) */\n+#define SPRN_PSSCR_PR\t0x337\t/* PSSCR ISA 3.0, privileged mode access */\n #define SPRN_PMCR\t0x374\t/* Power Management Control Register */\n \n /* HFSCR and FSCR bit numbers are the same */\ndiff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c\nindex 1b26d53..33351c6 100644\n--- a/arch/powerpc/xmon/xmon.c\n+++ b/arch/powerpc/xmon/xmon.c\n@@ -1743,18 +1743,20 @@ static void dump_206_sprs(void)\n \t\tmfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));\n \tprintf(\"dscr = %.16lx ppr = %.16lx pir = %.8x\\n\",\n \t\tmfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));\n+\tprintf(\"amr = %.16lx uamor = %.16lx\\n\",\n+\t\tmfspr(SPRN_AMR), mfspr(SPRN_UAMOR));\n \n \tif (!(mfmsr() & MSR_HV))\n \t\treturn;\n \n \tprintf(\"sdr1 = %.16lx hdar = %.16lx hdsisr = %.8x\\n\",\n \t\tmfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));\n-\tprintf(\"hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\\n\",\n+\tprintf(\"hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\\n\",\n \t\tmfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));\n-\tprintf(\"lpcr = %.16lx pcr = %.16lx lpidr = %.8x\\n\",\n+\tprintf(\"lpcr = %.16lx pcr = %.16lx lpidr = %.8x\\n\",\n \t\tmfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));\n-\tprintf(\"hsprg0 = %.16lx hsprg1 = %.16lx\\n\",\n-\t\tmfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1));\n+\tprintf(\"hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\\n\",\n+\t\tmfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));\n \tprintf(\"dabr = %.16lx dabrx = %.16lx\\n\",\n \t\tmfspr(SPRN_DABR), mfspr(SPRN_DABRX));\n #endif\n@@ -1793,6 +1795,7 @@ static void dump_207_sprs(void)\n \t\tmfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));\n \tprintf(\"ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\\n\",\n \t\tmfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));\n+\tprintf(\"iamr = %.16lx\\n\", mfspr(SPRN_IAMR));\n \n \tif (!(msr & MSR_HV))\n \t\treturn;\n@@ -1804,6 +1807,28 @@ static void dump_207_sprs(void)\n #endif\n }\n \n+static void dump_300_sprs(void)\n+{\n+#ifdef CONFIG_PPC64\n+\tbool hv = mfmsr() & MSR_HV;\n+\n+\tif (!cpu_has_feature(CPU_FTR_ARCH_300))\n+\t\treturn;\n+\n+\tprintf(\"pidr = %.16lx tidr = %.16lx\\n\",\n+\t\tmfspr(SPRN_PID), mfspr(SPRN_TIDR));\n+\tprintf(\"asdr = %.16lx psscr = %.16lx\\n\",\n+\t\tmfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)\n+\t\t\t\t\t: mfspr(SPRN_PSSCR_PR));\n+\n+\tif (!hv)\n+\t\treturn;\n+\n+\tprintf(\"ptcr = %.16lx\\n\",\n+\t\tmfspr(SPRN_PTCR));\n+#endif\n+}\n+\n static void dump_one_spr(int spr, bool show_unimplemented)\n {\n \tunsigned long val;\n@@ -1857,6 +1882,7 @@ static void super_regs(void)\n \n \t\tdump_206_sprs();\n \t\tdump_207_sprs();\n+\t\tdump_300_sprs();\n \n \t\treturn;\n \t}\n", "prefixes": [ "2/2" ] }