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GET /api/patches/807307/?format=api
{ "id": 807307, "url": "http://patchwork.ozlabs.org/api/patches/807307/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170829204934.9039-2-jsnow@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170829204934.9039-2-jsnow@redhat.com>", "list_archive_url": null, "date": "2017-08-29T20:49:26", "name": "[v2,1/9] IDE: replace DEBUG_IDE with tracing system", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "50fe283ff11833b3e1d7ba1c9d724bf8053f3fe5", "submitter": { "id": 64343, "url": "http://patchwork.ozlabs.org/api/people/64343/?format=api", "name": "John Snow", "email": "jsnow@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170829204934.9039-2-jsnow@redhat.com/mbox/", "series": [ { "id": 474, "url": "http://patchwork.ozlabs.org/api/series/474/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=474", "date": "2017-08-29T20:49:27", "name": "IDE: replace printfs with tracing", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/474/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807307/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807307/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ext-mx10.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com", "ext-mx10.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=jsnow@redhat.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhgt32HGkz9sMN\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 06:56:43 +1000 (AEST)", "from localhost ([::1]:46931 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dmnYv-0001L9-4P\n\tfor incoming@patchwork.ozlabs.org; Tue, 29 Aug 2017 16:56:41 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:50094)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <jsnow@redhat.com>) id 1dmnSG-0003cG-Rh\n\tfor qemu-devel@nongnu.org; Tue, 29 Aug 2017 16:49:51 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <jsnow@redhat.com>) id 1dmnSF-0001v2-4r\n\tfor qemu-devel@nongnu.org; Tue, 29 Aug 2017 16:49:48 -0400", "from mx1.redhat.com ([209.132.183.28]:57122)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <jsnow@redhat.com>)\n\tid 1dmnS9-0001r0-RJ; Tue, 29 Aug 2017 16:49:42 -0400", "from smtp.corp.redhat.com\n\t(int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id C75595F7B1;\n\tTue, 29 Aug 2017 20:49:40 +0000 (UTC)", "from probe.bos.redhat.com (dhcp-17-231.bos.redhat.com\n\t[10.18.17.231])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id CFE2A6268F;\n\tTue, 29 Aug 2017 20:49:39 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com C75595F7B1", "From": "John Snow <jsnow@redhat.com>", "To": "qemu-block@nongnu.org", "Date": "Tue, 29 Aug 2017 16:49:26 -0400", "Message-Id": "<20170829204934.9039-2-jsnow@redhat.com>", "In-Reply-To": "<20170829204934.9039-1-jsnow@redhat.com>", "References": "<20170829204934.9039-1-jsnow@redhat.com>", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.15", "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.39]);\n\tTue, 29 Aug 2017 20:49:40 +0000 (UTC)", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "209.132.183.28", "Subject": "[Qemu-devel] [PATCH v2 1/9] IDE: replace DEBUG_IDE with tracing\n\tsystem", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "John Snow <jsnow@redhat.com>, qemu-devel@nongnu.org, f4bug@amsat.org", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Remove the DEBUG_IDE preprocessor definition with something more\nappropriately flexible, using the trace-events subsystem.\n\nThis will be less prone to bitrot and will more effectively allow\nus to target just the functions we care about.\n\nSigned-off-by: John Snow <jsnow@redhat.com>\nReviewed-by: Eric Blake <eblake@redhat.com>\n---\n Makefile.objs | 1 +\n hw/ide/cmd646.c | 10 +++-----\n hw/ide/core.c | 65 +++++++++++++++++++----------------------------\n hw/ide/pci.c | 17 ++++---------\n hw/ide/piix.c | 11 ++++----\n hw/ide/trace-events | 35 +++++++++++++++++++++++++\n hw/ide/via.c | 10 +++-----\n include/hw/ide/internal.h | 1 -\n 8 files changed, 80 insertions(+), 70 deletions(-)\n create mode 100644 hw/ide/trace-events", "diff": "diff --git a/Makefile.objs b/Makefile.objs\nindex 24a4ea0..967c092 100644\n--- a/Makefile.objs\n+++ b/Makefile.objs\n@@ -153,6 +153,7 @@ trace-events-subdirs += hw/acpi\n trace-events-subdirs += hw/arm\n trace-events-subdirs += hw/alpha\n trace-events-subdirs += hw/xen\n+trace-events-subdirs += hw/ide\n trace-events-subdirs += ui\n trace-events-subdirs += audio\n trace-events-subdirs += net\ndiff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c\nindex 9ebb8d4..86b2a8f 100644\n--- a/hw/ide/cmd646.c\n+++ b/hw/ide/cmd646.c\n@@ -32,6 +32,7 @@\n #include \"sysemu/dma.h\"\n \n #include \"hw/ide/pci.h\"\n+#include \"trace.h\"\n \n /* CMD646 specific */\n #define CFR\t\t0x50\n@@ -195,9 +196,8 @@ static uint64_t bmdma_read(void *opaque, hwaddr addr,\n val = 0xff;\n break;\n }\n-#ifdef DEBUG_IDE\n- printf(\"bmdma: readb \" TARGET_FMT_plx \" : 0x%02x\\n\", addr, val);\n-#endif\n+\n+ trace_bmdma_read_cmd646(addr, val);\n return val;\n }\n \n@@ -211,9 +211,7 @@ static void bmdma_write(void *opaque, hwaddr addr,\n return;\n }\n \n-#ifdef DEBUG_IDE\n- printf(\"bmdma: writeb \" TARGET_FMT_plx \" : 0x%\" PRIx64 \"\\n\", addr, val);\n-#endif\n+ trace_bmdma_write_cmd646(addr, val);\n switch(addr & 3) {\n case 0:\n bmdma_cmd_writeb(bm, val);\ndiff --git a/hw/ide/core.c b/hw/ide/core.c\nindex bea3953..31fd593 100644\n--- a/hw/ide/core.c\n+++ b/hw/ide/core.c\n@@ -36,6 +36,7 @@\n #include \"qemu/cutils.h\"\n \n #include \"hw/ide/internal.h\"\n+#include \"trace.h\"\n \n /* These values were based on a Seagate ST3500418AS but have been modified\n to make more sense in QEMU */\n@@ -656,10 +657,7 @@ void ide_cancel_dma_sync(IDEState *s)\n * write requests) pending and we can avoid to drain. */\n QLIST_FOREACH(req, &s->buffered_requests, list) {\n if (!req->orphaned) {\n-#ifdef DEBUG_IDE\n- printf(\"%s: invoking cb %p of buffered request %p with\"\n- \" -ECANCELED\\n\", __func__, req->original_cb, req);\n-#endif\n+ trace_ide_cancel_dma_sync_buffered(req->original_cb, req);\n req->original_cb(req->original_opaque, -ECANCELED);\n }\n req->orphaned = true;\n@@ -678,9 +676,7 @@ void ide_cancel_dma_sync(IDEState *s)\n * aio operation with preadv/pwritev.\n */\n if (s->bus->dma->aiocb) {\n-#ifdef DEBUG_IDE\n- printf(\"%s: draining all remaining requests\", __func__);\n-#endif\n+ trace_ide_cancel_dma_sync_remaining();\n blk_drain(s->blk);\n assert(s->bus->dma->aiocb == NULL);\n }\n@@ -741,9 +737,7 @@ static void ide_sector_read(IDEState *s)\n n = s->req_nb_sectors;\n }\n \n-#if defined(DEBUG_IDE)\n- printf(\"sector=%\" PRId64 \"\\n\", sector_num);\n-#endif\n+ trace_ide_sector_read(sector_num, n);\n \n if (!ide_sect_range_ok(s, sector_num, n)) {\n ide_rw_error(s);\n@@ -1005,14 +999,14 @@ static void ide_sector_write(IDEState *s)\n \n s->status = READY_STAT | SEEK_STAT | BUSY_STAT;\n sector_num = ide_get_sector(s);\n-#if defined(DEBUG_IDE)\n- printf(\"sector=%\" PRId64 \"\\n\", sector_num);\n-#endif\n+\n n = s->nsector;\n if (n > s->req_nb_sectors) {\n n = s->req_nb_sectors;\n }\n \n+ trace_ide_sector_write(sector_num, n);\n+\n if (!ide_sect_range_ok(s, sector_num, n)) {\n ide_rw_error(s);\n block_acct_invalid(blk_get_stats(s->blk), BLOCK_ACCT_WRITE);\n@@ -1194,18 +1188,17 @@ static void ide_clear_hob(IDEBus *bus)\n void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)\n {\n IDEBus *bus = opaque;\n+ IDEState *s = idebus_active_if(bus);\n+ int reg_num = addr & 7;\n \n-#ifdef DEBUG_IDE\n- printf(\"IDE: write addr=0x%x val=0x%02x\\n\", addr, val);\n-#endif\n-\n- addr &= 7;\n+ trace_ide_ioport_write(addr, val, bus, s);\n \n /* ignore writes to command block while busy with previous command */\n- if (addr != 7 && (idebus_active_if(bus)->status & (BUSY_STAT|DRQ_STAT)))\n+ if (reg_num != 7 && (s->status & (BUSY_STAT|DRQ_STAT))) {\n return;\n+ }\n \n- switch(addr) {\n+ switch (reg_num) {\n case 0:\n break;\n case 1:\n@@ -1261,9 +1254,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)\n \n static void ide_reset(IDEState *s)\n {\n-#ifdef DEBUG_IDE\n- printf(\"ide: reset\\n\");\n-#endif\n+ trace_ide_reset(s);\n \n if (s->pio_aiocb) {\n blk_aio_cancel(s->pio_aiocb);\n@@ -2021,10 +2012,9 @@ void ide_exec_cmd(IDEBus *bus, uint32_t val)\n IDEState *s;\n bool complete;\n \n-#if defined(DEBUG_IDE)\n- printf(\"ide: CMD=%02x\\n\", val);\n-#endif\n s = idebus_active_if(bus);\n+ trace_ide_exec_cmd(bus, s, val);\n+\n /* ignore commands to non existent slave */\n if (s != bus->ifs && !s->blk) {\n return;\n@@ -2062,18 +2052,18 @@ void ide_exec_cmd(IDEBus *bus, uint32_t val)\n }\n }\n \n-uint32_t ide_ioport_read(void *opaque, uint32_t addr1)\n+uint32_t ide_ioport_read(void *opaque, uint32_t addr)\n {\n IDEBus *bus = opaque;\n IDEState *s = idebus_active_if(bus);\n- uint32_t addr;\n+ uint32_t reg_num;\n int ret, hob;\n \n- addr = addr1 & 7;\n+ reg_num = addr & 7;\n /* FIXME: HOB readback uses bit 7, but it's always set right now */\n //hob = s->select & (1 << 7);\n hob = 0;\n- switch(addr) {\n+ switch (reg_num) {\n case 0:\n ret = 0xff;\n break;\n@@ -2141,9 +2131,8 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr1)\n qemu_irq_lower(bus->irq);\n break;\n }\n-#ifdef DEBUG_IDE\n- printf(\"ide: read addr=0x%x val=%02x\\n\", addr1, ret);\n-#endif\n+\n+ trace_ide_ioport_read(addr, ret, bus, s);\n return ret;\n }\n \n@@ -2159,9 +2148,8 @@ uint32_t ide_status_read(void *opaque, uint32_t addr)\n } else {\n ret = s->status;\n }\n-#ifdef DEBUG_IDE\n- printf(\"ide: read status addr=0x%x val=%02x\\n\", addr, ret);\n-#endif\n+\n+ trace_ide_status_read(addr, ret, bus, s);\n return ret;\n }\n \n@@ -2171,9 +2159,8 @@ void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)\n IDEState *s;\n int i;\n \n-#ifdef DEBUG_IDE\n- printf(\"ide: write control addr=0x%x val=%02x\\n\", addr, val);\n-#endif\n+ trace_ide_cmd_write(addr, val, bus);\n+\n /* common for both drives */\n if (!(bus->cmd & IDE_CMD_RESET) &&\n (val & IDE_CMD_RESET)) {\ndiff --git a/hw/ide/pci.c b/hw/ide/pci.c\nindex 3cfb510..f2dcc0e 100644\n--- a/hw/ide/pci.c\n+++ b/hw/ide/pci.c\n@@ -31,6 +31,7 @@\n #include \"sysemu/dma.h\"\n #include \"qemu/error-report.h\"\n #include \"hw/ide/pci.h\"\n+#include \"trace.h\"\n \n #define BMDMA_PAGE_SIZE 4096\n \n@@ -196,9 +197,7 @@ static void bmdma_reset(IDEDMA *dma)\n {\n BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma);\n \n-#ifdef DEBUG_IDE\n- printf(\"ide: dma_reset\\n\");\n-#endif\n+ trace_bmdma_reset();\n bmdma_cancel(bm);\n bm->cmd = 0;\n bm->status = 0;\n@@ -227,9 +226,7 @@ static void bmdma_irq(void *opaque, int n, int level)\n \n void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val)\n {\n-#ifdef DEBUG_IDE\n- printf(\"%s: 0x%08x\\n\", __func__, val);\n-#endif\n+ trace_bmdma_cmd_writeb(val);\n \n /* Ignore writes to SSBM if it keeps the old value */\n if ((val & BM_CMD_START) != (bm->cmd & BM_CMD_START)) {\n@@ -258,9 +255,7 @@ static uint64_t bmdma_addr_read(void *opaque, hwaddr addr,\n uint64_t data;\n \n data = (bm->addr >> (addr * 8)) & mask;\n-#ifdef DEBUG_IDE\n- printf(\"%s: 0x%08x\\n\", __func__, (unsigned)data);\n-#endif\n+ trace_bmdma_addr_read(data);\n return data;\n }\n \n@@ -271,9 +266,7 @@ static void bmdma_addr_write(void *opaque, hwaddr addr,\n int shift = addr * 8;\n uint32_t mask = (1ULL << (width * 8)) - 1;\n \n-#ifdef DEBUG_IDE\n- printf(\"%s: 0x%08x\\n\", __func__, (unsigned)data);\n-#endif\n+ trace_bmdma_addr_write(data);\n bm->addr &= ~(mask << shift);\n bm->addr |= ((data & mask) << shift) & ~3;\n }\ndiff --git a/hw/ide/piix.c b/hw/ide/piix.c\nindex 7e2d767..dfb21f6 100644\n--- a/hw/ide/piix.c\n+++ b/hw/ide/piix.c\n@@ -33,6 +33,7 @@\n #include \"sysemu/dma.h\"\n \n #include \"hw/ide/pci.h\"\n+#include \"trace.h\"\n \n static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size)\n {\n@@ -54,9 +55,8 @@ static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size)\n val = 0xff;\n break;\n }\n-#ifdef DEBUG_IDE\n- printf(\"bmdma: readb 0x%02x : 0x%02x\\n\", (uint8_t)addr, val);\n-#endif\n+\n+ trace_bmdma_read(addr, val);\n return val;\n }\n \n@@ -69,9 +69,8 @@ static void bmdma_write(void *opaque, hwaddr addr,\n return;\n }\n \n-#ifdef DEBUG_IDE\n- printf(\"bmdma: writeb 0x%02x : 0x%02x\\n\", (uint8_t)addr, (uint8_t)val);\n-#endif\n+ trace_bmdma_write(addr, val);\n+\n switch(addr & 3) {\n case 0:\n bmdma_cmd_writeb(bm, val);\ndiff --git a/hw/ide/trace-events b/hw/ide/trace-events\nnew file mode 100644\nindex 0000000..b9792812\n--- /dev/null\n+++ b/hw/ide/trace-events\n@@ -0,0 +1,35 @@\n+# See docs/devel/tracing.txt for syntax documentation.\n+\n+# hw/ide/core.c\n+# portio\n+ide_ioport_read(uint32_t addr, uint32_t val, void *bus, void *s) \"IDE PIO rd @ 0x%\"PRIx32\"; val 0x%02\"PRIx32\"; bus %p IDEState %p\"\n+ide_ioport_write(uint32_t addr, uint32_t val, void *bus, void *s) \"IDE PIO wr @ 0x%\"PRIx32\"; val 0x%02\"PRIx32\"; bus %p IDEState %p\"\n+ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) \"IDE PIO rd @ 0x%\"PRIx32\" (Alt Status); val 0x%02\"PRIx32\"; bus %p; IDEState %p\"\n+ide_cmd_write(uint32_t addr, uint32_t val, void *bus) \"IDE PIO wr @ 0x%\"PRIx32\" (Device Control); val 0x%02\"PRIx32\"; bus %p\"\n+# misc\n+ide_exec_cmd(void *bus, void *state, uint32_t cmd) \"IDE exec cmd: bus %p; state %p; cmd 0x%02x\"\n+ide_cancel_dma_sync_buffered(void *fn, void *req) \"invoking cb %p of buffered request %p with -ECANCELED\"\n+ide_cancel_dma_sync_remaining(void) \"draining all remaining requests\"\n+ide_sector_read(int64_t sector_num, int nsectors) \"sector=%\"PRId64\" nsectors=%d\"\n+ide_sector_write(int64_t sector_num, int nsectors) \"sector=%\"PRId64\" nsectors=%d\"\n+ide_reset(void *s) \"IDEstate %p\"\n+\n+# BMDMA HBAs:\n+\n+# hw/ide/cmd646.c\n+bmdma_read_cmd646(uint64_t addr, uint32_t val) \"bmdma: readb 0x%\"PRIx64\" : 0x%02x\"\n+bmdma_write_cmd646(uint64_t addr, uint64_t val) \"bmdma: writeb 0x%\"PRIx64\" : 0x%02\"PRIx64\n+\n+# hw/ide/pci.c\n+bmdma_reset(void) \"\"\n+bmdma_cmd_writeb(uint32_t val) \"val: 0x%08x\"\n+bmdma_addr_read(uint64_t data) \"data: 0x%016\"PRIx64\n+bmdma_addr_write(uint64_t data) \"data: 0x%016\"PRIx64\n+\n+# hw/ide/piix.c\n+bmdma_read(uint64_t addr, uint8_t val) \"bmdma: readb 0x%\"PRIx64\" : 0x%02x\"\n+bmdma_write(uint64_t addr, uint64_t val) \"bmdma: writeb 0x%\"PRIx64\" : 0x%02\"PRIx64\n+\n+# hw/ide/via.c\n+bmdma_read_via(uint64_t addr, uint32_t val) \"bmdma: readb 0x%\"PRIx64\" : 0x%02x\"\n+bmdma_write_via(uint64_t addr, uint64_t val) \"bmdma: writeb 0x%\"PRIx64\" : 0x%02\"PRIx64\ndiff --git a/hw/ide/via.c b/hw/ide/via.c\nindex 5b32ecb..35c3059 100644\n--- a/hw/ide/via.c\n+++ b/hw/ide/via.c\n@@ -33,6 +33,7 @@\n #include \"sysemu/dma.h\"\n \n #include \"hw/ide/pci.h\"\n+#include \"trace.h\"\n \n static uint64_t bmdma_read(void *opaque, hwaddr addr,\n unsigned size)\n@@ -55,9 +56,8 @@ static uint64_t bmdma_read(void *opaque, hwaddr addr,\n val = 0xff;\n break;\n }\n-#ifdef DEBUG_IDE\n- printf(\"bmdma: readb 0x%02x : 0x%02x\\n\", addr, val);\n-#endif\n+\n+ trace_bmdma_read_via(addr, val);\n return val;\n }\n \n@@ -70,9 +70,7 @@ static void bmdma_write(void *opaque, hwaddr addr,\n return;\n }\n \n-#ifdef DEBUG_IDE\n- printf(\"bmdma: writeb 0x%02x : 0x%02x\\n\", addr, val);\n-#endif\n+ trace_bmdma_write_via(addr, val);\n switch (addr & 3) {\n case 0:\n bmdma_cmd_writeb(bm, val);\ndiff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h\nindex 482a951..4a92f0a 100644\n--- a/include/hw/ide/internal.h\n+++ b/include/hw/ide/internal.h\n@@ -14,7 +14,6 @@\n #include \"block/scsi.h\"\n \n /* debug IDE devices */\n-//#define DEBUG_IDE\n //#define DEBUG_IDE_ATAPI\n //#define DEBUG_AIO\n #define USE_DMA_CDROM\n", "prefixes": [ "v2", "1/9" ] }