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GET /api/patches/807271/?format=api
{ "id": 807271, "url": "http://patchwork.ozlabs.org/api/patches/807271/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170829201601.64312-6-sjg@chromium.org/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170829201601.64312-6-sjg@chromium.org>", "list_archive_url": null, "date": "2017-08-29T20:15:50", "name": "[U-Boot,v2,05/16] dtoc: Add support for 32 or 64-bit addresses", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "b36cd76cfbcd5ef14e130c06f2f9a54add735eb4", "submitter": { "id": 6170, "url": "http://patchwork.ozlabs.org/api/people/6170/?format=api", "name": "Simon Glass", "email": "sjg@chromium.org" }, "delegate": { "id": 3184, "url": "http://patchwork.ozlabs.org/api/users/3184/?format=api", "username": "sjg", "first_name": "Simon", "last_name": "Glass", "email": "sjg@chromium.org" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170829201601.64312-6-sjg@chromium.org/mbox/", "series": [ { "id": 462, "url": "http://patchwork.ozlabs.org/api/series/462/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=462", "date": "2017-08-29T20:15:45", "name": "dtoc: Add support for 64-bit addresses", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/462/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807271/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807271/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=google.com header.i=@google.com\n\theader.b=\"LKl9L3g2\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhg3l3q8Xz9t0F\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 06:20:03 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 10189C22455; Tue, 29 Aug 2017 20:16:57 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 2696DC22608;\n\tTue, 29 Aug 2017 20:16:26 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 5A39AC225F0; Tue, 29 Aug 2017 20:16:21 +0000 (UTC)", "from mail-oi0-f53.google.com (mail-oi0-f53.google.com\n\t[209.85.218.53])\n\tby lists.denx.de (Postfix) with ESMTPS id 2ED5CC21E1E\n\tfor <u-boot@lists.denx.de>; Tue, 29 Aug 2017 20:16:17 +0000 (UTC)", "by mail-oi0-f53.google.com with SMTP id t75so36448894oie.3\n\tfor <u-boot@lists.denx.de>; Tue, 29 Aug 2017 13:16:17 -0700 (PDT)", "from kiwi.bld.corp.google.com ([100.101.164.89])\n\tby smtp.gmail.com with ESMTPSA id\n\tm72sm3725309oig.3.2017.08.29.13.16.12\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 29 Aug 2017 13:16:13 -0700 (PDT)", "by kiwi.bld.corp.google.com (Postfix, from userid 121222)\n\tid E2DAA13FE6E; Tue, 29 Aug 2017 14:16:11 -0600 (MDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com;\n\ts=20161025; \n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=++6QufUtZnKDjRtm0pGbKVuebyaIVZ8cxEvgRPFjUi8=;\n\tb=LKl9L3g2Jcu/6kaR7fA6ryUfmA8hqpyIDnrGg/+5QmVC7tUHJP3wvFcGewndWEA4V2\n\taSHcKCtJPVRDza+sodDTQBCc1W7pmiTCreyqLnilsjMAEfVeQF/nS8IH/9OebxOeYvwL\n\txbB4Js1xjL8wLYD841KCsEVECTSbs3NJCRKZ7NiO8Ayc+2rpW7qASzvCIY0BneNXXeU/\n\tWedwAnMvDz4YdtoX5jd7FcGyKBJiTrRTCYxB/uSA0Vm9oUsvy/0QdrTXL6YBh8GYm13M\n\tCYmecMoJlhXDCBZh0LEcyAshorzPNkaOYzu35y4HWVk7lNDL+Ac5UfHL4LWrlbNGep0s\n\t2GYQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=++6QufUtZnKDjRtm0pGbKVuebyaIVZ8cxEvgRPFjUi8=;\n\tb=CRDPBslcuh+4q8xJCLBiXHyV+LhUlo33AyizUvL9FVzcF4lK5s+pcWyj+bQWPUlbaM\n\txGOnNaijlaqq8+G1WWIsjOgdC7RrXQypg6HQ+qd1AwKoxHYgspIH4YTiXCiMtQG0te0x\n\tKOes0py6WQ7DjIyQfix3vdlJ8TbDHgaHo6VGX5afbwGBs0q7JTD/F8dKYD9L9nApkZnn\n\tY17yfb8f6QusE713+gwdq126c9M+e4WH68GMbHF6464rTYMUxqg+WADr+/28Uo4/bkeC\n\tN55rGlOhcPn3+LRCgHdo+ZTrfw3sFzdBZJZVbOGezXtQZT3rBwRJkRZUrjhJVQLnQn9g\n\teDYQ==", "X-Gm-Message-State": "AHYfb5gfN+m+3fTfA49xhgzHTN6TrkBXf4qjFeidiTb2yk6LR8NoDwDb\n\tQKmKHAqavFdHSde2", "X-Google-Smtp-Source": "ADKCNb7JTphqrBO4RruU/uZwLcHYrxKBhcAlF+f46UuGBSHPdn4u51dPqz8YeURRfaa1NQr/VVbXDA==", "X-Received": "by 10.202.171.132 with SMTP id u126mr1605648oie.9.1504037775211; \n\tTue, 29 Aug 2017 13:16:15 -0700 (PDT)", "From": "Simon Glass <sjg@chromium.org>", "To": "U-Boot Mailing List <u-boot@lists.denx.de>", "Date": "Tue, 29 Aug 2017 14:15:50 -0600", "Message-Id": "<20170829201601.64312-6-sjg@chromium.org>", "X-Mailer": "git-send-email 2.14.1.342.g6490525c54-goog", "In-Reply-To": "<20170829201601.64312-1-sjg@chromium.org>", "References": "<20170829201601.64312-1-sjg@chromium.org>", "Cc": "Tom Rini <trini@konsulko.com>", "Subject": "[U-Boot] [PATCH v2 05/16] dtoc: Add support for 32 or 64-bit\n\taddresses", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "When using 32-bit addresses dtoc works correctly. For 64-bit addresses it\ndoes not since it ignores the #address-cells and #size-cells properties.\n\nUpdate the tool to use fdt64_t as the element type for reg properties when\neither the address or size is larger than one cell. Use the correct value\nso that C code can obtain the information from the device tree easily.\n\nAlos create a new type, fdt_val_t, which is defined to either fdt32_t or\nfdt64_t depending on the word size of the machine. This type corresponds\nto fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types\nsince they are defined to phys_addr_t and phys_size_t which use\n'unsigned long' in the 32-bit case, rather than 'unsigned int'.\n\nAdd tests for the four combinations of address and size values (32/32,\n64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368\nwhich now need to use the new fdt_val_t type.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\n\nSuggested-by: Heiko Stuebner <heiko@sntech.de>\nReported-by: Kever Yang <kever.yang@rock-chips.com>\n---\n\nChanges in v2:\n- Support 'reg' properties with a single cell (e.g. #size-cells = 0)\n- Introduce an fdt_val_t type which is either 32- or 64-bits long\n- Update rk3368 and rk3399 uses\n- Drop review tags since there are significant changes in this patch\n\n drivers/clk/rockchip/clk_rk3368.c | 2 +-\n drivers/clk/rockchip/clk_rk3399.c | 4 +-\n drivers/core/regmap.c | 2 +-\n include/fdtdec.h | 2 +\n include/regmap.h | 2 +-\n include/syscon.h | 6 +-\n tools/dtoc/dtb_platdata.py | 61 +++++++++++\n tools/dtoc/dtoc_test_addr32.dts | 27 +++++\n tools/dtoc/dtoc_test_addr32_64.dts | 33 ++++++\n tools/dtoc/dtoc_test_addr64.dts | 33 ++++++\n tools/dtoc/dtoc_test_addr64_32.dts | 33 ++++++\n tools/dtoc/fdt_util.py | 2 +\n tools/dtoc/test_dtoc.py | 212 +++++++++++++++++++++++++++++++++++++\n 13 files changed, 413 insertions(+), 6 deletions(-)\n create mode 100644 tools/dtoc/dtoc_test_addr32.dts\n create mode 100644 tools/dtoc/dtoc_test_addr32_64.dts\n create mode 100644 tools/dtoc/dtoc_test_addr64.dts\n create mode 100644 tools/dtoc/dtoc_test_addr64_32.dts", "diff": "diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c\nindex 2be1f572d7..0160d50c03 100644\n--- a/drivers/clk/rockchip/clk_rk3368.c\n+++ b/drivers/clk/rockchip/clk_rk3368.c\n@@ -471,7 +471,7 @@ static int rk3368_clk_probe(struct udevice *dev)\n #if CONFIG_IS_ENABLED(OF_PLATDATA)\n \tstruct rk3368_clk_plat *plat = dev_get_platdata(dev);\n \n-\tpriv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);\n+\tpriv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);\n #endif\n #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)\n \trkclk_init(priv->cru);\ndiff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c\nindex 3edafea140..0de3db620d 100644\n--- a/drivers/clk/rockchip/clk_rk3399.c\n+++ b/drivers/clk/rockchip/clk_rk3399.c\n@@ -963,7 +963,7 @@ static int rk3399_clk_probe(struct udevice *dev)\n #if CONFIG_IS_ENABLED(OF_PLATDATA)\n \tstruct rk3399_clk_plat *plat = dev_get_platdata(dev);\n \n-\tpriv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);\n+\tpriv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[0]);\n #endif\n \trkclk_init(priv->cru);\n #endif\n@@ -1145,7 +1145,7 @@ static int rk3399_pmuclk_probe(struct udevice *dev)\n #if CONFIG_IS_ENABLED(OF_PLATDATA)\n \tstruct rk3399_pmuclk_plat *plat = dev_get_platdata(dev);\n \n-\tpriv->pmucru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);\n+\tpriv->pmucru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);\n #endif\n \n #ifndef CONFIG_SPL_BUILD\ndiff --git a/drivers/core/regmap.c b/drivers/core/regmap.c\nindex d4e16a27ef..0f1d30820c 100644\n--- a/drivers/core/regmap.c\n+++ b/drivers/core/regmap.c\n@@ -40,7 +40,7 @@ static struct regmap *regmap_alloc_count(int count)\n }\n \n #if CONFIG_IS_ENABLED(OF_PLATDATA)\n-int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,\n+int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,\n \t\t\t struct regmap **mapp)\n {\n \tstruct regmap_range *range;\ndiff --git a/include/fdtdec.h b/include/fdtdec.h\nindex 4a0947c626..1ba02be8e1 100644\n--- a/include/fdtdec.h\n+++ b/include/fdtdec.h\n@@ -27,10 +27,12 @@ typedef phys_size_t fdt_size_t;\n #define FDT_ADDR_T_NONE (-1ULL)\n #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)\n #define fdt_size_to_cpu(reg) be64_to_cpu(reg)\n+typedef fdt64_t fdt_val_t;\n #else\n #define FDT_ADDR_T_NONE (-1U)\n #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)\n #define fdt_size_to_cpu(reg) be32_to_cpu(reg)\n+typedef fdt32_t fdt_val_t;\n #endif\n \n /* Information obtained about memory from the FDT */\ndiff --git a/include/regmap.h b/include/regmap.h\nindex 1eed94e47a..493a5d8eff 100644\n--- a/include/regmap.h\n+++ b/include/regmap.h\n@@ -69,7 +69,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp);\n * @count:\tNumber of pairs (e.g. 1 if the regmap has a single entry)\n * @mapp:\tReturns allocated map\n */\n-int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,\n+int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,\n \t\t\t struct regmap **mapp);\n \n /**\ndiff --git a/include/syscon.h b/include/syscon.h\nindex 34842aa470..5d52b1cc3c 100644\n--- a/include/syscon.h\n+++ b/include/syscon.h\n@@ -8,6 +8,8 @@\n #ifndef __SYSCON_H\n #define __SYSCON_H\n \n+#include <fdtdec.h>\n+\n /**\n * struct syscon_uc_info - Information stored by the syscon UCLASS_UCLASS\n *\n@@ -28,9 +30,11 @@ struct syscon_ops {\n * We don't support 64-bit machines. If they are so resource-contrained that\n * they need to use OF_PLATDATA, something is horribly wrong with the\n * education of our hardware engineers.\n+ *\n+ * Update: 64-bit is now supported and we have an education crisis.\n */\n struct syscon_base_platdata {\n-\tu32 reg[2];\n+\tfdt_val_t reg[2];\n };\n #endif\n \ndiff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py\nindex 3243bccfe8..0c719310b1 100644\n--- a/tools/dtoc/dtb_platdata.py\n+++ b/tools/dtoc/dtb_platdata.py\n@@ -242,6 +242,66 @@ class DtbPlatdata(object):\n self._valid_nodes = []\n return self.scan_node(self._fdt.GetRoot())\n \n+ @staticmethod\n+ def get_num_cells(node):\n+ \"\"\"Get the number of cells in addresses and sizes for this node\n+\n+ Args:\n+ node: Node to check\n+\n+ Returns:\n+ Tuple:\n+ Number of address cells for this node\n+ Number of size cells for this node\n+ \"\"\"\n+ parent = node.parent\n+ na, ns = 2, 2\n+ if parent:\n+ na_prop = parent.props.get('#address-cells')\n+ ns_prop = parent.props.get('#size-cells')\n+ if na_prop:\n+ na = fdt_util.fdt32_to_cpu(na_prop.value)\n+ if ns_prop:\n+ ns = fdt_util.fdt32_to_cpu(ns_prop.value)\n+ return na, ns\n+\n+ def scan_reg_sizes(self):\n+ \"\"\"Scan for 64-bit 'reg' properties and update the values\n+\n+ This finds 'reg' properties with 64-bit data and converts the value to\n+ an array of 64-values. This allows it to be output in a way that the\n+ C code can read.\n+ \"\"\"\n+ for node in self._valid_nodes:\n+ reg = node.props.get('reg')\n+ if not reg:\n+ continue\n+ na, ns = self.get_num_cells(node)\n+ total = na + ns\n+\n+ if reg.type != fdt.TYPE_INT:\n+ raise ValueError(\"Node '%s' reg property is not an int\")\n+ if len(reg.value) % total:\n+ raise ValueError(\"Node '%s' reg property has %d cells \"\n+ 'which is not a multiple of na + ns = %d + %d)' %\n+ (node.name, len(reg.value), na, ns))\n+ reg.na = na\n+ reg.ns = ns\n+ if na != 1 or ns != 1:\n+ reg.type = fdt.TYPE_INT64\n+ i = 0\n+ new_value = []\n+ val = reg.value\n+ if not isinstance(val, list):\n+ val = [val]\n+ while i < len(val):\n+ addr = fdt_util.fdt_cells_to_cpu(val[i:], reg.na)\n+ i += na\n+ size = fdt_util.fdt_cells_to_cpu(val[i:], reg.ns)\n+ i += ns\n+ new_value += [addr, size]\n+ reg.value = new_value\n+\n def scan_structs(self):\n \"\"\"Scan the device tree building up the C structures we will use.\n \n@@ -450,6 +510,7 @@ def run_steps(args, dtb_file, include_disabled, output):\n plat = DtbPlatdata(dtb_file, include_disabled)\n plat.scan_dtb()\n plat.scan_tree()\n+ plat.scan_reg_sizes()\n plat.setup_output(output)\n structs = plat.scan_structs()\n plat.scan_phandles()\ndiff --git a/tools/dtoc/dtoc_test_addr32.dts b/tools/dtoc/dtoc_test_addr32.dts\nnew file mode 100644\nindex 0000000000..bcfdcae10b\n--- /dev/null\n+++ b/tools/dtoc/dtoc_test_addr32.dts\n@@ -0,0 +1,27 @@\n+/*\n+ * Test device tree file for dtoc\n+ *\n+ * Copyright 2017 Google, Inc\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+ /dts-v1/;\n+\n+/ {\n+\t#address-cells = <1>;\n+\t#size-cells = <1>;\n+\n+\ttest1 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test1\";\n+\t\treg = <0x1234 0x5678>;\n+\t};\n+\n+\ttest2 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test2\";\n+\t\treg = <0x12345678 0x98765432 2 3>;\n+\t};\n+\n+};\ndiff --git a/tools/dtoc/dtoc_test_addr32_64.dts b/tools/dtoc/dtoc_test_addr32_64.dts\nnew file mode 100644\nindex 0000000000..1c96243310\n--- /dev/null\n+++ b/tools/dtoc/dtoc_test_addr32_64.dts\n@@ -0,0 +1,33 @@\n+/*\n+ * Test device tree file for dtoc\n+ *\n+ * Copyright 2017 Google, Inc\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+ /dts-v1/;\n+\n+/ {\n+\t#address-cells = <1>;\n+\t#size-cells = <2>;\n+\n+\ttest1 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test1\";\n+\t\treg = <0x1234 0x5678 0x0>;\n+\t};\n+\n+\ttest2 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test2\";\n+\t\treg = <0x12345678 0x98765432 0x10987654>;\n+\t};\n+\n+\ttest3 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test3\";\n+\t\treg = <0x12345678 0x98765432 0x10987654 2 0 3>;\n+\t};\n+\n+};\ndiff --git a/tools/dtoc/dtoc_test_addr64.dts b/tools/dtoc/dtoc_test_addr64.dts\nnew file mode 100644\nindex 0000000000..4c0ad0ec36\n--- /dev/null\n+++ b/tools/dtoc/dtoc_test_addr64.dts\n@@ -0,0 +1,33 @@\n+/*\n+ * Test device tree file for dtoc\n+ *\n+ * Copyright 2017 Google, Inc\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+ /dts-v1/;\n+\n+/ {\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\n+\ttest1 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test1\";\n+\t\treg = /bits/ 64 <0x1234 0x5678>;\n+\t};\n+\n+\ttest2 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test2\";\n+\t\treg = /bits/ 64 <0x1234567890123456 0x9876543210987654>;\n+\t};\n+\n+\ttest3 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test3\";\n+\t\treg = /bits/ 64 <0x1234567890123456 0x9876543210987654 2 3>;\n+\t};\n+\n+};\ndiff --git a/tools/dtoc/dtoc_test_addr64_32.dts b/tools/dtoc/dtoc_test_addr64_32.dts\nnew file mode 100644\nindex 0000000000..c36f6b726e\n--- /dev/null\n+++ b/tools/dtoc/dtoc_test_addr64_32.dts\n@@ -0,0 +1,33 @@\n+/*\n+ * Test device tree file for dtoc\n+ *\n+ * Copyright 2017 Google, Inc\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+ /dts-v1/;\n+\n+/ {\n+\t#address-cells = <2>;\n+\t#size-cells = <1>;\n+\n+\ttest1 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test1\";\n+\t\treg = <0x1234 0x0 0x5678>;\n+\t};\n+\n+\ttest2 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test2\";\n+\t\treg = <0x12345678 0x90123456 0x98765432>;\n+\t};\n+\n+\ttest3 {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tcompatible = \"test3\";\n+\t\treg = <0x12345678 0x90123456 0x98765432 0 2 3>;\n+\t};\n+\n+};\ndiff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py\nindex bec6ee947a..338d47a5e1 100644\n--- a/tools/dtoc/fdt_util.py\n+++ b/tools/dtoc/fdt_util.py\n@@ -38,6 +38,8 @@ def fdt_cells_to_cpu(val, cells):\n Return:\n A native-endian long value\n \"\"\"\n+ if not cells:\n+ return 0\n out = long(fdt32_to_cpu(val[0]))\n if cells == 2:\n out = out << 32 | fdt32_to_cpu(val[1])\ndiff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py\nindex 5040f23325..09cfddaaaa 100644\n--- a/tools/dtoc/test_dtoc.py\n+++ b/tools/dtoc/test_dtoc.py\n@@ -270,4 +270,216 @@ U_BOOT_DEVICE(spl_test) = {\n \\t.platdata_size\\t= sizeof(dtv_spl_test),\n };\n \n+''', data)\n+\n+ def test_addresses64(self):\n+ \"\"\"Test output from a node with a 'reg' property with na=2, ns=2\"\"\"\n+ dtb_file = get_dtb_file('dtoc_test_addr64.dts')\n+ output = tools.GetOutputFilename('output')\n+ dtb_platdata.run_steps(['struct'], dtb_file, False, output)\n+ with open(output) as infile:\n+ data = infile.read()\n+ self.assertEqual('''#include <stdbool.h>\n+#include <libfdt.h>\n+struct dtd_test1 {\n+\\tfdt64_t\\t\\treg[2];\n+};\n+struct dtd_test2 {\n+\\tfdt64_t\\t\\treg[2];\n+};\n+struct dtd_test3 {\n+\\tfdt64_t\\t\\treg[4];\n+};\n+''', data)\n+\n+ dtb_platdata.run_steps(['platdata'], dtb_file, False, output)\n+ with open(output) as infile:\n+ data = infile.read()\n+ self.assertEqual('''#include <common.h>\n+#include <dm.h>\n+#include <dt-structs.h>\n+\n+static struct dtd_test1 dtv_test1 = {\n+\\t.reg\\t\\t\\t= {0x1234, 0x5678},\n+};\n+U_BOOT_DEVICE(test1) = {\n+\\t.name\\t\\t= \"test1\",\n+\\t.platdata\\t= &dtv_test1,\n+\\t.platdata_size\\t= sizeof(dtv_test1),\n+};\n+\n+static struct dtd_test2 dtv_test2 = {\n+\\t.reg\\t\\t\\t= {0x1234567890123456, 0x9876543210987654},\n+};\n+U_BOOT_DEVICE(test2) = {\n+\\t.name\\t\\t= \"test2\",\n+\\t.platdata\\t= &dtv_test2,\n+\\t.platdata_size\\t= sizeof(dtv_test2),\n+};\n+\n+static struct dtd_test3 dtv_test3 = {\n+\\t.reg\\t\\t\\t= {0x1234567890123456, 0x9876543210987654, 0x2, 0x3},\n+};\n+U_BOOT_DEVICE(test3) = {\n+\\t.name\\t\\t= \"test3\",\n+\\t.platdata\\t= &dtv_test3,\n+\\t.platdata_size\\t= sizeof(dtv_test3),\n+};\n+\n+''', data)\n+\n+ def test_addresses32(self):\n+ \"\"\"Test output from a node with a 'reg' property with na=1, ns=1\"\"\"\n+ dtb_file = get_dtb_file('dtoc_test_addr32.dts')\n+ output = tools.GetOutputFilename('output')\n+ dtb_platdata.run_steps(['struct'], dtb_file, False, output)\n+ with open(output) as infile:\n+ data = infile.read()\n+ self.assertEqual('''#include <stdbool.h>\n+#include <libfdt.h>\n+struct dtd_test1 {\n+\\tfdt32_t\\t\\treg[2];\n+};\n+struct dtd_test2 {\n+\\tfdt32_t\\t\\treg[4];\n+};\n+''', data)\n+\n+ dtb_platdata.run_steps(['platdata'], dtb_file, False, output)\n+ with open(output) as infile:\n+ data = infile.read()\n+ self.assertEqual('''#include <common.h>\n+#include <dm.h>\n+#include <dt-structs.h>\n+\n+static struct dtd_test1 dtv_test1 = {\n+\\t.reg\\t\\t\\t= {0x1234, 0x5678},\n+};\n+U_BOOT_DEVICE(test1) = {\n+\\t.name\\t\\t= \"test1\",\n+\\t.platdata\\t= &dtv_test1,\n+\\t.platdata_size\\t= sizeof(dtv_test1),\n+};\n+\n+static struct dtd_test2 dtv_test2 = {\n+\\t.reg\\t\\t\\t= {0x12345678, 0x98765432, 0x2, 0x3},\n+};\n+U_BOOT_DEVICE(test2) = {\n+\\t.name\\t\\t= \"test2\",\n+\\t.platdata\\t= &dtv_test2,\n+\\t.platdata_size\\t= sizeof(dtv_test2),\n+};\n+\n+''', data)\n+\n+ def test_addresses64_32(self):\n+ \"\"\"Test output from a node with a 'reg' property with na=2, ns=1\"\"\"\n+ dtb_file = get_dtb_file('dtoc_test_addr64_32.dts')\n+ output = tools.GetOutputFilename('output')\n+ dtb_platdata.run_steps(['struct'], dtb_file, False, output)\n+ with open(output) as infile:\n+ data = infile.read()\n+ self.assertEqual('''#include <stdbool.h>\n+#include <libfdt.h>\n+struct dtd_test1 {\n+\\tfdt64_t\\t\\treg[2];\n+};\n+struct dtd_test2 {\n+\\tfdt64_t\\t\\treg[2];\n+};\n+struct dtd_test3 {\n+\\tfdt64_t\\t\\treg[4];\n+};\n+''', data)\n+\n+ dtb_platdata.run_steps(['platdata'], dtb_file, False, output)\n+ with open(output) as infile:\n+ data = infile.read()\n+ self.assertEqual('''#include <common.h>\n+#include <dm.h>\n+#include <dt-structs.h>\n+\n+static struct dtd_test1 dtv_test1 = {\n+\\t.reg\\t\\t\\t= {0x123400000000, 0x5678},\n+};\n+U_BOOT_DEVICE(test1) = {\n+\\t.name\\t\\t= \"test1\",\n+\\t.platdata\\t= &dtv_test1,\n+\\t.platdata_size\\t= sizeof(dtv_test1),\n+};\n+\n+static struct dtd_test2 dtv_test2 = {\n+\\t.reg\\t\\t\\t= {0x1234567890123456, 0x98765432},\n+};\n+U_BOOT_DEVICE(test2) = {\n+\\t.name\\t\\t= \"test2\",\n+\\t.platdata\\t= &dtv_test2,\n+\\t.platdata_size\\t= sizeof(dtv_test2),\n+};\n+\n+static struct dtd_test3 dtv_test3 = {\n+\\t.reg\\t\\t\\t= {0x1234567890123456, 0x98765432, 0x2, 0x3},\n+};\n+U_BOOT_DEVICE(test3) = {\n+\\t.name\\t\\t= \"test3\",\n+\\t.platdata\\t= &dtv_test3,\n+\\t.platdata_size\\t= sizeof(dtv_test3),\n+};\n+\n+''', data)\n+\n+ def test_addresses32_64(self):\n+ \"\"\"Test output from a node with a 'reg' property with na=1, ns=2\"\"\"\n+ dtb_file = get_dtb_file('dtoc_test_addr32_64.dts')\n+ output = tools.GetOutputFilename('output')\n+ dtb_platdata.run_steps(['struct'], dtb_file, False, output)\n+ with open(output) as infile:\n+ data = infile.read()\n+ self.assertEqual('''#include <stdbool.h>\n+#include <libfdt.h>\n+struct dtd_test1 {\n+\\tfdt64_t\\t\\treg[2];\n+};\n+struct dtd_test2 {\n+\\tfdt64_t\\t\\treg[2];\n+};\n+struct dtd_test3 {\n+\\tfdt64_t\\t\\treg[4];\n+};\n+''', data)\n+\n+ dtb_platdata.run_steps(['platdata'], dtb_file, False, output)\n+ with open(output) as infile:\n+ data = infile.read()\n+ self.assertEqual('''#include <common.h>\n+#include <dm.h>\n+#include <dt-structs.h>\n+\n+static struct dtd_test1 dtv_test1 = {\n+\\t.reg\\t\\t\\t= {0x1234, 0x567800000000},\n+};\n+U_BOOT_DEVICE(test1) = {\n+\\t.name\\t\\t= \"test1\",\n+\\t.platdata\\t= &dtv_test1,\n+\\t.platdata_size\\t= sizeof(dtv_test1),\n+};\n+\n+static struct dtd_test2 dtv_test2 = {\n+\\t.reg\\t\\t\\t= {0x12345678, 0x9876543210987654},\n+};\n+U_BOOT_DEVICE(test2) = {\n+\\t.name\\t\\t= \"test2\",\n+\\t.platdata\\t= &dtv_test2,\n+\\t.platdata_size\\t= sizeof(dtv_test2),\n+};\n+\n+static struct dtd_test3 dtv_test3 = {\n+\\t.reg\\t\\t\\t= {0x12345678, 0x9876543210987654, 0x2, 0x3},\n+};\n+U_BOOT_DEVICE(test3) = {\n+\\t.name\\t\\t= \"test3\",\n+\\t.platdata\\t= &dtv_test3,\n+\\t.platdata_size\\t= sizeof(dtv_test3),\n+};\n+\n ''', data)\n", "prefixes": [ "U-Boot", "v2", "05/16" ] }