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GET /api/patches/807037/?format=api
{ "id": 807037, "url": "http://patchwork.ozlabs.org/api/patches/807037/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1504003561-6290-9-git-send-email-tien.fong.chee@intel.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504003561-6290-9-git-send-email-tien.fong.chee@intel.com>", "list_archive_url": null, "date": "2017-08-29T10:45:50", "name": "[U-Boot,08/19] arm: socfpga: Add COMPAT macro for Network on Chip(NoC)", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "9b8f20e26fa197a76beea1f8f0fbb42b695af262", "submitter": { "id": 70549, "url": "http://patchwork.ozlabs.org/api/people/70549/?format=api", "name": "Chee, Tien Fong", "email": "tien.fong.chee@intel.com" }, "delegate": { "id": 1699, "url": "http://patchwork.ozlabs.org/api/users/1699/?format=api", "username": "marex", "first_name": "Marek", "last_name": "Vasut", "email": "marek.vasut@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1504003561-6290-9-git-send-email-tien.fong.chee@intel.com/mbox/", "series": [ { "id": 345, "url": "http://patchwork.ozlabs.org/api/series/345/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=345", "date": "2017-08-29T10:45:42", "name": "Add FPGA, SDRAM drivers and booting to U-boot", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/345/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807037/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807037/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhQTf02v9z9t5g\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 20:52:28 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 590C1C21D95; Tue, 29 Aug 2017 10:47:18 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 75A76C21F72;\n\tTue, 29 Aug 2017 10:47:16 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 02A94C21D95; Tue, 29 Aug 2017 10:46:29 +0000 (UTC)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby lists.denx.de (Postfix) with ESMTPS id D33D6C21D95\n\tfor <u-boot@lists.denx.de>; Tue, 29 Aug 2017 10:46:25 +0000 (UTC)", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Aug 2017 03:46:25 -0700", "from tfchee-mobl.gar.corp.intel.com (HELO tienfong.fm.intel.com,\n\t) ([10.226.242.65])\n\tby orsmga005.jf.intel.com with ESMTP; 29 Aug 2017 03:46:23 -0700" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.41,444,1498546800\"; d=\"scan'208\";a=\"143176637\"", "From": "tien.fong.chee@intel.com", "To": "u-boot@lists.denx.de", "Date": "Tue, 29 Aug 2017 18:45:50 +0800", "Message-Id": "<1504003561-6290-9-git-send-email-tien.fong.chee@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1504003561-6290-1-git-send-email-tien.fong.chee@intel.com>", "References": "<1504003561-6290-1-git-send-email-tien.fong.chee@intel.com>", "Cc": "Marek Vasut <marex@denx.de>, Tien Fong Chee <tien.fong.chee@intel.com>, \n\tChing Liang See <chin.liang.see@intel.com>,\n\tTien Fong <skywindctf@gmail.com>, \n\tWestergteen Dalon <dalon.westergreen@intel.com>", "Subject": "[U-Boot] [PATCH 08/19] arm: socfpga: Add COMPAT macro for Network\n\ton Chip(NoC)", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Tien Fong Chee <tien.fong.chee@intel.com>\n\nThis is required by DDR to configure NoC firewall setting based on DTS.\nThe NoC firewall is used to control any data transaction between IP\ninterfacing with DDR.\n\nSigned-off-by: Tien Fong Chee <tien.fong.chee@intel.com>\n---\n include/fdtdec.h | 1 +\n lib/fdtdec.c | 1 +\n 2 files changed, 2 insertions(+), 0 deletions(-)", "diff": "diff --git a/include/fdtdec.h b/include/fdtdec.h\nindex eda2ffa..4243532 100644\n--- a/include/fdtdec.h\n+++ b/include/fdtdec.h\n@@ -163,6 +163,7 @@ enum fdt_compat_id {\n \tCOMPAT_ALTERA_SOCFPGA_F2SDR0, /* SoCFPGA fpga2SDRAM0 bridge */\n \tCOMPAT_ALTERA_SOCFPGA_F2SDR1, /* SoCFPGA fpga2SDRAM1 bridge */\n \tCOMPAT_ALTERA_SOCFPGA_F2SDR2, /* SoCFPGA fpga2SDRAM2 bridge */\n+\tCOMPAT_ALTERA_SOCFPGA_NOC, \t/* Arria10 NOC */\n \n \tCOMPAT_COUNT,\n };\ndiff --git a/lib/fdtdec.c b/lib/fdtdec.c\nindex fbb48bf..c6586f0 100644\n--- a/lib/fdtdec.c\n+++ b/lib/fdtdec.c\n@@ -76,6 +76,7 @@ static const char * const compat_names[COMPAT_COUNT] = {\n \tCOMPAT(ALTERA_SOCFPGA_F2SDR0, \"altr,socfpga-fpga2sdram0-bridge\"),\n \tCOMPAT(ALTERA_SOCFPGA_F2SDR1, \"altr,socfpga-fpga2sdram1-bridge\"),\n \tCOMPAT(ALTERA_SOCFPGA_F2SDR2, \"altr,socfpga-fpga2sdram2-bridge\"),\n+\tCOMPAT(ALTERA_SOCFPGA_NOC, \"altr,socfpga-a10-noc\"),\n };\n \n const char *fdtdec_get_compatible(enum fdt_compat_id id)\n", "prefixes": [ "U-Boot", "08/19" ] }