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GET /api/patches/807036/?format=api
{ "id": 807036, "url": "http://patchwork.ozlabs.org/api/patches/807036/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1504003561-6290-6-git-send-email-tien.fong.chee@intel.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504003561-6290-6-git-send-email-tien.fong.chee@intel.com>", "list_archive_url": null, "date": "2017-08-29T10:45:47", "name": "[U-Boot,05/19] arm: socfpga: Enhance FPGA program support with at least 4 byte data", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "3b891deb945b761754500f708595ab66a25adc27", "submitter": { "id": 70549, "url": "http://patchwork.ozlabs.org/api/people/70549/?format=api", "name": "Chee, Tien Fong", "email": "tien.fong.chee@intel.com" }, "delegate": { "id": 1699, "url": "http://patchwork.ozlabs.org/api/users/1699/?format=api", "username": "marex", "first_name": "Marek", "last_name": "Vasut", "email": "marek.vasut@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1504003561-6290-6-git-send-email-tien.fong.chee@intel.com/mbox/", "series": [ { "id": 345, "url": "http://patchwork.ozlabs.org/api/series/345/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=345", "date": "2017-08-29T10:45:42", "name": "Add FPGA, SDRAM drivers and booting to U-boot", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/345/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807036/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807036/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhQTd1p3jz9t3J\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 20:52:24 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 478E2C21F01; Tue, 29 Aug 2017 10:49:35 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 8C961C21F7A;\n\tTue, 29 Aug 2017 10:48:54 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 7B620C21D95; Tue, 29 Aug 2017 10:46:24 +0000 (UTC)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby lists.denx.de (Postfix) with ESMTPS id CF01CC21F7A\n\tfor <u-boot@lists.denx.de>; Tue, 29 Aug 2017 10:46:18 +0000 (UTC)", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Aug 2017 03:46:18 -0700", "from tfchee-mobl.gar.corp.intel.com (HELO tienfong.fm.intel.com,\n\t) ([10.226.242.65])\n\tby orsmga005.jf.intel.com with ESMTP; 29 Aug 2017 03:46:16 -0700" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.41,444,1498546800\"; d=\"scan'208\";a=\"143176605\"", "From": "tien.fong.chee@intel.com", "To": "u-boot@lists.denx.de", "Date": "Tue, 29 Aug 2017 18:45:47 +0800", "Message-Id": "<1504003561-6290-6-git-send-email-tien.fong.chee@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1504003561-6290-1-git-send-email-tien.fong.chee@intel.com>", "References": "<1504003561-6290-1-git-send-email-tien.fong.chee@intel.com>", "Cc": "Marek Vasut <marex@denx.de>, Tien Fong Chee <tien.fong.chee@intel.com>, \n\tChing Liang See <chin.liang.see@intel.com>,\n\tTien Fong <skywindctf@gmail.com>, \n\tWestergteen Dalon <dalon.westergreen@intel.com>", "Subject": "[U-Boot] [PATCH 05/19] arm: socfpga: Enhance FPGA program support\n\twith at least 4 byte data", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Tien Fong Chee <tien.fong.chee@intel.com>\n\nThis patch enables FPGA program with minimum 4 byte data size.\n\nSigned-off-by: Tien Fong Chee <tien.fong.chee@intel.com>\n---\n drivers/fpga/socfpga.c | 14 ++++++++------\n 1 files changed, 8 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c\nindex 28fa16b..6e14ebd 100644\n--- a/drivers/fpga/socfpga.c\n+++ b/drivers/fpga/socfpga.c\n@@ -1,5 +1,5 @@\n /*\n- * Copyright (C) 2012 Altera Corporation <www.altera.com>\n+ * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>\n * All rights reserved.\n *\n * SPDX-License-Identifier:\tBSD-3-Clause\n@@ -55,18 +55,20 @@ void fpgamgr_program_write(const void *rbf_data, size_t rbf_size)\n \tuint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4);\n \n \tasm volatile(\n+\t\t\"\tcmp\t%2,\t#0\\n\"\n+\t\t\"\tbeq\t2f\\n\"\n \t\t\"1:\tldmia\t%0!,\t{r0-r7}\\n\"\n \t\t\"\tstmia\t%1!,\t{r0-r7}\\n\"\n \t\t\"\tsub\t%1,\t#32\\n\"\n \t\t\"\tsubs\t%2,\t#1\\n\"\n \t\t\"\tbne\t1b\\n\"\n-\t\t\"\tcmp\t%3,\t#0\\n\"\n-\t\t\"\tbeq\t3f\\n\"\n-\t\t\"2:\tldr\t%2,\t[%0],\t#4\\n\"\n+\t\t\"2:\tcmp\t%3,\t#0\\n\"\n+\t\t\"\tbeq\t4f\\n\"\n+\t\t\"3:\tldr\t%2,\t[%0],\t#4\\n\"\n \t\t\"\tstr\t%2,\t[%1]\\n\"\n \t\t\"\tsubs\t%3,\t#1\\n\"\n-\t\t\"\tbne\t2b\\n\"\n-\t\t\"3:\tnop\\n\"\n+\t\t\"\tbne\t3b\\n\"\n+\t\t\"4:\tnop\\n\"\n \t\t: \"+r\"(src), \"+r\"(dst), \"+r\"(loops32), \"+r\"(loops4) :\n \t\t: \"r0\", \"r1\", \"r2\", \"r3\", \"r4\", \"r5\", \"r6\", \"r7\", \"cc\");\n }\n", "prefixes": [ "U-Boot", "05/19" ] }