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GET /api/patches/806963/?format=api
{ "id": 806963, "url": "http://patchwork.ozlabs.org/api/patches/806963/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1503987820-31933-11-git-send-email-sukadev@linux.vnet.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1503987820-31933-11-git-send-email-sukadev@linux.vnet.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1503987820-31933-11-git-send-email-sukadev@linux.vnet.ibm.com/", "date": "2017-08-29T06:23:40", "name": "[v8,10/10] powerpc/vas: Define copy/paste interfaces", "commit_ref": "2392c8c8c0450293625dbef19ff5e206fb7b6749", "pull_url": null, "state": "accepted", "archived": false, "hash": "35546ac791dfd4637bef332efb9f20bdfec61d3a", "submitter": { "id": 984, "url": "http://patchwork.ozlabs.org/api/people/984/?format=api", "name": "Sukadev Bhattiprolu", "email": "sukadev@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1503987820-31933-11-git-send-email-sukadev@linux.vnet.ibm.com/mbox/", "series": [ { "id": 310, "url": "http://patchwork.ozlabs.org/api/series/310/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=310", "date": "2017-08-29T06:23:30", "name": "Enable VAS", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/310/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806963/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806963/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhJrc2Zntz9t2x\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 29 Aug 2017 16:39:12 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xhJrc1LprzDqYc\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 29 Aug 2017 16:39:12 +1000 (AEST)", "from ozlabs.org (bilbo.ozlabs.org [103.22.144.67])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xhJWS0ChSzDqTs\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 29 Aug 2017 16:24:20 +1000 (AEST)", "from ozlabs.org (bilbo.ozlabs.org [103.22.144.67])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 3xhJWR6M5Vz8vLq\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 29 Aug 2017 16:24:19 +1000 (AEST)", "by ozlabs.org (Postfix)\n\tid 3xhJWR4dMlz9t4k; Tue, 29 Aug 2017 16:24:19 +1000 (AEST)", "from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhJWQ733Vz9t48\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 16:24:18 +1000 (AEST)", "from pps.filterd (m0098409.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7T6OHeo026538\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 02:24:17 -0400", "from e14.ny.us.ibm.com (e14.ny.us.ibm.com [129.33.205.204])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2cmvyf61s7-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 02:24:15 -0400", "from localhost\n\tby e14.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <linuxppc-dev@ozlabs.org> from <sukadev@linux.vnet.ibm.com>;\n\tTue, 29 Aug 2017 02:24:11 -0400", "from b01cxnp22036.gho.pok.ibm.com (9.57.198.26)\n\tby e14.ny.us.ibm.com (146.89.104.201) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tTue, 29 Aug 2017 02:24:08 -0400", "from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com\n\t[9.57.199.110])\n\tby b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid v7T6O7PK30277770; Tue, 29 Aug 2017 06:24:07 GMT", "from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 38B34AE03B;\n\tTue, 29 Aug 2017 02:24:31 -0400 (EDT)", "from suka-w540.usor.ibm.com (unknown [9.70.94.25])\n\tby b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP id 55549AE034;\n\tTue, 29 Aug 2017 02:24:30 -0400 (EDT)" ], "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=sukadev@linux.vnet.ibm.com; receiver=<UNKNOWN>)", "From": "Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>", "To": "Michael Ellerman <mpe@ellerman.id.au>", "Subject": "[PATCH v8 10/10] powerpc/vas: Define copy/paste interfaces", "Date": "Mon, 28 Aug 2017 23:23:40 -0700", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1503987820-31933-1-git-send-email-sukadev@linux.vnet.ibm.com>", "References": "<1503987820-31933-1-git-send-email-sukadev@linux.vnet.ibm.com>", "X-TM-AS-GCONF": "00", "x-cbid": "17082906-0052-0000-0000-0000025753A0", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007631; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000226; SDB=6.00909146; UDB=6.00455922;\n\tIPR=6.00689402; \n\tBA=6.00005559; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016912;\n\tXFM=3.00000015; UTC=2017-08-29 06:24:10", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17082906-0053-0000-0000-000051D27E04", "Message-Id": "<1503987820-31933-11-git-send-email-sukadev@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-29_01:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708290096", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "stewart@linux.vnet.ibm.com, mikey@neuling.org, linuxppc-dev@ozlabs.org, \n\tlinux-kernel@vger.kernel.org, apopple@au1.ibm.com, oohall@gmail.com", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Define interfaces (wrappers) to the 'copy' and 'paste' instructions\n(which are new in PowerISA 3.0). These are intended to be used to\nby NX driver(s) to submit Coprocessor Request Blocks (CRBs) to the\nNX hardware engines.\n\nSigned-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>\n\n---\nChangelog[v8]:\n\t- [Michael Ellerman] Drop vas_initialized() check; cleanup asm code,\n\t reuse existing macros, fix old references; add cr0 to clobbers\n\nChangelog[v4]\n\t- Export symbols\nChangelog[v3]\n\t- Map raw CR value from paste instruction into an error code.\n\nConflicts:\n\tarch/powerpc/platforms/powernv/vas.h\n---\n MAINTAINERS | 1 +\n arch/powerpc/include/asm/ppc-opcode.h | 2 ++\n arch/powerpc/include/asm/vas.h | 12 ++++++++\n arch/powerpc/platforms/powernv/copy-paste.h | 46 ++++++++++++++++++++++++++++\n arch/powerpc/platforms/powernv/vas-window.c | 47 +++++++++++++++++++++++++++++\n arch/powerpc/platforms/powernv/vas.h | 18 +++++++++--\n 6 files changed, 124 insertions(+), 2 deletions(-)\n create mode 100644 arch/powerpc/platforms/powernv/copy-paste.h", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex ec68732..624c67a 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -6442,6 +6442,7 @@ M:\tSukadev Bhattiprolu\n L:\tlinuxppc-dev@lists.ozlabs.org\n S:\tSupported\n F:\tarch/powerpc/platforms/powernv/vas*\n+F:\tarch/powerpc/platforms/powernv/copy-paste.h\n F:\tarch/powerpc/include/asm/vas.h\n F:\tarch/powerpc/include/uapi/asm/vas.h\n \ndiff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h\nindex fa9ebae..749336d 100644\n--- a/arch/powerpc/include/asm/ppc-opcode.h\n+++ b/arch/powerpc/include/asm/ppc-opcode.h\n@@ -414,6 +414,8 @@\n \t\t\t\t\t___PPC_RB(b))\n #define PPC_MSGCLRP(b)\t\tstringify_in_c(.long PPC_INST_MSGCLRP | \\\n \t\t\t\t\t___PPC_RB(b))\n+#define PPC_PASTE(a, b)\t\tstringify_in_c(.long PPC_INST_PASTE | \\\n+\t\t\t\t\t___PPC_RA(a) | ___PPC_RB(b))\n #define PPC_POPCNTB(a, s)\tstringify_in_c(.long PPC_INST_POPCNTB | \\\n \t\t\t\t\t__PPC_RA(a) | __PPC_RS(s))\n #define PPC_POPCNTD(a, s)\tstringify_in_c(.long PPC_INST_POPCNTD | \\\ndiff --git a/arch/powerpc/include/asm/vas.h b/arch/powerpc/include/asm/vas.h\nindex efbdde5..dfc97f5 100644\n--- a/arch/powerpc/include/asm/vas.h\n+++ b/arch/powerpc/include/asm/vas.h\n@@ -145,4 +145,16 @@ struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop,\n */\n int vas_win_close(struct vas_window *win);\n \n+/*\n+ * Copy the co-processor request block (CRB) @crb into the local L2 cache.\n+ */\n+extern int vas_copy_crb(void *crb, int offset);\n+\n+/*\n+ * Paste a previously copied CRB (see vas_copy_crb()) from the L2 cache to\n+ * the hardware address associated with the window @win. @re is expected/\n+ * assumed to be true for NX windows.\n+ */\n+extern int vas_paste_crb(struct vas_window *win, int offset, bool re);\n+\n #endif /* _MISC_VAS_H */\ndiff --git a/arch/powerpc/platforms/powernv/copy-paste.h b/arch/powerpc/platforms/powernv/copy-paste.h\nnew file mode 100644\nindex 0000000..c9a5036\n--- /dev/null\n+++ b/arch/powerpc/platforms/powernv/copy-paste.h\n@@ -0,0 +1,46 @@\n+/*\n+ * Copyright 2016-17 IBM Corp.\n+ *\n+ * This program is free software; you can redistribute it and/or\n+ * modify it under the terms of the GNU General Public License\n+ * as published by the Free Software Foundation; either version\n+ * 2 of the License, or (at your option) any later version.\n+ */\n+#include <asm/ppc-opcode.h>\n+\n+#define CR0_SHIFT\t28\n+#define CR0_MASK\t0xF\n+/*\n+ * Copy/paste instructions:\n+ *\n+ *\tcopy RA,RB\n+ *\t\tCopy contents of address (RA) + effective_address(RB)\n+ *\t\tto internal copy-buffer.\n+ *\n+ *\tpaste RA,RB\n+ *\t\tPaste contents of internal copy-buffer to the address\n+ *\t\t(RA) + effective_address(RB)\n+ */\n+static inline int vas_copy(void *crb, int offset)\n+{\n+\tasm volatile(PPC_COPY(%0, %1)\";\"\n+\t\t:\n+\t\t: \"b\" (offset), \"b\" (crb)\n+\t\t: \"memory\");\n+\n+\treturn 0;\n+}\n+\n+static inline int vas_paste(void *paste_address, int offset)\n+{\n+\tu32 cr;\n+\n+\tcr = 0;\n+\tasm volatile(PPC_PASTE(%1, %2)\";\"\n+\t\t\"mfocrf %0, 0x80;\"\n+\t\t: \"=r\" (cr)\n+\t\t: \"b\" (offset), \"b\" (paste_address)\n+\t\t: \"memory\", \"cr0\");\n+\n+\treturn (cr >> CR0_SHIFT) & CR0_MASK;\n+}\ndiff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c\nindex cd12e44..b02f26d 100644\n--- a/arch/powerpc/platforms/powernv/vas-window.c\n+++ b/arch/powerpc/platforms/powernv/vas-window.c\n@@ -18,6 +18,7 @@\n #include <linux/cred.h>\n \n #include \"vas.h\"\n+#include \"copy-paste.h\"\n \n /*\n * Compute the paste address region for the window @window using the\n@@ -997,6 +998,52 @@ struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop,\n }\n EXPORT_SYMBOL_GPL(vas_tx_win_open);\n \n+int vas_copy_crb(void *crb, int offset)\n+{\n+\treturn vas_copy(crb, offset);\n+}\n+EXPORT_SYMBOL_GPL(vas_copy_crb);\n+\n+#define RMA_LSMP_REPORT_ENABLE PPC_BIT(53)\n+int vas_paste_crb(struct vas_window *txwin, int offset, bool re)\n+{\n+\tint rc;\n+\tvoid *addr;\n+\tuint64_t val;\n+\n+\t/*\n+\t * Only NX windows are supported for now and hardware assumes\n+\t * report-enable flag is set for NX windows. Ensure software\n+\t * complies too.\n+\t */\n+\tWARN_ON_ONCE(txwin->nx_win && !re);\n+\n+\taddr = txwin->paste_kaddr;\n+\tif (re) {\n+\t\t/*\n+\t\t * Set the REPORT_ENABLE bit (equivalent to writing\n+\t\t * to 1K offset of the paste address)\n+\t\t */\n+\t\tval = SET_FIELD(RMA_LSMP_REPORT_ENABLE, 0ULL, 1);\n+\t\taddr += val;\n+\t}\n+\n+\t/*\n+\t * Map the raw CR value from vas_paste() to an error code (there\n+\t * is just pass or fail for now though).\n+\t */\n+\trc = vas_paste(addr, offset);\n+\tif (rc == 2)\n+\t\trc = 0;\n+\telse\n+\t\trc = -EINVAL;\n+\n+\tprint_fifo_msg_count(txwin);\n+\n+\treturn rc;\n+}\n+EXPORT_SYMBOL_GPL(vas_paste_crb);\n+\n static void poll_window_busy_state(struct vas_window *window)\n {\n \tint busy;\ndiff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h\nindex d3e4f55..38dee5d 100644\n--- a/arch/powerpc/platforms/powernv/vas.h\n+++ b/arch/powerpc/platforms/powernv/vas.h\n@@ -398,11 +398,11 @@ extern struct vas_instance *find_vas_instance(int vasid);\n #ifdef vas_debug\n static inline void dump_rx_win_attr(struct vas_rx_win_attr *attr)\n {\n-\tpr_err(\"VAS: fault %d, notify %d, intr %d early %d\\n\",\n+\tpr_err(\"fault %d, notify %d, intr %d early %d\\n\",\n \t\t\tattr->fault_win, attr->notify_disable,\n \t\t\tattr->intr_disable, attr->notify_early);\n \n-\tpr_err(\"VAS: rx_fifo_size %d, max value %d\\n\",\n+\tpr_err(\"rx_fifo_size %d, max value %d\\n\",\n \t\t\t\tattr->rx_fifo_size, VAS_RX_FIFO_SIZE_MAX);\n }\n \n@@ -450,4 +450,18 @@ static inline u64 read_hvwc_reg(struct vas_window *win,\n \treturn in_be64(win->hvwc_map+reg);\n }\n \n+#ifdef vas_debug\n+\n+static void print_fifo_msg_count(struct vas_window *txwin)\n+{\n+\tuint64_t read_hvwc_reg(struct vas_window *w, char *n, uint64_t o);\n+\tpr_devel(\"Winid %d, Msg count %llu\\n\", txwin->winid,\n+\t\t\t(uint64_t)read_hvwc_reg(txwin, VREG(LRFIFO_PUSH)));\n+}\n+#else\t/* vas_debug */\n+\n+#define print_fifo_msg_count(window)\n+\n+#endif\t/* vas_debug */\n+\n #endif /* _VAS_H */\n", "prefixes": [ "v8", "10/10" ] }