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GET /api/patches/806962/?format=api
{ "id": 806962, "url": "http://patchwork.ozlabs.org/api/patches/806962/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1503987820-31933-10-git-send-email-sukadev@linux.vnet.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1503987820-31933-10-git-send-email-sukadev@linux.vnet.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1503987820-31933-10-git-send-email-sukadev@linux.vnet.ibm.com/", "date": "2017-08-29T06:23:39", "name": "[v8,09/10] powerpc/vas: Define vas_tx_win_open()", "commit_ref": "5239af679a07427647b009ebb9c70b1a03ebca9b", "pull_url": null, "state": "accepted", "archived": false, "hash": "c81ca0f781fad480f9adcea577da6da9b54b5162", "submitter": { "id": 984, "url": "http://patchwork.ozlabs.org/api/people/984/?format=api", "name": "Sukadev Bhattiprolu", "email": "sukadev@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1503987820-31933-10-git-send-email-sukadev@linux.vnet.ibm.com/mbox/", "series": [ { "id": 310, "url": "http://patchwork.ozlabs.org/api/series/310/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=310", "date": "2017-08-29T06:23:30", "name": "Enable VAS", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/310/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806962/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806962/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhJq44WSrz9t2x\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 29 Aug 2017 16:37:52 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xhJq43ZsNzDrWn\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 29 Aug 2017 16:37:52 +1000 (AEST)", "from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xhJWP5H88zDqTc\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 29 Aug 2017 16:24:17 +1000 (AEST)", "from ozlabs.org (bilbo.ozlabs.org [103.22.144.67])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 3xhJWN4Hgjz8vLq\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 29 Aug 2017 16:24:16 +1000 (AEST)", "by ozlabs.org (Postfix)\n\tid 3xhJWN1vbVz9t4k; Tue, 29 Aug 2017 16:24:16 +1000 (AEST)", "from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhJWM68Zwz9t48\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 16:24:15 +1000 (AEST)", "from pps.filterd (m0098399.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7T6OCN6118644\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 02:24:14 -0400", "from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2cmur5gvw7-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 02:24:13 -0400", "from localhost\n\tby e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <linuxppc-dev@ozlabs.org> from <sukadev@linux.vnet.ibm.com>;\n\tTue, 29 Aug 2017 02:24:09 -0400", "from b01cxnp22033.gho.pok.ibm.com (9.57.198.23)\n\tby e12.ny.us.ibm.com (146.89.104.199) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tTue, 29 Aug 2017 02:24:06 -0400", "from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com\n\t[9.57.199.110])\n\tby b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid v7T6O5Jx23986322; Tue, 29 Aug 2017 06:24:05 GMT", "from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 3B995AE034;\n\tTue, 29 Aug 2017 02:24:29 -0400 (EDT)", "from suka-w540.usor.ibm.com (unknown [9.70.94.25])\n\tby b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP id 6199EAE03C;\n\tTue, 29 Aug 2017 02:24:28 -0400 (EDT)" ], "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=sukadev@linux.vnet.ibm.com; receiver=<UNKNOWN>)", "From": "Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>", "To": "Michael Ellerman <mpe@ellerman.id.au>", "Subject": "[PATCH v8 09/10] powerpc/vas: Define vas_tx_win_open()", "Date": "Mon, 28 Aug 2017 23:23:39 -0700", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1503987820-31933-1-git-send-email-sukadev@linux.vnet.ibm.com>", "References": "<1503987820-31933-1-git-send-email-sukadev@linux.vnet.ibm.com>", "X-TM-AS-GCONF": "00", "x-cbid": "17082906-0048-0000-0000-000001DB0A28", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007631; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000226; SDB=6.00909146; UDB=6.00455923;\n\tIPR=6.00689401; \n\tBA=6.00005559; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016912;\n\tXFM=3.00000015; UTC=2017-08-29 06:24:08", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17082906-0049-0000-0000-0000426238C7", "Message-Id": "<1503987820-31933-10-git-send-email-sukadev@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-29_01:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=2\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708290096", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "stewart@linux.vnet.ibm.com, mikey@neuling.org, linuxppc-dev@ozlabs.org, \n\tlinux-kernel@vger.kernel.org, apopple@au1.ibm.com, oohall@gmail.com", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Define an interface to open a VAS send window. This interface is\nintended to be used the Nest Accelerator (NX) driver(s) to open\na send window and use it to submit compression/encryption requests\nto a VAS receive window.\n\nThe receive window, identified by the [vasid, cop] parameters, must\nalready be open in VAS (i.e connected to an NX engine).\n\nSigned-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>\n\n---\nChangelog[v8]:\n\t- [Michael Ellerman] Drop vas_initialized() check; defer code\n\t that sets pswid;\n\nChangelog[v7]:\n\t- Initialize txwin->user_win field for FTW windows.\n\nChangelog[v6]:\n\t- Add support for FTW windows\n\nChangelog[v4]:\n\t- [Ben Herrenschmidt] MMIO regions must be mapped non-cached and\n\t paste regions must be mapped cached. Define/use map_paste_region().\n\nChangelog [v3]:\n\t- Distinguish between hardware PID (SPRN_PID) and Linux pid.\n\t- Use macros rather than enum for threshold-control mode\n\t- Set the pid of send window from attr (needed for user space\n\t send windows).\n\t- Ignore irq port setting for now. They are needed for user space\n\t windows and will be added later\n---\n arch/powerpc/include/asm/vas.h | 42 ++++++++\n arch/powerpc/platforms/powernv/vas-window.c | 156 +++++++++++++++++++++++++++-\n 2 files changed, 195 insertions(+), 3 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/vas.h b/arch/powerpc/include/asm/vas.h\nindex e124856..efbdde5 100644\n--- a/arch/powerpc/include/asm/vas.h\n+++ b/arch/powerpc/include/asm/vas.h\n@@ -81,6 +81,29 @@ struct vas_rx_win_attr {\n };\n \n /*\n+ * Window attributes specified by the in-kernel owner of a send window.\n+ */\n+struct vas_tx_win_attr {\n+\tenum vas_cop_type cop;\n+\tint wcreds_max;\n+\tint lpid;\n+\tint pidr;\t\t/* hardware PID (from SPRN_PID) */\n+\tint pid;\t\t/* linux process id */\n+\tint pswid;\n+\tint rsvd_txbuf_count;\n+\tint tc_mode;\n+\n+\tbool user_win;\n+\tbool pin_win;\n+\tbool rej_no_credit;\n+\tbool rsvd_txbuf_enable;\n+\tbool tx_wcred_mode;\n+\tbool rx_wcred_mode;\n+\tbool tx_win_ord_mode;\n+\tbool rx_win_ord_mode;\n+};\n+\n+/*\n * Helper to initialize receive window attributes to defaults for an\n * NX window.\n */\n@@ -97,6 +120,25 @@ extern struct vas_window *vas_rx_win_open(int vasid, enum vas_cop_type cop,\n \t\t\tstruct vas_rx_win_attr *attr);\n \n /*\n+ * Helper to initialize send window attributes to defaults for an NX window.\n+ */\n+extern void vas_init_tx_win_attr(struct vas_tx_win_attr *txattr,\n+\t\t\tenum vas_cop_type cop);\n+\n+/*\n+ * Open a VAS send window for the instance of VAS identified by @vasid\n+ * and the co-processor type @cop. Use @attr to initialize attributes\n+ * of the window.\n+ *\n+ * Note: The instance of VAS must already have an open receive window for\n+ * the coprocessor type @cop.\n+ *\n+ * Return a handle to the send window or ERR_PTR() on error.\n+ */\n+struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop,\n+\t\t\tstruct vas_tx_win_attr *attr);\n+\n+/*\n * Close the send or receive window identified by @win. For receive windows\n * return -EAGAIN if there are active send windows attached to this receive\n * window.\ndiff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c\nindex 39aa0e4..cd12e44 100644\n--- a/arch/powerpc/platforms/powernv/vas-window.c\n+++ b/arch/powerpc/platforms/powernv/vas-window.c\n@@ -64,7 +64,7 @@ static inline void get_uwc_mmio_bar(struct vas_window *window,\n * space. Unlike MMIO regions (map_mmio_region() below), paste region must\n * be mapped cache-able and is only applicable to send windows.\n */\n-void *map_paste_region(struct vas_window *txwin)\n+static void *map_paste_region(struct vas_window *txwin)\n {\n \tint len;\n \tvoid *map;\n@@ -100,7 +100,6 @@ void *map_paste_region(struct vas_window *txwin)\n \treturn ERR_PTR(-ENOMEM);\n }\n \n-\n static void *map_mmio_region(char *name, u64 start, int len)\n {\n \tvoid *map;\n@@ -574,7 +573,7 @@ static void put_rx_win(struct vas_window *rxwin)\n *\n * See also function header of set_vinst_win().\n */\n-struct vas_window *get_vinst_rxwin(struct vas_instance *vinst,\n+static struct vas_window *get_vinst_rxwin(struct vas_instance *vinst,\n \t\t\tenum vas_cop_type cop, u32 pswid)\n {\n \tstruct vas_window *rxwin;\n@@ -847,6 +846,157 @@ struct vas_window *vas_rx_win_open(int vasid, enum vas_cop_type cop,\n }\n EXPORT_SYMBOL_GPL(vas_rx_win_open);\n \n+void vas_init_tx_win_attr(struct vas_tx_win_attr *txattr, enum vas_cop_type cop)\n+{\n+\tmemset(txattr, 0, sizeof(*txattr));\n+\n+\tif (cop == VAS_COP_TYPE_842 || cop == VAS_COP_TYPE_842_HIPRI) {\n+\t\ttxattr->rej_no_credit = false;\n+\t\ttxattr->rx_wcred_mode = true;\n+\t\ttxattr->tx_wcred_mode = true;\n+\t\ttxattr->rx_win_ord_mode = true;\n+\t\ttxattr->tx_win_ord_mode = true;\n+\t} else if (cop == VAS_COP_TYPE_FTW) {\n+\t\ttxattr->user_win = true;\n+\t}\n+}\n+EXPORT_SYMBOL_GPL(vas_init_tx_win_attr);\n+\n+static void init_winctx_for_txwin(struct vas_window *txwin,\n+\t\t\tstruct vas_tx_win_attr *txattr,\n+\t\t\tstruct vas_winctx *winctx)\n+{\n+\t/*\n+\t * We first zero all fields and only set non-zero ones. Following\n+\t * are some fields set to 0/false for the stated reason:\n+\t *\n+\t *\t->notify_os_intr_reg\tIn powerNV, send intrs to HV\n+\t *\t->rsvd_txbuf_count\tNot supported yet.\n+\t *\t->notify_disable\tFalse for NX windows\n+\t *\t->xtra_write\t\tFalse for NX windows\n+\t *\t->notify_early\t\tNA for NX windows\n+\t *\t->lnotify_lpid\t\tNA for Tx windows\n+\t *\t->lnotify_pid\t\tNA for Tx windows\n+\t *\t->lnotify_tid\t\tNA for Tx windows\n+\t *\t->tx_win_cred_mode\tIgnore for now for NX windows\n+\t *\t->rx_win_cred_mode\tIgnore for now for NX windows\n+\t */\n+\tmemset(winctx, 0, sizeof(struct vas_winctx));\n+\n+\twinctx->wcreds_max = txattr->wcreds_max ?: VAS_WCREDS_DEFAULT;\n+\n+\twinctx->user_win = txattr->user_win;\n+\twinctx->nx_win = txwin->rxwin->nx_win;\n+\twinctx->pin_win = txattr->pin_win;\n+\n+\twinctx->rx_wcred_mode = txattr->rx_wcred_mode;\n+\twinctx->tx_wcred_mode = txattr->tx_wcred_mode;\n+\twinctx->rx_word_mode = txattr->rx_win_ord_mode;\n+\twinctx->tx_word_mode = txattr->tx_win_ord_mode;\n+\n+\tif (winctx->nx_win) {\n+\t\twinctx->data_stamp = true;\n+\t\twinctx->intr_disable = true;\n+\t}\n+\n+\twinctx->lpid = txattr->lpid;\n+\twinctx->pidr = txattr->pidr;\n+\twinctx->rx_win_id = txwin->rxwin->winid;\n+\n+\twinctx->dma_type = VAS_DMA_TYPE_INJECT;\n+\twinctx->tc_mode = txattr->tc_mode;\n+\twinctx->min_scope = VAS_SCOPE_LOCAL;\n+\twinctx->max_scope = VAS_SCOPE_VECTORED_GROUP;\n+\n+\twinctx->pswid = 0;\n+}\n+\n+static bool tx_win_args_valid(enum vas_cop_type cop,\n+\t\t\tstruct vas_tx_win_attr *attr)\n+{\n+\tif (attr->tc_mode != VAS_THRESH_DISABLED)\n+\t\treturn false;\n+\n+\tif (cop > VAS_COP_TYPE_MAX)\n+\t\treturn false;\n+\n+\tif (attr->user_win &&\n+\t\t\t(cop != VAS_COP_TYPE_FTW || attr->rsvd_txbuf_count))\n+\t\treturn false;\n+\n+\treturn true;\n+}\n+\n+struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop,\n+\t\t\tstruct vas_tx_win_attr *attr)\n+{\n+\tint rc;\n+\tstruct vas_window *txwin;\n+\tstruct vas_window *rxwin;\n+\tstruct vas_winctx winctx;\n+\tstruct vas_instance *vinst;\n+\n+\tif (!tx_win_args_valid(cop, attr))\n+\t\treturn ERR_PTR(-EINVAL);\n+\n+\tvinst = find_vas_instance(vasid);\n+\tif (!vinst) {\n+\t\tpr_devel(\"vasid %d not found!\\n\", vasid);\n+\t\treturn ERR_PTR(-EINVAL);\n+\t}\n+\n+\trxwin = get_vinst_rxwin(vinst, cop, attr->pswid);\n+\tif (IS_ERR(rxwin)) {\n+\t\tpr_devel(\"No RxWin for vasid %d, cop %d\\n\", vasid, cop);\n+\t\treturn rxwin;\n+\t}\n+\n+\ttxwin = vas_window_alloc(vinst);\n+\tif (IS_ERR(txwin)) {\n+\t\trc = PTR_ERR(txwin);\n+\t\tgoto put_rxwin;\n+\t}\n+\n+\ttxwin->tx_win = 1;\n+\ttxwin->rxwin = rxwin;\n+\ttxwin->nx_win = txwin->rxwin->nx_win;\n+\ttxwin->pid = attr->pid;\n+\ttxwin->user_win = attr->user_win;\n+\n+\tinit_winctx_for_txwin(txwin, attr, &winctx);\n+\n+\tinit_winctx_regs(txwin, &winctx);\n+\n+\t/*\n+\t * If its a kernel send window, map the window address into the\n+\t * kernel's address space. For user windows, user must issue an\n+\t * mmap() to map the window into their address space.\n+\t *\n+\t * NOTE: If kernel ever resubmits a user CRB after handling a page\n+\t *\t fault, we will need to map this into kernel as well.\n+\t */\n+\tif (!txwin->user_win) {\n+\t\ttxwin->paste_kaddr = map_paste_region(txwin);\n+\t\tif (IS_ERR(txwin->paste_kaddr)) {\n+\t\t\trc = PTR_ERR(txwin->paste_kaddr);\n+\t\t\tgoto free_window;\n+\t\t}\n+\t}\n+\n+\tset_vinst_win(vinst, txwin);\n+\n+\treturn txwin;\n+\n+free_window:\n+\tvas_window_free(txwin);\n+\n+put_rxwin:\n+\tput_rx_win(rxwin);\n+\treturn ERR_PTR(rc);\n+\n+}\n+EXPORT_SYMBOL_GPL(vas_tx_win_open);\n+\n static void poll_window_busy_state(struct vas_window *window)\n {\n \tint busy;\n", "prefixes": [ "v8", "09/10" ] }