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GET /api/patches/806955/?format=api
{ "id": 806955, "url": "http://patchwork.ozlabs.org/api/patches/806955/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1503987820-31933-3-git-send-email-sukadev@linux.vnet.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1503987820-31933-3-git-send-email-sukadev@linux.vnet.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1503987820-31933-3-git-send-email-sukadev@linux.vnet.ibm.com/", "date": "2017-08-29T06:23:32", "name": "[v8,02/10] Move GET_FIELD/SET_FIELD to vas.h", "commit_ref": "b6622a339e8670a1025d4dd84be473c76dabed33", "pull_url": null, "state": "accepted", "archived": false, "hash": "05b1e954adb425173aa647e6ccd7cdfd79cf3592", "submitter": { "id": 984, "url": "http://patchwork.ozlabs.org/api/people/984/?format=api", "name": "Sukadev Bhattiprolu", "email": "sukadev@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1503987820-31933-3-git-send-email-sukadev@linux.vnet.ibm.com/mbox/", "series": [ { "id": 310, "url": "http://patchwork.ozlabs.org/api/series/310/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=310", "date": "2017-08-29T06:23:30", "name": "Enable VAS", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/310/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806955/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806955/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhJfR2NLhz9t2x\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 29 Aug 2017 16:30:23 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xhJfQ5WdTzDqh4\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 29 Aug 2017 16:30:22 +1000 (AEST)", "from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xhJW51jLGzDqV5\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 29 Aug 2017 16:24:01 +1000 (AEST)", "from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 3xhJW46YJQz8vmR\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 29 Aug 2017 16:24:00 +1000 (AEST)", "by ozlabs.org (Postfix)\n\tid 3xhJW4501zz9t3t; Tue, 29 Aug 2017 16:24:00 +1000 (AEST)", "from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhJW41Wmpz9t3s\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 16:23:59 +1000 (AEST)", "from pps.filterd (m0098399.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7T6LBuH111280\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 02:23:58 -0400", "from e14.ny.us.ibm.com (e14.ny.us.ibm.com [129.33.205.204])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2cmur5gve1-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <linuxppc-dev@ozlabs.org>; Tue, 29 Aug 2017 02:23:57 -0400", "from localhost\n\tby e14.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <linuxppc-dev@ozlabs.org> from <sukadev@linux.vnet.ibm.com>;\n\tTue, 29 Aug 2017 02:23:55 -0400", "from b01cxnp23034.gho.pok.ibm.com (9.57.198.29)\n\tby e14.ny.us.ibm.com (146.89.104.201) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tTue, 29 Aug 2017 02:23:52 -0400", "from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com\n\t[9.57.199.110])\n\tby b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid v7T6NpYs27262982; Tue, 29 Aug 2017 06:23:51 GMT", "from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 86E83AE034;\n\tTue, 29 Aug 2017 02:24:15 -0400 (EDT)", "from suka-w540.usor.ibm.com (unknown [9.70.94.25])\n\tby b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP id AC6F3AE03B;\n\tTue, 29 Aug 2017 02:24:14 -0400 (EDT)" ], "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=sukadev@linux.vnet.ibm.com; receiver=<UNKNOWN>)", "From": "Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>", "To": "Michael Ellerman <mpe@ellerman.id.au>", "Subject": "[PATCH v8 02/10] Move GET_FIELD/SET_FIELD to vas.h", "Date": "Mon, 28 Aug 2017 23:23:32 -0700", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1503987820-31933-1-git-send-email-sukadev@linux.vnet.ibm.com>", "References": "<1503987820-31933-1-git-send-email-sukadev@linux.vnet.ibm.com>", "X-TM-AS-GCONF": "00", "x-cbid": "17082906-0052-0000-0000-000002575399", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007631; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000226; SDB=6.00909146; UDB=6.00455922;\n\tIPR=6.00689402; \n\tBA=6.00005559; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016912;\n\tXFM=3.00000015; UTC=2017-08-29 06:23:54", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17082906-0053-0000-0000-000051D27DE4", "Message-Id": "<1503987820-31933-3-git-send-email-sukadev@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-29_01:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708290094", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "stewart@linux.vnet.ibm.com, mikey@neuling.org, linuxppc-dev@ozlabs.org, \n\tlinux-kernel@vger.kernel.org, apopple@au1.ibm.com, oohall@gmail.com", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Move the GET_FIELD and SET_FIELD macros to vas.h as VAS and other\nusers of VAS, including NX-842 can use those macros.\n\nThere is a lot of related code between the VAS/NX kernel drivers\nand skiboot. For consistency, switch the order of parameters in\nSET_FIELD to match the order in skiboot.\n\nSigned-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>\nReviewed-by: Dan Streetman <ddstreet@ieee.org>\n---\n\nChangelog[v7]\n\t[Michael Ellerman] Move the macros to <asm/vas.h> rather than\n\t\tto <uapi/asm/vas.h>\n\nChangelog[v3]\n\t- Fix order of parameters in nx-842 driver.\n---\n arch/powerpc/include/asm/vas.h | 8 ++++++++\n drivers/crypto/nx/nx-842-powernv.c | 7 ++++---\n drivers/crypto/nx/nx-842.h | 5 -----\n 3 files changed, 12 insertions(+), 8 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/vas.h b/arch/powerpc/include/asm/vas.h\nindex ff87e44..33e93ca 100644\n--- a/arch/powerpc/include/asm/vas.h\n+++ b/arch/powerpc/include/asm/vas.h\n@@ -30,6 +30,14 @@\n #define VAS_THRESH_FIFO_GT_EIGHTH_FULL\t3\n \n /*\n+ * Get/Set bit fields\n+ */\n+#define GET_FIELD(m, v) (((v) & (m)) >> MASK_LSH(m))\n+#define MASK_LSH(m) (__builtin_ffsl(m) - 1)\n+#define SET_FIELD(m, v, val) \\\n+\t\t(((v) & ~(m)) | ((((typeof(v))(val)) << MASK_LSH(m)) & (m)))\n+\n+/*\n * Co-processor Engine type.\n */\n enum vas_cop_type {\ndiff --git a/drivers/crypto/nx/nx-842-powernv.c b/drivers/crypto/nx/nx-842-powernv.c\nindex 1710f80..3abb045 100644\n--- a/drivers/crypto/nx/nx-842-powernv.c\n+++ b/drivers/crypto/nx/nx-842-powernv.c\n@@ -22,6 +22,7 @@\n \n #include <asm/prom.h>\n #include <asm/icswx.h>\n+#include <asm/vas.h>\n \n MODULE_LICENSE(\"GPL\");\n MODULE_AUTHOR(\"Dan Streetman <ddstreet@ieee.org>\");\n@@ -424,9 +425,9 @@ static int nx842_powernv_function(const unsigned char *in, unsigned int inlen,\n \n \t/* set up CCW */\n \tccw = 0;\n-\tccw = SET_FIELD(ccw, CCW_CT, nx842_ct);\n-\tccw = SET_FIELD(ccw, CCW_CI_842, 0); /* use 0 for hw auto-selection */\n-\tccw = SET_FIELD(ccw, CCW_FC_842, fc);\n+\tccw = SET_FIELD(CCW_CT, ccw, nx842_ct);\n+\tccw = SET_FIELD(CCW_CI_842, ccw, 0); /* use 0 for hw auto-selection */\n+\tccw = SET_FIELD(CCW_FC_842, ccw, fc);\n \n \t/* set up CRB's CSB addr */\n \tcsb_addr = nx842_get_pa(csb) & CRB_CSB_ADDRESS;\ndiff --git a/drivers/crypto/nx/nx-842.h b/drivers/crypto/nx/nx-842.h\nindex a4eee3b..30929bd 100644\n--- a/drivers/crypto/nx/nx-842.h\n+++ b/drivers/crypto/nx/nx-842.h\n@@ -100,11 +100,6 @@ static inline unsigned long nx842_get_pa(void *addr)\n \treturn page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr);\n }\n \n-/* Get/Set bit fields */\n-#define MASK_LSH(m)\t\t(__builtin_ffsl(m) - 1)\n-#define GET_FIELD(v, m)\t\t(((v) & (m)) >> MASK_LSH(m))\n-#define SET_FIELD(v, m, val)\t(((v) & ~(m)) | (((val) << MASK_LSH(m)) & (m)))\n-\n /**\n * This provides the driver's constraints. Different nx842 implementations\n * may have varying requirements. The constraints are:\n", "prefixes": [ "v8", "02/10" ] }