Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/806927/?format=api
{ "id": 806927, "url": "http://patchwork.ozlabs.org/api/patches/806927/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20170829034147.GA15563@ibm-tiger.the-meissners.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170829034147.GA15563@ibm-tiger.the-meissners.org>", "list_archive_url": null, "date": "2017-08-29T03:41:47", "name": ", PR target/82015, add PowerPC warning for unpack_vector_int128 with illegal 2nd argument", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f915071f09075847673c4b7a39531bfee9440c99", "submitter": { "id": 4611, "url": "http://patchwork.ozlabs.org/api/people/4611/?format=api", "name": "Michael Meissner", "email": "meissner@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20170829034147.GA15563@ibm-tiger.the-meissners.org/mbox/", "series": [ { "id": 293, "url": "http://patchwork.ozlabs.org/api/series/293/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=293", "date": "2017-08-29T03:41:47", "name": ", PR target/82015, add PowerPC warning for unpack_vector_int128 with illegal 2nd argument", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/293/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806927/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806927/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-return-461058-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "mailing list gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461058-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"Xq5Qs2rL\"; dkim-atps=neutral", "sourceware.org; auth=none" ], "Received": [ "from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhDwS66dBz9s7h\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 13:42:14 +1000 (AEST)", "(qmail 90795 invoked by alias); 29 Aug 2017 03:42:05 -0000", "(qmail 90769 invoked by uid 89); 29 Aug 2017 03:42:04 -0000", "from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 29 Aug 2017 03:41:54 +0000", "from pps.filterd (m0098396.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7T3fiip141805\tfor <gcc-patches@gcc.gnu.org>;\n\tMon, 28 Aug 2017 23:41:52 -0400", "from e34.co.us.ibm.com (e34.co.us.ibm.com [32.97.110.152])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2cmvjevsdy-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor <gcc-patches@gcc.gnu.org>;\n\tMon, 28 Aug 2017 23:41:51 -0400", "from localhost\tby e34.co.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted\tfor\n\t<gcc-patches@gcc.gnu.org> from\n\t<meissner@ibm-tiger.the-meissners.org>;\n\tMon, 28 Aug 2017 21:41:51 -0600", "from b03cxnp08027.gho.boulder.ibm.com (9.17.130.19)\tby\n\te34.co.us.ibm.com (192.168.1.134) with IBM ESMTP SMTP\n\tGateway: Authorized Use Only! Violators will be prosecuted;\n\tMon, 28 Aug 2017 21:41:49 -0600", "from b03ledav001.gho.boulder.ibm.com\n\t(b03ledav001.gho.boulder.ibm.com [9.17.130.232])\tby\n\tb03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0)\n\twith ESMTP id v7T3fnfI65273948; Mon, 28 Aug 2017 20:41:49 -0700", "from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1])\tby\n\tIMSVA (Postfix) with ESMTP id F32FC6E035;\n\tMon, 28 Aug 2017 21:41:48 -0600 (MDT)", "from ibm-tiger.the-meissners.org (unknown [9.32.77.111])\tby\n\tb03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP id\n\tC20346E03F; Mon, 28 Aug 2017 21:41:48 -0600 (MDT)", "by ibm-tiger.the-meissners.org (Postfix, from userid 500)\tid\n\tEC5CF4775E; Mon, 28 Aug 2017 23:41:47 -0400 (EDT)" ], "DomainKey-Signature": "a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:date\n\t:from:to:subject:mime-version:content-type:message-id; q=dns; s=\n\tdefault; b=x0bXIheXqW+b1LTShVZkQeAQdRHffmNzdudny04UMs2LUsMgAdE27\n\tS9DFCule6QwtSABDiur9jdon1XzyMQUf2M9F13mmnyPG9x4IMjNGGZw7gadhKK47\n\tvrDm5xeXS4oPeBgE1LgO2svNnN8qFc+dgPrgFDkARWKt2G2G+QJkhI=", "DKIM-Signature": "v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:date\n\t:from:to:subject:mime-version:content-type:message-id; s=\n\tdefault; bh=TQAEXFsI6K617gSg4K9j3UNBqvc=; b=Xq5Qs2rL4wOF2IWZMgo3\n\tEO73mlBXfupuu0AH67oip5ZOqfcL5swRBuUFqerwEL0/ywECseiqOZHwpOylNlXc\n\tKdf6Zlmtka0bIB4GmmeItcphqGIKDCtSNSKjFusAPZGFbHvA9kNIDgYXuFtIWn+b\n\tmAZfMcjr+1kQCWSazGSA2g4=", "Mailing-List": "contact gcc-patches-help@gcc.gnu.org; run by ezmlm", "Precedence": "bulk", "List-Id": "<gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "List-Archive": "<http://gcc.gnu.org/ml/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-help@gcc.gnu.org>", "Sender": "gcc-patches-owner@gcc.gnu.org", "X-Virus-Found": "No", "X-Spam-SWARE-Status": "No, score=-9.9 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS,\n\tKAM_LAZY_DOMAIN_SECURITY,\n\tRCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=dd, oi", "X-HELO": "mx0a-001b2d01.pphosted.com", "Date": "Mon, 28 Aug 2017 23:41:47 -0400", "From": "Michael Meissner <meissner@linux.vnet.ibm.com>", "To": "GCC Patches <gcc-patches@gcc.gnu.org>,\n\tSegher Boessenkool <segher@kernel.crashing.org>,\n\tDavid Edelsohn <dje.gcc@gmail.com>,\n\tBill Schmidt <wschmidt@linux.vnet.ibm.com>", "Subject": "[PATCH], PR target/82015,\n\tadd PowerPC warning for unpack_vector_int128 with illegal 2nd\n\targument", "Mail-Followup-To": "Michael Meissner <meissner@linux.vnet.ibm.com>,\n\tGCC Patches <gcc-patches@gcc.gnu.org>,\n\tSegher Boessenkool <segher@kernel.crashing.org>,\n\tDavid Edelsohn <dje.gcc@gmail.com>,\n\tBill Schmidt <wschmidt@linux.vnet.ibm.com>", "MIME-Version": "1.0", "Content-Type": "multipart/mixed; boundary=\"sdtB3X0nJg68CQEu\"", "Content-Disposition": "inline", "User-Agent": "Mutt/1.5.20 (2009-12-10)", "X-TM-AS-GCONF": "00", "x-cbid": "17082903-0016-0000-0000-0000076F0B4D", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007630; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000226; SDB=6.00909096; UDB=6.00455890;\n\tIPR=6.00689347; BA=6.00005557; NDR=6.00000001; ZLA=6.00000005;\n\tZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000;\n\tZU=6.00000002; MB=3.00016912; XFM=3.00000015;\n\tUTC=2017-08-29 03:41:51", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17082903-0017-0000-0000-00003B3F882B", "Message-Id": "<20170829034147.GA15563@ibm-tiger.the-meissners.org>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-28_13:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0 malwarescore=0 phishscore=0\n\tadultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx\n\tscancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708290053", "X-IsSubscribed": "yes" }, "content": "One of the local programmers tried to use the __builtin_unpack_vector_int128\nfunction, but his second argument was not the constant 0 or 1. The compiler\nput the 2nd argument into a register, but there wasn't a valid insn for this,\nand raised an insn not found message. GCC should warn about this illegal\nusage.\n\nThis patch adds such a warning. While I was mucking about with this built-in\nfunction, I fixed the constraints to allow the 64-bit integer for unpack result\nand pack inputs to be in the traditional Altivec registers as well as the\ntraditional floating point registers.\n\nI did a bootstrap of the compiler, and there were no regressions on a little\nendian power8 system. I verified that the new test is run. Can I apply this\npatch to the trunk?\n\nCan I apply the part of the patch from rs6000.c to the existing GCC 6/7\nbranches as well after a shake down period? The patch to rs6000.md is not\nappropriate for GCC 6 (since DImode can't go into Altivec registers). For GCC\n7, it would need to be modified to use the 'wi' constraint instead of 'wa',\nsince GCC 7 still had support for the -mno-upper-regs-di option to control\naccess to the traditional Altivec register.\n\n[gcc]\n2017-08-28 Michael Meissner <meissner@linux.vnet.ibm.com>\n\n\tPR target/82015\n\t* config/rs6000/rs6000.c (rs6000_expand_binop_builtin): Insure\n\tthat the second argument of the built-in functions to unpack\n\t128-bit scalar types to 64-bit values is 0 or 1. Change to use a\n\tswitch statement instead a lot of if statements.\n\t* config/rs6000/rs6000.md (unpack<mode>, FMOVE128_VSX iterator):\n\tAllow 64-bit values to be in Altivec registers as well as\n\ttraditional floating point registers.\n\t(pack<mode>, FMOVE128_VSX iterator): Likewise.\n\n[gcc/testsuite]\n2017-08-28 Michael Meissner <meissner@linux.vnet.ibm.com>\n\n\tPR target/82015\n\t* gcc.target/powerpc/pr82015.c: New test.", "diff": "Index: gcc/config/rs6000/rs6000.c\n===================================================================\n--- gcc/config/rs6000/rs6000.c\t(revision 251390)\n+++ gcc/config/rs6000/rs6000.c\t(working copy)\n@@ -14001,14 +14001,17 @@ rs6000_expand_binop_builtin (enum insn_c\n if (arg0 == error_mark_node || arg1 == error_mark_node)\n return const0_rtx;\n \n- if (icode == CODE_FOR_altivec_vcfux\n- || icode == CODE_FOR_altivec_vcfsx\n- || icode == CODE_FOR_altivec_vctsxs\n- || icode == CODE_FOR_altivec_vctuxs\n- || icode == CODE_FOR_altivec_vspltb\n- || icode == CODE_FOR_altivec_vsplth\n- || icode == CODE_FOR_altivec_vspltw)\n+ switch (icode)\n {\n+ default:\n+ break;\n+ case CODE_FOR_altivec_vcfux:\n+ case CODE_FOR_altivec_vcfsx:\n+ case CODE_FOR_altivec_vctsxs:\n+ case CODE_FOR_altivec_vctuxs:\n+ case CODE_FOR_altivec_vspltb:\n+ case CODE_FOR_altivec_vsplth:\n+ case CODE_FOR_altivec_vspltw:\n /* Only allow 5-bit unsigned literals. */\n STRIP_NOPS (arg1);\n if (TREE_CODE (arg1) != INTEGER_CST\n@@ -14017,16 +14020,15 @@ rs6000_expand_binop_builtin (enum insn_c\n \t error (\"argument 2 must be a 5-bit unsigned literal\");\n \t return CONST0_RTX (tmode);\n \t}\n- }\n- else if (icode == CODE_FOR_dfptstsfi_eq_dd\n- || icode == CODE_FOR_dfptstsfi_lt_dd\n- || icode == CODE_FOR_dfptstsfi_gt_dd\n- || icode == CODE_FOR_dfptstsfi_unordered_dd\n- || icode == CODE_FOR_dfptstsfi_eq_td\n- || icode == CODE_FOR_dfptstsfi_lt_td\n- || icode == CODE_FOR_dfptstsfi_gt_td\n- || icode == CODE_FOR_dfptstsfi_unordered_td)\n- {\n+ break;\n+ case CODE_FOR_dfptstsfi_eq_dd:\n+ case CODE_FOR_dfptstsfi_lt_dd:\n+ case CODE_FOR_dfptstsfi_gt_dd:\n+ case CODE_FOR_dfptstsfi_unordered_dd:\n+ case CODE_FOR_dfptstsfi_eq_td:\n+ case CODE_FOR_dfptstsfi_lt_td:\n+ case CODE_FOR_dfptstsfi_gt_td:\n+ case CODE_FOR_dfptstsfi_unordered_td:\n /* Only allow 6-bit unsigned literals. */\n STRIP_NOPS (arg0);\n if (TREE_CODE (arg0) != INTEGER_CST\n@@ -14035,13 +14037,12 @@ rs6000_expand_binop_builtin (enum insn_c\n \t error (\"argument 1 must be a 6-bit unsigned literal\");\n \t return CONST0_RTX (tmode);\n \t}\n- }\n- else if (icode == CODE_FOR_xststdcqp\n-\t || icode == CODE_FOR_xststdcdp\n-\t || icode == CODE_FOR_xststdcsp\n-\t || icode == CODE_FOR_xvtstdcdp\n-\t || icode == CODE_FOR_xvtstdcsp)\n- {\n+ break;\n+ case CODE_FOR_xststdcqp:\n+ case CODE_FOR_xststdcdp:\n+ case CODE_FOR_xststdcsp:\n+ case CODE_FOR_xvtstdcdp:\n+ case CODE_FOR_xvtstdcsp:\n /* Only allow 7-bit unsigned literals. */\n STRIP_NOPS (arg1);\n if (TREE_CODE (arg1) != INTEGER_CST\n@@ -14050,6 +14051,21 @@ rs6000_expand_binop_builtin (enum insn_c\n \t error (\"argument 2 must be a 7-bit unsigned literal\");\n \t return CONST0_RTX (tmode);\n \t}\n+ break;\n+ case CODE_FOR_unpackv1ti:\n+ case CODE_FOR_unpackkf:\n+ case CODE_FOR_unpacktf:\n+ case CODE_FOR_unpackif:\n+ case CODE_FOR_unpacktd:\n+ /* Only allow 1-bit unsigned literals. */\n+ STRIP_NOPS (arg1);\n+ if (TREE_CODE (arg1) != INTEGER_CST\n+\t || !IN_RANGE (TREE_INT_CST_LOW (arg1), 0, 1))\n+\t{\n+\t error (\"argument 2 must be 0 or 1\");\n+\t return CONST0_RTX (tmode);\n+\t}\n+ break;\n }\n \n if (target == 0\nIndex: gcc/config/rs6000/rs6000.md\n===================================================================\n--- gcc/config/rs6000/rs6000.md\t(revision 251390)\n+++ gcc/config/rs6000/rs6000.md\t(working copy)\n@@ -14165,7 +14165,7 @@ (define_insn_and_split \"pack<mode>\"\n (set_attr \"length\" \"4,8\")])\n \n (define_insn \"unpack<mode>\"\n- [(set (match_operand:DI 0 \"register_operand\" \"=d,d\")\n+ [(set (match_operand:DI 0 \"register_operand\" \"=wa,wa\")\n \t(unspec:DI [(match_operand:FMOVE128_VSX 1 \"register_operand\" \"0,wa\")\n \t\t (match_operand:QI 2 \"const_0_to_1_operand\" \"O,i\")]\n \t UNSPEC_UNPACK_128BIT))]\n@@ -14182,8 +14182,8 @@ (define_insn \"unpack<mode>\"\n (define_insn \"pack<mode>\"\n [(set (match_operand:FMOVE128_VSX 0 \"register_operand\" \"=wa\")\n \t(unspec:FMOVE128_VSX\n-\t [(match_operand:DI 1 \"register_operand\" \"d\")\n-\t (match_operand:DI 2 \"register_operand\" \"d\")]\n+\t [(match_operand:DI 1 \"register_operand\" \"wa\")\n+\t (match_operand:DI 2 \"register_operand\" \"wa\")]\n \t UNSPEC_PACK_128BIT))]\n \"TARGET_VSX\"\n \"xxpermdi %x0,%x1,%x2,0\"\nIndex: gcc/testsuite/gcc.target/powerpc/pr82015.c\n===================================================================\n--- gcc/testsuite/gcc.target/powerpc/pr82015.c\t(revision 0)\n+++ gcc/testsuite/gcc.target/powerpc/pr82015.c\t(revision 0)\n@@ -0,0 +1,14 @@\n+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */\n+/* { dg-skip-if \"\" { powerpc*-*-darwin* } } */\n+/* { dg-require-effective-target powerpc_vsx_ok } */\n+/* { dg-options \"-O2 -mvsx\" } */\n+\n+unsigned long foo_11(vector __int128_t *p)\n+{\n+ return __builtin_unpack_vector_int128(*p, 11); /* { dg-error \"argument 2 must be 0 or 1\" } */\n+}\n+\n+unsigned long foo_n(vector __int128_t *p, unsigned long n)\n+{\n+ return __builtin_unpack_vector_int128(*p, n);\t/* { dg-error \"argument 2 must be 0 or 1\" } */\n+}\n", "prefixes": [] }