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GET /api/patches/806848/?format=api
{ "id": 806848, "url": "http://patchwork.ozlabs.org/api/patches/806848/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1503965694-10794-36-git-send-email-mdroth@linux.vnet.ibm.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503965694-10794-36-git-send-email-mdroth@linux.vnet.ibm.com>", "list_archive_url": null, "date": "2017-08-29T00:14:10", "name": "[35/79] e1000e: Fix ICR \"Other\" causes clear logic", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b85e849367504cfa89f9008a32072f4afeaba475", "submitter": { "id": 5549, "url": "http://patchwork.ozlabs.org/api/people/5549/?format=api", "name": "Michael Roth", "email": "mdroth@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1503965694-10794-36-git-send-email-mdroth@linux.vnet.ibm.com/mbox/", "series": [ { "id": 281, "url": "http://patchwork.ozlabs.org/api/series/281/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=281", "date": "2017-08-29T00:13:45", "name": "Patch Round-up for stable 2.9.1, freeze on 2017-09-04", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/281/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806848/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806848/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xh8xt03G7z9s7M\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 10:43:14 +1000 (AEST)", "from localhost ([::1]:42029 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dmUcZ-0008Ux-QF\n\tfor incoming@patchwork.ozlabs.org; Mon, 28 Aug 2017 20:43:11 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:47970)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <mdroth@linux.vnet.ibm.com>) id 1dmUCQ-0001EN-U5\n\tfor qemu-devel@nongnu.org; Mon, 28 Aug 2017 20:16:14 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <mdroth@linux.vnet.ibm.com>) id 1dmUCN-0005QF-MP\n\tfor qemu-devel@nongnu.org; Mon, 28 Aug 2017 20:16:10 -0400", "from mx0b-001b2d01.pphosted.com ([148.163.158.5]:56940\n\thelo=mx0a-001b2d01.pphosted.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <mdroth@linux.vnet.ibm.com>)\n\tid 1dmUCN-0005Pj-Gs\n\tfor qemu-devel@nongnu.org; Mon, 28 Aug 2017 20:16:07 -0400", "from pps.filterd (m0098420.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7T0ED4s099779\n\tfor <qemu-devel@nongnu.org>; Mon, 28 Aug 2017 20:16:07 -0400", "from e33.co.us.ibm.com (e33.co.us.ibm.com [32.97.110.151])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2cmr22yk3y-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <qemu-devel@nongnu.org>; Mon, 28 Aug 2017 20:16:06 -0400", "from localhost\n\tby e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <qemu-devel@nongnu.org> from <mdroth@linux.vnet.ibm.com>;\n\tMon, 28 Aug 2017 18:16:06 -0600", "from b03cxnp08027.gho.boulder.ibm.com (9.17.130.19)\n\tby e33.co.us.ibm.com (192.168.1.133) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tMon, 28 Aug 2017 18:16:02 -0600", "from b03ledav002.gho.boulder.ibm.com\n\t(b03ledav002.gho.boulder.ibm.com [9.17.130.233])\n\tby b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v7T0G2F056623330; Mon, 28 Aug 2017 17:16:02 -0700", "from b03ledav002.gho.boulder.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 3DE8813603C;\n\tMon, 28 Aug 2017 18:16:02 -0600 (MDT)", "from localhost (unknown [9.80.85.217])\n\tby b03ledav002.gho.boulder.ibm.com (Postfix) with ESMTP id\n\t0AED9136040; Mon, 28 Aug 2017 18:16:01 -0600 (MDT)" ], "From": "Michael Roth <mdroth@linux.vnet.ibm.com>", "To": "qemu-devel@nongnu.org", "Date": "Mon, 28 Aug 2017 19:14:10 -0500", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1503965694-10794-1-git-send-email-mdroth@linux.vnet.ibm.com>", "References": "<1503965694-10794-1-git-send-email-mdroth@linux.vnet.ibm.com>", "X-TM-AS-GCONF": "00", "x-cbid": "17082900-0008-0000-0000-0000087D385C", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007630; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000226; SDB=6.00909028; UDB=6.00455849;\n\tIPR=6.00689279; \n\tBA=6.00005557; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016909;\n\tXFM=3.00000015; UTC=2017-08-29 00:16:04", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17082900-0009-0000-0000-000043C046C5", "Message-Id": "<1503965694-10794-36-git-send-email-mdroth@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-28_13:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=1\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708290001", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy]", "X-Received-From": "148.163.158.5", "Subject": "[Qemu-devel] [PATCH 35/79] e1000e: Fix ICR \"Other\" causes clear\n\tlogic", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "Sameeh Jubran <sjubran@redhat.com>, Jason Wang <jasowang@redhat.com>,\n\tSameeh Jubran <sameeh@daynix.com>, qemu-stable@nongnu.org", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Sameeh Jubran <sameeh@daynix.com>\n\nThis commit fixes a bug which causes the guest to hang. The bug was\nobserved upon a \"receive overrun\" (bit #6 of the ICR register)\ninterrupt which could be triggered post migration in a heavy traffic\nenvironment. Even though the \"receive overrun\" bit (#6) is masked out\nby the IMS register (refer to the log below) the driver still receives\nan interrupt as the \"receive overrun\" bit (#6) causes the \"Other\" -\nbit #24 of the ICR register - bit to be set as documented below. The\ndriver handles the interrupt and clears the \"Other\" bit (#24) but\ndoesn't clear the \"receive overrun\" bit (#6) which leads to an\ninfinite loop. Apparently the Windows driver expects that the \"receive\noverrun\" bit and other ones - documented below - to be cleared when\nthe \"Other\" bit (#24) is cleared.\n\nSo to sum that up:\n1. Bit #6 of the ICR register is set by heavy traffic\n2. As a results of setting bit #6, bit #24 is set\n3. The driver receives an interrupt for bit 24 (it doesn't receieve an\n interrupt for bit #6 as it is masked out by IMS)\n4. The driver handles and clears the interrupt of bit #24\n5. Bit #6 is still set.\n6. 2 happens all over again\n\nThe Interrupt Cause Read - ICR register:\n\nThe ICR has the \"Other\" bit - bit #24 - that is set when one or more\nof the following ICR register's bits are set:\n\nLSC - bit #2, RXO - bit #6, MDAC - bit #9, SRPD - bit #16, ACK - bit\n#17, MNG - bit #18\n\nThis bug can occur with any of these bits depending on the driver's\nbehaviour and the way it configures the device. However, trying to\nreproduce it with any bit other than RX0 is challenging and came to\nfailure as the drivers don't implement most of these bits, trying to\nreproduce it with LSC (Link Status Change - bit #2) bit didn't succeed\ntoo as it seems that Windows handles this bit differently.\n\nLog sample of the storm:\n\n27563@1494850819.411877:e1000e_irq_pending_interrupts ICR PENDING: 0x1000000 (ICR: 0x815000c2, IMS: 0x1a00004)\n27563@1494850819.411900:e1000e_irq_pending_interrupts ICR PENDING: 0x0 (ICR: 0x815000c2, IMS: 0xa00004)\n27563@1494850819.411915:e1000e_irq_pending_interrupts ICR PENDING: 0x0 (ICR: 0x815000c2, IMS: 0xa00004)\n27563@1494850819.412380:e1000e_irq_pending_interrupts ICR PENDING: 0x0 (ICR: 0x815000c2, IMS: 0xa00004)\n27563@1494850819.412395:e1000e_irq_pending_interrupts ICR PENDING: 0x0 (ICR: 0x815000c2, IMS: 0xa00004)\n27563@1494850819.412436:e1000e_irq_pending_interrupts ICR PENDING: 0x0 (ICR: 0x815000c2, IMS: 0xa00004)\n27563@1494850819.412441:e1000e_irq_pending_interrupts ICR PENDING: 0x0 (ICR: 0x815000c2, IMS: 0xa00004)\n27563@1494850819.412998:e1000e_irq_pending_interrupts ICR PENDING: 0x1000000 (ICR: 0x815000c2, IMS: 0x1a00004)\n\n* This bug behaviour wasn't observed with the Linux driver.\n\nThis commit solves:\nhttps://bugzilla.redhat.com/show_bug.cgi?id=1447935\nhttps://bugzilla.redhat.com/show_bug.cgi?id=1449490\n\nCc: qemu-stable@nongnu.org\nSigned-off-by: Sameeh Jubran <sjubran@redhat.com>\nSigned-off-by: Jason Wang <jasowang@redhat.com>\n(cherry picked from commit 82342e91b60a4a078811df4e1a545e57abffa11d)\nSigned-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>\n---\n hw/net/e1000e_core.c | 10 ++++++++--\n 1 file changed, 8 insertions(+), 2 deletions(-)", "diff": "diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c\nindex 28c5be1..8140564 100644\n--- a/hw/net/e1000e_core.c\n+++ b/hw/net/e1000e_core.c\n@@ -2454,14 +2454,20 @@ e1000e_set_ics(E1000ECore *core, int index, uint32_t val)\n static void\n e1000e_set_icr(E1000ECore *core, int index, uint32_t val)\n {\n+ uint32_t icr = 0;\n if ((core->mac[ICR] & E1000_ICR_ASSERTED) &&\n (core->mac[CTRL_EXT] & E1000_CTRL_EXT_IAME)) {\n trace_e1000e_irq_icr_process_iame();\n e1000e_clear_ims_bits(core, core->mac[IAM]);\n }\n \n- trace_e1000e_irq_icr_write(val, core->mac[ICR], core->mac[ICR] & ~val);\n- core->mac[ICR] &= ~val;\n+ icr = core->mac[ICR] & ~val;\n+ /* Windows driver expects that the \"receive overrun\" bit and other\n+ * ones to be cleared when the \"Other\" bit (#24) is cleared.\n+ */\n+ icr = (val & E1000_ICR_OTHER) ? (icr & ~E1000_ICR_OTHER_CAUSES) : icr;\n+ trace_e1000e_irq_icr_write(val, core->mac[ICR], icr);\n+ core->mac[ICR] = icr;\n e1000e_update_interrupt_state(core);\n }\n \n", "prefixes": [ "35/79" ] }