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GET /api/patches/806668/?format=api
{ "id": 806668, "url": "http://patchwork.ozlabs.org/api/patches/806668/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1503939753-15164-2-git-send-email-jteki@openedev.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503939753-15164-2-git-send-email-jteki@openedev.com>", "list_archive_url": null, "date": "2017-08-28T17:02:31", "name": "[U-Boot,1/3] rk3288: vyasa: Add TPL support", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "b8523a2cb72ab721ec9fa8a882ad87ff887f4d86", "submitter": { "id": 20045, "url": "http://patchwork.ozlabs.org/api/people/20045/?format=api", "name": "Jagan Teki", "email": "jagannadh.teki@gmail.com" }, "delegate": { "id": 69486, "url": "http://patchwork.ozlabs.org/api/users/69486/?format=api", "username": "ptomsich", "first_name": "Philipp", "last_name": "Tomsich", "email": "philipp.tomsich@theobroma-systems.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1503939753-15164-2-git-send-email-jteki@openedev.com/mbox/", "series": [ { "id": 219, "url": "http://patchwork.ozlabs.org/api/series/219/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=219", "date": "2017-08-28T17:02:30", "name": "rk3288: Falcon mode support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/219/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806668/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806668/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"C+pn9sTn\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgyn01VM6z9sNn\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 03:04:52 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid E70D0C2255E; Mon, 28 Aug 2017 17:03:46 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 0F1EBC22572;\n\tMon, 28 Aug 2017 17:03:34 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid DA421C22583; Mon, 28 Aug 2017 17:03:03 +0000 (UTC)", "from mail-pf0-f195.google.com (mail-pf0-f195.google.com\n\t[209.85.192.195])\n\tby lists.denx.de (Postfix) with ESMTPS id 371A8C22570\n\tfor <u-boot@lists.denx.de>; Mon, 28 Aug 2017 17:02:59 +0000 (UTC)", "by mail-pf0-f195.google.com with SMTP id k3so675454pfc.3\n\tfor <u-boot@lists.denx.de>; Mon, 28 Aug 2017 10:02:59 -0700 (PDT)", "from localhost.localdomain ([115.97.191.18])\n\tby smtp.gmail.com with ESMTPSA id\n\tg67sm1381528pfk.174.2017.08.28.10.02.54\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tMon, 28 Aug 2017 10:02:56 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=WiUzDGDsEY21Qsi8kNUr7XACd96CtT741ui7lHh0XEQ=;\n\tb=C+pn9sTnk1dkaaJdx6qmKc8Tze9TU+usJU9BnFEfFx6e7YXfGbu2oUjV8Kiug++m7B\n\t6oBR4b2DVelTJROWYGsZeAqYosNOB1+Zu7S0PEompT6hxO4p9SBdRHqecmuLWtnh2Wmu\n\t/oND/4KJh10Bd33Rnbfe8vHBx/ijtBrGOTjBfxujxhF9vY3ASbdjZ+4OtvhtJCtKFM5X\n\t519VNZYyXfqCAw9tmsZRoaDDI4e/NOpIPd4XAEBtpOJg4oatfFizCzO4Xie8p9dKbkdx\n\t5jVal9qux/I91GBeyJVBrXAhp7j41G08JZu+AVnjNzWlTuj69LD59F8Lq3n1uNvNBtld\n\tz8aQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=WiUzDGDsEY21Qsi8kNUr7XACd96CtT741ui7lHh0XEQ=;\n\tb=M0yTu7zlwhvYc4n2nUF2YJzvR2CwjYYFgK64sTcbDqOqSOAYVTGy+m/EeduP/XI3SN\n\tnpaQgh9/Q1QP8LydalQ/uetOnnmDD1WmuF2zRBBwhUhoNKcGsXU4l9Jm9Elf9P+BXycb\n\tRYqECPskAggRkri2plSOaBFIyXUgCAnuoizu7fMsZBGkPlcvY3I2Vatqp6NHgaRBLG9o\n\tWx2HFAx1RKPAuKPhMt1RXRinGLfyYFeSH0TPXlLNQU7jECL8xF66nD0S1VmE5D0ZsZvT\n\tKJg1CBVbNrAdgKFSYhqU4NSiFu6DVVL73D4xL5E1h8UDEfGy17KdlxGr4O1bj181qz79\n\tgfhg==", "X-Gm-Message-State": "AHYfb5gizktKi2Rax4kfn3qI7KzJVADqJksCt/va25MunJvPPpDuB7qQ\n\tNy83l+1MFUpfAg==", "X-Received": "by 10.84.216.78 with SMTP id f14mr1558091plj.191.1503939777787; \n\tMon, 28 Aug 2017 10:02:57 -0700 (PDT)", "From": "Jagan Teki <jagannadh.teki@gmail.com>", "X-Google-Original-From": "Jagan Teki <jteki@openedev.com>", "To": "Simon Glass <sjg@chromium.org>", "Date": "Mon, 28 Aug 2017 22:32:31 +0530", "Message-Id": "<1503939753-15164-2-git-send-email-jteki@openedev.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1503939753-15164-1-git-send-email-jteki@openedev.com>", "References": "<1503939753-15164-1-git-send-email-jteki@openedev.com>", "Cc": "u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH 1/3] rk3288: vyasa: Add TPL support", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Jagan Teki <jagan@amarulasolutions.com>\n\nSince the size of SPL can't be exceeded 0x8000 bytes in RK3288,\nit is not possible add new SPL features like Falcon mode or etc.\n\nSo add TPL stage so-that adding new features to SPL is possible.\n- TPL: DRAM init, clocks\n- SPL: MMC, falcon, etc\n\nBooting from SD with TPL:\n------------------------\nU-Boot TPL 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54)\nTrying to boot from BOOTROM\nReturning to boot ROM...\n\nU-Boot SPL 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54)\nTrying to boot from MMC1\n\nU-Boot 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54 +0530)\n\nModel: Amarula Vyasa-RK3288\nDRAM: 2 GiB\nMMC: dwmmc@ff0c0000: 1\nUsing default environment\n\nIn: serial@ff690000\nOut: serial@ff690000\nErr: serial@ff690000\nModel: Amarula Vyasa-RK3288\nNet: Net Initialization Skipped\nNo ethernet found.\nHit any key to stop autoboot: 0\n=>\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\nNote:\nRight now TPL added in vyasa board, ie reason some clock code\nis duplicate in SPL and TPL. Once all rk3288 agree the will remove\nduplicates.\n\n arch/arm/mach-rockchip/Makefile | 1 +\n arch/arm/mach-rockchip/rk3288-board-spl.c | 3 +\n arch/arm/mach-rockchip/rk3288-board-tpl.c | 124 ++++++++++++++++++++++++++++++\n arch/arm/mach-rockchip/rk3288/Kconfig | 15 ++++\n configs/vyasa-rk3288_defconfig | 2 +\n doc/README.rockchip | 18 +++++\n include/configs/rk3288_common.h | 8 +-\n 7 files changed, 170 insertions(+), 1 deletion(-)\n create mode 100644 arch/arm/mach-rockchip/rk3288-board-tpl.c", "diff": "diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile\nindex 79e9704..daafc8d 100644\n--- a/arch/arm/mach-rockchip/Makefile\n+++ b/arch/arm/mach-rockchip/Makefile\n@@ -12,6 +12,7 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o\n obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o\n \n obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o\n+obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o\n obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o\n \n obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o\ndiff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c\nindex 6b7bf85..febc1ef 100644\n--- a/arch/arm/mach-rockchip/rk3288-board-spl.c\n+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c\n@@ -243,12 +243,15 @@ void board_init_f(ulong dummy)\n \t}\n #endif\n \n+#if !defined(CONFIG_SUPPORT_TPL)\n \tdebug(\"\\nspl:init dram\\n\");\n \tret = uclass_get_device(UCLASS_RAM, 0, &dev);\n \tif (ret) {\n \t\tdebug(\"DRAM init failed: %d\\n\", ret);\n \t\treturn;\n \t}\n+#endif\n+\n #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)\n \tback_to_bootrom();\n #endif\ndiff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c\nnew file mode 100644\nindex 0000000..7a7fd05\n--- /dev/null\n+++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c\n@@ -0,0 +1,124 @@\n+/*\n+ * (C) Copyright 2015 Google, Inc\n+ *\n+ * SPDX-License-Identifier: GPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <debug_uart.h>\n+#include <dm.h>\n+#include <ram.h>\n+#include <spl.h>\n+#include <version.h>\n+#include <asm/io.h>\n+#include <asm/arch/bootrom.h>\n+#include <asm/arch/clock.h>\n+#include <asm/arch/periph.h>\n+#include <asm/arch/pmu_rk3288.h>\n+#include <asm/arch/timer.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+/* read L2 control register (L2CTLR) */\n+static inline uint32_t read_l2ctlr(void)\n+{\n+\tuint32_t val = 0;\n+\n+\tasm volatile (\"mrc p15, 1, %0, c9, c0, 2\" : \"=r\" (val));\n+\n+\treturn val;\n+}\n+\n+/* write L2 control register (L2CTLR) */\n+static inline void write_l2ctlr(uint32_t val)\n+{\n+\t/*\n+\t * Note: L2CTLR can only be written when the L2 memory system\n+\t * is idle, ie before the MMU is enabled.\n+\t */\n+\tasm volatile(\"mcr p15, 1, %0, c9, c0, 2\" : : \"r\" (val) : \"memory\");\n+\tisb();\n+}\n+\n+static void configure_l2ctlr(void)\n+{\n+\tuint32_t l2ctlr;\n+\n+\tl2ctlr = read_l2ctlr();\n+\tl2ctlr &= 0xfffc0000; /* clear bit0~bit17 */\n+\n+\t/*\n+\t* Data RAM write latency: 2 cycles\n+\t* Data RAM read latency: 2 cycles\n+\t* Data RAM setup latency: 1 cycle\n+\t* Tag RAM write latency: 1 cycle\n+\t* Tag RAM read latency: 1 cycle\n+\t* Tag RAM setup latency: 1 cycle\n+\t*/\n+\tl2ctlr |= (1 << 3 | 1 << 0);\n+\twrite_l2ctlr(l2ctlr);\n+}\n+\n+\n+void board_init_f(ulong dummy)\n+{\n+\tstruct udevice *dev;\n+\tint ret;\n+\n+\t/* Example code showing how to enable the debug UART on RK3288 */\n+#include <asm/arch/grf_rk3288.h>\n+\t/* Enable early UART on the RK3288 */\n+#define GRF_BASE\t0xff770000\n+\tstruct rk3288_grf * const grf = (void *)GRF_BASE;\n+\n+\trk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |\n+\t\t GPIO7C6_MASK << GPIO7C6_SHIFT,\n+\t\t GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |\n+\t\t GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);\n+\t/*\n+\t * Debug UART can be used from here if required:\n+\t *\n+\t * debug_uart_init();\n+\t * printch('a');\n+\t * printhex8(0x1234);\n+\t * printascii(\"string\");\n+\t */\n+\tdebug_uart_init();\n+\n+\tret = spl_early_init();\n+\tif (ret) {\n+\t\tdebug(\"spl_early_init() failed: %d\\n\", ret);\n+\t\thang();\n+\t}\n+\n+\trockchip_timer_init();\n+\tconfigure_l2ctlr();\n+\n+\tret = rockchip_get_clk(&dev);\n+\tif (ret) {\n+\t\tdebug(\"CLK init failed: %d\\n\", ret);\n+\t\treturn;\n+\t}\n+\n+\tret = uclass_get_device(UCLASS_RAM, 0, &dev);\n+\tif (ret) {\n+\t\tdebug(\"DRAM init failed: %d\\n\", ret);\n+\t\treturn;\n+\t}\n+}\n+\n+void board_return_to_bootrom(void)\n+{\n+\tback_to_bootrom();\n+}\n+\n+u32 spl_boot_device(void)\n+{\n+\treturn BOOT_DEVICE_BOOTROM;\n+}\n+\n+void spl_board_init(void)\n+{\n+\tputs(\"\\nU-Boot TPL \" PLAIN_VERSION \" (\" U_BOOT_DATE \" - \" \\\n+\t\t\t\tU_BOOT_TIME \")\\n\");\n+}\ndiff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig\nindex 4ad2940..833073d 100644\n--- a/arch/arm/mach-rockchip/rk3288/Kconfig\n+++ b/arch/arm/mach-rockchip/rk3288/Kconfig\n@@ -87,6 +87,21 @@ config TARGET_POPMETAL_RK3288\n config TARGET_VYASA_RK3288\n \tbool \"Vyasa-RK3288\"\n \tselect BOARD_LATE_INIT\n+\tselect TPL\n+\tselect SUPPORT_TPL\n+\tselect TPL_DM\n+\tselect TPL_REGMAP\n+\tselect TPL_SYSCON\n+\tselect TPL_CLK\n+\tselect TPL_RAM\n+\tselect TPL_OF_PLATDATA\n+\tselect TPL_OF_CONTROL\n+\tselect TPL_BOOTROM_SUPPORT\n+\tselect ROCKCHIP_BROM_HELPER\n+\tselect TPL_DRIVERS_MISC_SUPPORT\n+\tselect TPL_LIBCOMMON_SUPPORT\n+\tselect TPL_LIBGENERIC_SUPPORT\n+\tselect TPL_SERIAL_SUPPORT\n \thelp\n \t Vyasa is a RK3288-based development board with 2 USB ports,\n \t HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It\ndiff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig\nindex 7db7b0b..239409f 100644\n--- a/configs/vyasa-rk3288_defconfig\n+++ b/configs/vyasa-rk3288_defconfig\n@@ -1,4 +1,6 @@\n CONFIG_ARM=y\n+# CONFIG_SPL_USE_ARCH_MEMCPY is not set\n+# CONFIG_SPL_USE_ARCH_MEMSET is not set\n CONFIG_ARCH_ROCKCHIP=y\n CONFIG_SYS_MALLOC_F_LEN=0x2000\n CONFIG_ROCKCHIP_RK3288=y\ndiff --git a/doc/README.rockchip b/doc/README.rockchip\nindex 12fec38..4b7be0b 100644\n--- a/doc/README.rockchip\n+++ b/doc/README.rockchip\n@@ -150,6 +150,24 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, th\n debug uart must be disabled\n \n \n+Booting from an SD card on RK3288 with TPL\n+==========================================\n+\n+Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add\n+new SPL features like Falcon mode or etc.\n+\n+So introduce TPL so-that adding new features to SPL is possible because now TPL should\n+run minimal with code like DDR, clock etc and rest of new features in SPL.\n+\n+As of now TPL is added on Vyasa-RK3288 board.\n+\n+To write an image that boots from an SD card (assumed to be /dev/mmcblk0):\n+\n+ ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out &&\n+ cat ./spl/u-boot-spl-dtb.bin >> out &&\n+ sudo dd if=out of=/dev/mmcblk0 seek=64 &&\n+ sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256\n+\n Booting from an SD card on RK3188\n =================================\n \ndiff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h\nindex ade6caf..e3e59c2 100644\n--- a/include/configs/rk3288_common.h\n+++ b/include/configs/rk3288_common.h\n@@ -33,7 +33,13 @@\n #define CONFIG_SYS_INIT_SP_ADDR\t\t0x00100000\n #define CONFIG_SYS_LOAD_ADDR\t\t0x00800800\n #define CONFIG_SPL_STACK\t\t0xff718000\n-#define CONFIG_SPL_TEXT_BASE\t\t0xff704004\n+#ifdef CONFIG_TPL_BUILD\n+# define CONFIG_SPL_TEXT_BASE\t\t0xff704004\n+#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)\n+# define CONFIG_SPL_TEXT_BASE\t\t0x0\n+#else\n+# define CONFIG_SPL_TEXT_BASE\t\t0xff704004\n+#endif\n \n /* MMC/SD IP block */\n #define CONFIG_BOUNCE_BUFFER\n", "prefixes": [ "U-Boot", "1/3" ] }