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GET /api/patches/806663/?format=api
{ "id": 806663, "url": "http://patchwork.ozlabs.org/api/patches/806663/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1503939484-21490-1-git-send-email-jteki@openedev.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503939484-21490-1-git-send-email-jteki@openedev.com>", "list_archive_url": null, "date": "2017-08-28T16:58:04", "name": "[U-Boot,v2] rk3288: Add Vyasa initial board support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "55915467aac3d0f80eda1d195386e1d794a3e5db", "submitter": { "id": 20045, "url": "http://patchwork.ozlabs.org/api/people/20045/?format=api", "name": "Jagan Teki", "email": "jagannadh.teki@gmail.com" }, "delegate": { "id": 69486, "url": "http://patchwork.ozlabs.org/api/users/69486/?format=api", "username": "ptomsich", "first_name": "Philipp", "last_name": "Tomsich", "email": "philipp.tomsich@theobroma-systems.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1503939484-21490-1-git-send-email-jteki@openedev.com/mbox/", "series": [ { "id": 217, "url": "http://patchwork.ozlabs.org/api/series/217/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=217", "date": "2017-08-28T16:58:04", "name": "[U-Boot,v2] rk3288: Add Vyasa initial board support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/217/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806663/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806663/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"RtGDkHum\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgydt015fz9s7m\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 02:58:41 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid B10C8C22524; Mon, 28 Aug 2017 16:58:37 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 003C6C22524;\n\tMon, 28 Aug 2017 16:58:33 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid B4D0DC21E09; Mon, 28 Aug 2017 16:58:26 +0000 (UTC)", "from mail-pg0-f68.google.com (mail-pg0-f68.google.com\n\t[74.125.83.68])\n\tby lists.denx.de (Postfix) with ESMTPS id 6DCB8C22573\n\tfor <u-boot@lists.denx.de>; Mon, 28 Aug 2017 16:58:18 +0000 (UTC)", "by mail-pg0-f68.google.com with SMTP id m15so784539pgc.0\n\tfor <u-boot@lists.denx.de>; Mon, 28 Aug 2017 09:58:18 -0700 (PDT)", "from localhost.localdomain ([115.97.191.18])\n\tby smtp.gmail.com with ESMTPSA id\n\ta5sm1486090pgn.1.2017.08.28.09.58.12\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tMon, 28 Aug 2017 09:58:14 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id;\n\tbh=ecx8OqcCJyHviNJno8lLq6E1m+7TL+bYjskD0ebAJ8w=;\n\tb=RtGDkHumI08TuHFKLk0CwaoXyCvtWI3/DFtqol2ggbgtKEpD01tttfFmpTSibR42Aw\n\ti2CfFvQb0rG0khEbcIMeM+Q/TlA35yi5dXXnoXt5xmTR03mTZL33s82YULBVkBwxg3br\n\tJevwg/E3ZCoK2+BZw35jdfiJQEn6PoNMJeEeKsjmvO0aF5zFa3wkE8tCqC2aoidY38lg\n\tzzSqSVsVXztIYcK7ivN0fDs032t3oQyBoV9qdO83tYRifvU5/mibnv8EmzB2zDIkhwGp\n\tnskKn7euDeP6tdvTcKzieVtFu0M3NMUGc4kmHKf9SHDPZ32kZwk+KpFVheq29/J1sDLE\n\tcGCw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=ecx8OqcCJyHviNJno8lLq6E1m+7TL+bYjskD0ebAJ8w=;\n\tb=h3T+NbcmiqefmLtU5rhCr+2s83DkrCJwPXwjnmGHbKHGmmu2blargTZDBQfS4GdLdp\n\tdYqbPxwco1O+DnFvBB9iSh0dI6t7dNRWFtZurkLlJu3BpiUwUf6or23WUe1lxfUfem43\n\tB3VTLcqniBMD+naP4BNqHHtoj3vdrqctTBpiFdlOXA0fZomcu+TrSTVvLfMLgII/sGGC\n\tLQDQq1jH5cRdASxTuhhUnpFVulAw7+VM2hbXFwrzRbZ/yS9mgGnss9ZEYjmhjQjzeM/O\n\tNcnKy+tLk/8s7fAC4E1wPbY1lAN3RMicjSnOSSQ7CULPpdTDFcXmZn0KpYZWqJooj5qJ\n\tfK1Q==", "X-Gm-Message-State": "AHYfb5guOTZt5pDxFo4fXv9s1mSMxXWDgtnrjXOxiTPPdV5Hq12xGZdU\n\tDzdoaCMWqW4Vpw==", "X-Received": "by 10.98.196.16 with SMTP id y16mr1214551pff.218.1503939496792; \n\tMon, 28 Aug 2017 09:58:16 -0700 (PDT)", "From": "Jagan Teki <jagannadh.teki@gmail.com>", "X-Google-Original-From": "Jagan Teki <jteki@openedev.com>", "To": "Simon Glass <sjg@chromium.org>", "Date": "Mon, 28 Aug 2017 22:28:04 +0530", "Message-Id": "<1503939484-21490-1-git-send-email-jteki@openedev.com>", "X-Mailer": "git-send-email 2.7.4", "Cc": "u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH v2] rk3288: Add Vyasa initial board support", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Jagan Teki <jagan@amarulasolutions.com>\n\nThis patch adds support for Vyasa RK3288 initial board\nfrom Amarula.\n\nBoot from SDMMC:\n---------------\nU-Boot SPL 2017.09-rc1-00111-g3656991-dirty (Aug 10 2017 - 11:40:45)\nTrying to boot from MMC1\n\nU-Boot 2017.09-rc1-00111-g3656991-dirty (Aug 10 2017 - 11:40:45 +0530)\n\nModel: Amarula Vyasa-RK3288\nDRAM: 2 GiB\nMMC: dwmmc@ff0c0000: 1\n*** Warning - bad CRC, using default environment\n\nIn: serial@ff690000\nOut: serial@ff690000\nErr: serial@ff690000\nModel: Amarula Vyasa-RK3288\nNet: Net Initialization Skipped\nNo ethernet found.\nHit any key to stop autoboot: 0\n=>\n\nReviewed-by: Simon Glass <sjg@chromium.org>\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\nChanges for v2:\n- Fix commit message\n- Move CONFIG_ENV_IS_IN_MMC to configs\n\n arch/arm/dts/Makefile | 1 +\n arch/arm/dts/rk3288-vyasa.dts | 327 ++++++++++++++++++++++++++++++\n arch/arm/mach-rockchip/rk3288/Kconfig | 11 +\n board/amarula/vyasa-rk3288/Kconfig | 12 ++\n board/amarula/vyasa-rk3288/MAINTAINERS | 6 +\n board/amarula/vyasa-rk3288/Makefile | 7 +\n board/amarula/vyasa-rk3288/vyasa-rk3288.c | 7 +\n configs/vyasa-rk3288_defconfig | 63 ++++++\n include/configs/vyasa-rk3288.h | 23 +++\n 9 files changed, 457 insertions(+)\n create mode 100644 arch/arm/dts/rk3288-vyasa.dts\n create mode 100644 board/amarula/vyasa-rk3288/Kconfig\n create mode 100644 board/amarula/vyasa-rk3288/MAINTAINERS\n create mode 100644 board/amarula/vyasa-rk3288/Makefile\n create mode 100644 board/amarula/vyasa-rk3288/vyasa-rk3288.c\n create mode 100644 configs/vyasa-rk3288_defconfig\n create mode 100644 include/configs/vyasa-rk3288.h", "diff": "diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex d07715f..371511b 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -41,6 +41,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \\\n \trk3288-veyron-jerry.dtb \\\n \trk3288-veyron-mickey.dtb \\\n \trk3288-veyron-minnie.dtb \\\n+\trk3288-vyasa.dtb \\\n \trk3328-evb.dtb \\\n \trk3368-lion.dtb \\\n \trk3368-sheep.dtb \\\ndiff --git a/arch/arm/dts/rk3288-vyasa.dts b/arch/arm/dts/rk3288-vyasa.dts\nnew file mode 100644\nindex 0000000..93a9c5e\n--- /dev/null\n+++ b/arch/arm/dts/rk3288-vyasa.dts\n@@ -0,0 +1,327 @@\n+/*\n+ * Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com>\n+ *\n+ * This file is dual-licensed: you can use it either under the terms\n+ * of the GPL or the X11 license, at your option. Note that this dual\n+ * licensing only applies to this file, and not this project as a\n+ * whole.\n+ *\n+ * a) This file is free software; you can redistribute it and/or\n+ * modify it under the terms of the GNU General Public License as\n+ * published by the Free Software Foundation; either version 2 of the\n+ * License, or (at your option) any later version.\n+ *\n+ * This file is distributed in the hope that it will be useful,\n+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n+ * GNU General Public License for more details.\n+ *\n+ * Or, alternatively,\n+ *\n+ * b) Permission is hereby granted, free of charge, to any person\n+ * obtaining a copy of this software and associated documentation\n+ * files (the \"Software\"), to deal in the Software without\n+ * restriction, including without limitation the rights to use,\n+ * copy, modify, merge, publish, distribute, sublicense, and/or\n+ * sell copies of the Software, and to permit persons to whom the\n+ * Software is furnished to do so, subject to the following\n+ * conditions:\n+ *\n+ * The above copyright notice and this permission notice shall be\n+ * included in all copies or substantial portions of the Software.\n+ *\n+ * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND,\n+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES\n+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND\n+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT\n+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,\n+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR\n+ * OTHER DEALINGS IN THE SOFTWARE.\n+ */\n+\n+/dts-v1/;\n+#include \"rk3288.dtsi\"\n+\n+/ {\n+\tmodel = \"Amarula Vyasa-RK3288\";\n+\tcompatible = \"amarula,vyasa-rk3288\", \"rockchip,rk3288\";\n+\n+\tchosen {\n+\t\tstdout-path = &uart2;\n+\t};\n+\n+\tmemory {\n+\t\tdevice_type = \"memory\";\n+\t\treg = <0 0x80000000>;\n+\t};\n+\n+\tvcc_sd: sdmmc-regulator {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tgpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&sdmmc_pwr>;\n+\t\tregulator-name = \"vcc_sd\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\t\tstartup-delay-us = <100000>;\n+\t\tvin-supply = <&vcc_io>;\n+\t};\n+\n+\tvcc_sys: vsys-regulator {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"vcc_sys\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tregulator-always-on;\n+\t\tregulator-boot-on;\n+\t};\n+};\n+\n+&dmc {\n+\trockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa\n+\t\t0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7\n+\t\t0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0\n+\t\t0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0\n+\t\t0x5 0x0>;\n+\trockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200\n+\t\t0xa60 0x40 0x10 0x0>;\n+\t/* Add a dummy value to cause of-platdata think this is bytes */\n+\trockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;\n+};\n+\n+&cpu0 {\n+\tcpu0-supply = <&vdd_cpu>;\n+};\n+\n+&i2c0 {\n+\tclock-frequency = <400000>;\n+\tstatus = \"okay\";\n+\n+\trk808: pmic@1b {\n+\t\tcompatible = \"rockchip,rk808\";\n+\t\treg = <0x1b>;\n+\t\tinterrupt-parent = <&gpio0>;\n+\t\tinterrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&pmic_int &global_pwroff>;\n+\t\twakeup-source;\n+\t\trockchip,system-power-controller;\n+\t\t#clock-cells = <1>;\n+\t\tclock-output-names = \"xin32k\", \"rk808-clkout2\";\n+\n+\t\tvcc1-supply = <&vcc_sys>;\n+\t\tvcc2-supply = <&vcc_sys>;\n+\t\tvcc3-supply = <&vcc_sys>;\n+\t\tvcc4-supply = <&vcc_sys>;\n+\t\tvcc6-supply = <&vcc_sys>;\n+\t\tvcc7-supply = <&vcc_sys>;\n+\t\tvcc8-supply = <&vcc_io>;\n+\t\tvcc9-supply = <&vcc_sys>;\n+\t\tvcc10-supply = <&vcc_sys>;\n+\t\tvcc11-supply = <&vcc_sys>;\n+\t\tvcc12-supply = <&vcc_io>;\n+\n+\t\tregulators {\n+\t\t\tvdd_cpu: vdd_log: DCDC_REG1 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <750000>;\n+\t\t\t\tregulator-max-microvolt = <1350000>;\n+\t\t\t\tregulator-name = \"vdd_log\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-off-in-suspend;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvdd_gpu: DCDC_REG2 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <850000>;\n+\t\t\t\tregulator-max-microvolt = <1250000>;\n+\t\t\t\tregulator-name = \"vdd_gpu\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <1000000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc_ddr: DCDC_REG3 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-name = \"vcc_ddr\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc_io: DCDC_REG4 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc_io\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <3300000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcca_tp: LDO_REG1 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc_tp\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <3300000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc_codec: LDO_REG2 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc_codec\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-off-in-suspend;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvdd_10: LDO_REG3 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <1000000>;\n+\t\t\t\tregulator-max-microvolt = <1000000>;\n+\t\t\t\tregulator-name = \"vdd_10\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <1000000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc_gps: LDO_REG4 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <1800000>;\n+\t\t\t\tregulator-name = \"vcc_gps\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <1800000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvccio_sd: LDO_REG5 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vccio_sd\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <3300000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc10_lcd: LDO_REG6 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <1000000>;\n+\t\t\t\tregulator-max-microvolt = <1000000>;\n+\t\t\t\tregulator-name = \"vcc10_lcd\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <1800000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc_18: LDO_REG7 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <1800000>;\n+\t\t\t\tregulator-name = \"vcc_18\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <1800000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc18_lcd: LDO_REG8 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <1800000>;\n+\t\t\t\tregulator-name = \"vcc18_lcd\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t\tregulator-suspend-microvolt = <1800000>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc33_sd: SWITCH_REG1 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc33_sd\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tvcc_lan: SWITCH_REG2 {\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-name = \"vcc_lan\";\n+\t\t\t\tregulator-state-mem {\n+\t\t\t\t\tregulator-on-in-suspend;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&sdmmc {\n+\tu-boot,dm-pre-reloc;\n+\tstatus = \"okay\";\n+\n+\tbus-width = <4>;\n+\tcap-mmc-highspeed;\n+\tcap-sd-highspeed;\n+\tcard-detect-delay = <200>;\n+\tdisable-wp;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;\n+\tvmmc-supply = <&vcc_sd>;\n+\tvqmmc-supply = <&vccio_sd>;\n+};\n+\n+&uart2 {\n+\tu-boot,dm-pre-reloc;\n+\tstatus = \"okay\";\n+};\n+\n+&wdt {\n+\tstatus = \"okay\";\n+};\n+\n+&pinctrl {\n+\tu-boot,dm-pre-reloc;\n+\tpmic {\n+\t\tpmic_int: pmic-int {\n+\t\t\trockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;\n+\t\t};\n+\t};\n+\n+\tsdmmc {\n+\t\tsdmmc_pwr: sdmmc-pwr {\n+\t\t\trockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig\nindex 53cc9a0..4ad2940 100644\n--- a/arch/arm/mach-rockchip/rk3288/Kconfig\n+++ b/arch/arm/mach-rockchip/rk3288/Kconfig\n@@ -84,6 +84,15 @@ config TARGET_POPMETAL_RK3288\n \t 2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,\n \t GPIOs and display interface.\n \n+config TARGET_VYASA_RK3288\n+\tbool \"Vyasa-RK3288\"\n+\tselect BOARD_LATE_INIT\n+\thelp\n+\t Vyasa is a RK3288-based development board with 2 USB ports,\n+\t HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It\n+\t also includes on-board eMMC and 2GB of SDRAM. Expansion connectors\n+\t provide access to display pins, I2C, SPI, UART and GPIOs.\n+\n config TARGET_ROCK2\n \tbool \"Radxa Rock 2\"\n \tselect BOARD_LATE_INIT\n@@ -129,6 +138,8 @@ config SPL_LIBGENERIC_SUPPORT\n config SPL_SERIAL_SUPPORT\n \tdefault y\n \n+source \"board/amarula/vyasa-rk3288/Kconfig\"\n+\n source \"board/chipspark/popmetal_rk3288/Kconfig\"\n \n source \"board/firefly/firefly-rk3288/Kconfig\"\ndiff --git a/board/amarula/vyasa-rk3288/Kconfig b/board/amarula/vyasa-rk3288/Kconfig\nnew file mode 100644\nindex 0000000..8b8c308\n--- /dev/null\n+++ b/board/amarula/vyasa-rk3288/Kconfig\n@@ -0,0 +1,12 @@\n+if TARGET_VYASA_RK3288\n+\n+config SYS_BOARD\n+\tdefault \"vyasa-rk3288\"\n+\n+config SYS_VENDOR\n+\tdefault \"amarula\"\n+\n+config SYS_CONFIG_NAME\n+\tdefault \"vyasa-rk3288\"\n+\n+endif\ndiff --git a/board/amarula/vyasa-rk3288/MAINTAINERS b/board/amarula/vyasa-rk3288/MAINTAINERS\nnew file mode 100644\nindex 0000000..a75c1bf\n--- /dev/null\n+++ b/board/amarula/vyasa-rk3288/MAINTAINERS\n@@ -0,0 +1,6 @@\n+RICO\n+M:\tJagan Teki <jagan@amarulasolutions.com>\n+S:\tMaintained\n+F:\tboard/amarula/vyasa-rk3288\n+F:\tinclude/configs/vyasa-rk3288.h\n+F:\tconfigs/vyasa-rk3288_defconfig\ndiff --git a/board/amarula/vyasa-rk3288/Makefile b/board/amarula/vyasa-rk3288/Makefile\nnew file mode 100644\nindex 0000000..7c0d5c0\n--- /dev/null\n+++ b/board/amarula/vyasa-rk3288/Makefile\n@@ -0,0 +1,7 @@\n+#\n+# Copyright (C) 2017 Amarula Solutions\n+#\n+# SPDX-License-Identifier: GPL-2.0+\n+#\n+\n+obj-y\t+= vyasa-rk3288.o\ndiff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c\nnew file mode 100644\nindex 0000000..ceee42c\n--- /dev/null\n+++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c\n@@ -0,0 +1,7 @@\n+/*\n+ * Copyright (C) 2017 Amarula Solutions\n+ *\n+ * SPDX-License-Identifier: GPL-2.0+\n+ */\n+\n+#include <common.h>\ndiff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig\nnew file mode 100644\nindex 0000000..7db7b0b\n--- /dev/null\n+++ b/configs/vyasa-rk3288_defconfig\n@@ -0,0 +1,63 @@\n+CONFIG_ARM=y\n+CONFIG_ARCH_ROCKCHIP=y\n+CONFIG_SYS_MALLOC_F_LEN=0x2000\n+CONFIG_ROCKCHIP_RK3288=y\n+CONFIG_TARGET_VYASA_RK3288=y\n+CONFIG_SPL_STACK_R_ADDR=0x80000\n+CONFIG_DEFAULT_DEVICE_TREE=\"rk3288-vyasa\"\n+CONFIG_DEBUG_UART=y\n+CONFIG_ENV_IS_IN_MMC=y\n+CONFIG_SILENT_CONSOLE=y\n+# CONFIG_DISPLAY_CPUINFO is not set\n+CONFIG_SPL_STACK_R=y\n+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000\n+# CONFIG_CMD_IMLS is not set\n+CONFIG_CMD_GPT=y\n+CONFIG_CMD_MMC=y\n+CONFIG_CMD_I2C=y\n+CONFIG_CMD_GPIO=y\n+# CONFIG_CMD_SETEXPR is not set\n+CONFIG_CMD_CACHE=y\n+CONFIG_CMD_TIME=y\n+CONFIG_CMD_PMIC=y\n+CONFIG_CMD_REGULATOR=y\n+# CONFIG_SPL_DOS_PARTITION is not set\n+# CONFIG_SPL_ISO_PARTITION is not set\n+# CONFIG_SPL_EFI_PARTITION is not set\n+CONFIG_SPL_PARTITION_UUIDS=y\n+CONFIG_SPL_OF_CONTROL=y\n+CONFIG_OF_SPL_REMOVE_PROPS=\"pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents\"\n+CONFIG_REGMAP=y\n+CONFIG_SPL_REGMAP=y\n+CONFIG_SYSCON=y\n+CONFIG_SPL_SYSCON=y\n+# CONFIG_SPL_SIMPLE_BUS is not set\n+CONFIG_CLK=y\n+CONFIG_SPL_CLK=y\n+CONFIG_ROCKCHIP_GPIO=y\n+CONFIG_SYS_I2C_ROCKCHIP=y\n+CONFIG_LED=y\n+CONFIG_LED_GPIO=y\n+CONFIG_MMC_DW=y\n+CONFIG_MMC_DW_ROCKCHIP=y\n+CONFIG_PINCTRL=y\n+CONFIG_SPL_PINCTRL=y\n+# CONFIG_SPL_PINCTRL_FULL is not set\n+CONFIG_PINCTRL_ROCKCHIP_RK3288=y\n+CONFIG_DM_PMIC=y\n+# CONFIG_SPL_PMIC_CHILDREN is not set\n+CONFIG_PMIC_RK8XX=y\n+CONFIG_REGULATOR_RK8XX=y\n+CONFIG_DM_REGULATOR_FIXED=y\n+CONFIG_PWM_ROCKCHIP=y\n+CONFIG_RAM=y\n+CONFIG_SPL_RAM=y\n+CONFIG_DEBUG_UART_BASE=0xff690000\n+CONFIG_DEBUG_UART_CLOCK=24000000\n+CONFIG_DEBUG_UART_SHIFT=2\n+CONFIG_SYS_NS16550=y\n+CONFIG_SYSRESET=y\n+CONFIG_CONSOLE_SCROLL_LINES=10\n+CONFIG_USE_TINY_PRINTF=y\n+CONFIG_CMD_DHRYSTONE=y\n+CONFIG_ERRNO_STR=y\ndiff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h\nnew file mode 100644\nindex 0000000..93ab7e7\n--- /dev/null\n+++ b/include/configs/vyasa-rk3288.h\n@@ -0,0 +1,23 @@\n+/*\n+ * Copyright (C) 2017 Amarula Solutions\n+ *\n+ * Configuration settings for Amarula Vyasa RK3288.\n+ *\n+ * SPDX-License-Identifier: GPL-2.0+\n+ */\n+\n+#ifndef __CONFIG_H\n+#define __CONFIG_H\n+\n+#define ROCKCHIP_DEVICE_SETTINGS\n+#include <configs/rk3288_common.h>\n+\n+#undef BOOT_TARGET_DEVICES\n+\n+#define BOOT_TARGET_DEVICES(func) \\\n+\tfunc(MMC, mmc, 1) \\\n+\n+#define CONFIG_ENV_IS_IN_MMC\n+#define CONFIG_SYS_MMC_ENV_DEV 1\n+\n+#endif\n", "prefixes": [ "U-Boot", "v2" ] }