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GET /api/patches/806636/?format=api
{ "id": 806636, "url": "http://patchwork.ozlabs.org/api/patches/806636/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20170828153039.27088-1-jlu@pengutronix.de/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170828153039.27088-1-jlu@pengutronix.de>", "list_archive_url": null, "date": "2017-08-28T15:30:39", "name": "[RFC] ARM: Orion: Check DRAM window size", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "90f1c5896bb39c2f80ef9221ce66aeae6a9e6b6c", "submitter": { "id": 16217, "url": "http://patchwork.ozlabs.org/api/people/16217/?format=api", "name": "Jan Lübbe", "email": "jlu@pengutronix.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20170828153039.27088-1-jlu@pengutronix.de/mbox/", "series": [ { "id": 197, "url": "http://patchwork.ozlabs.org/api/series/197/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=197", "date": "2017-08-28T15:30:39", "name": "[RFC] ARM: Orion: Check DRAM window size", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/197/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806636/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806636/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-pci-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgwhV0rtfz9sNn\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 01:30:50 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751318AbdH1Pas (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tMon, 28 Aug 2017 11:30:48 -0400", "from metis.ext.4.pengutronix.de ([92.198.50.35]:48513 \"EHLO\n\tmetis.ext.4.pengutronix.de\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1751232AbdH1Pas (ORCPT\n\t<rfc822; linux-pci@vger.kernel.org>); Mon, 28 Aug 2017 11:30:48 -0400", "from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7])\n\tby metis.ext.pengutronix.de with esmtps\n\t(TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.84_2)\n\t(envelope-from <jlu@pengutronix.de>)\n\tid 1dmLzw-0000kc-LO; Mon, 28 Aug 2017 17:30:44 +0200", "from jlu by dude.hi.pengutronix.de with local (Exim 4.89)\n\t(envelope-from <jlu@pengutronix.de>)\n\tid 1dmLzw-00073i-Bh; Mon, 28 Aug 2017 17:30:44 +0200" ], "From": "Jan Luebbe <jlu@pengutronix.de>", "To": "Gregory Clement <gregory.clement@free-electrons.com>,\n\tAndrew Lunn <andrew@lunn.ch>,\n\tThomas Petazzoni <thomas.petazzoni@free-electrons.com>,\n\tJason Cooper <jason@lakedaemon.net>", "Cc": "linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, kernel@pengutronix.de,\n\tJan Luebbe <jlu@pengutronix.de>", "Subject": "[RFC] ARM: Orion: Check DRAM window size", "Date": "Mon, 28 Aug 2017 17:30:39 +0200", "Message-Id": "<20170828153039.27088-1-jlu@pengutronix.de>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<20170828152517.24506-1-jlu@pengutronix.de>", "References": "<20170828152517.24506-1-jlu@pengutronix.de>", "X-SA-Exim-Connect-IP": "2001:67c:670:100:1d::7", "X-SA-Exim-Mail-From": "jlu@pengutronix.de", "X-SA-Exim-Scanned": "No (on metis.ext.pengutronix.de);\n\tSAEximRunCond expanded to false", "X-PTX-Original-Recipient": "linux-pci@vger.kernel.org", "Sender": "linux-pci-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-pci.vger.kernel.org>", "X-Mailing-List": "linux-pci@vger.kernel.org" }, "content": "This is a corresponding change as \"PCI: mvebu: Check DRAM window size\" applied\nto the Orion PCIe driver. I don't have the relevant hardware myself, but the\npatch may still be useful for someone who has. This is completely untested.\n\nSigned-off-by: Jan Luebbe <jlu@pengutronix.de>\n---\n arch/arm/mach-dove/pcie.c | 3 ++-\n arch/arm/mach-mv78xx0/pcie.c | 3 ++-\n arch/arm/mach-orion5x/pci.c | 3 ++-\n arch/arm/plat-orion/pcie.c | 19 +++++++++++++++----\n 4 files changed, 21 insertions(+), 7 deletions(-)", "diff": "diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c\nindex 91fe97144570..27e4689ee58d 100644\n--- a/arch/arm/mach-dove/pcie.c\n+++ b/arch/arm/mach-dove/pcie.c\n@@ -51,7 +51,8 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)\n \t */\n \torion_pcie_set_local_bus_nr(pp->base, sys->busnr);\n \n-\torion_pcie_setup(pp->base);\n+\tif (!orion_pcie_setup(pp->base))\n+\t\treturn 0;\n \n \tif (pp->index == 0)\n \t\tpci_ioremap_io(sys->busnr * SZ_64K, DOVE_PCIE0_IO_PHYS_BASE);\ndiff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c\nindex 81ff4327a962..3d17eeff44bf 100644\n--- a/arch/arm/mach-mv78xx0/pcie.c\n+++ b/arch/arm/mach-mv78xx0/pcie.c\n@@ -113,7 +113,8 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)\n \t * Generic PCIe unit setup.\n \t */\n \torion_pcie_set_local_bus_nr(pp->base, sys->busnr);\n-\torion_pcie_setup(pp->base);\n+\tif (!orion_pcie_setup(pp->base))\n+\t\treturn 0;\n \n \tpci_ioremap_io(nr * SZ_64K, MV78XX0_PCIE_IO_PHYS_BASE(nr));\n \ndiff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c\nindex ecb998e7f8dc..f7f830872cc9 100644\n--- a/arch/arm/mach-orion5x/pci.c\n+++ b/arch/arm/mach-orion5x/pci.c\n@@ -147,7 +147,8 @@ static int __init pcie_setup(struct pci_sys_data *sys)\n \t/*\n \t * Generic PCIe unit setup.\n \t */\n-\torion_pcie_setup(PCIE_BASE);\n+\tif (!orion_pcie_setup(PCIE_BASE))\n+\t\treturn 0;\n \n \t/*\n \t * Check whether to apply Orion-1/Orion-NAS PCIe config\ndiff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c\nindex 8b8c06d2e9c4..07ae382cf48a 100644\n--- a/arch/arm/plat-orion/pcie.c\n+++ b/arch/arm/plat-orion/pcie.c\n@@ -120,10 +120,10 @@ void __init orion_pcie_reset(void __iomem *base)\n * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks\n * WIN[0-3] -> DRAM bank[0-3]\n */\n-static void __init orion_pcie_setup_wins(void __iomem *base)\n+static int __init orion_pcie_setup_wins(void __iomem *base)\n {\n \tconst struct mbus_dram_target_info *dram;\n-\tu32 size;\n+\tu64 size;\n \tint i;\n \n \tdram = mv_mbus_dram_info();\n@@ -170,15 +170,23 @@ static void __init orion_pcie_setup_wins(void __iomem *base)\n \tif ((size & (size - 1)) != 0)\n \t\tsize = 1 << fls(size);\n \n+\tif (size > 0x100000000) {\n+\t\tpr_err(\"Could not configure DRAM window (too large): 0x%llx\\n\",\n+\t\t size);\n+\t\treturn 0;\n+\t}\n+\n \t/*\n \t * Setup BAR[1] to all DRAM banks.\n \t */\n \twritel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1));\n \twritel(0, base + PCIE_BAR_HI_OFF(1));\n \twritel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1));\n+\n+\treturn 1;\n }\n \n-void __init orion_pcie_setup(void __iomem *base)\n+int __init orion_pcie_setup(void __iomem *base)\n {\n \tu16 cmd;\n \tu32 mask;\n@@ -186,7 +194,8 @@ void __init orion_pcie_setup(void __iomem *base)\n \t/*\n \t * Point PCIe unit MBUS decode windows to DRAM space.\n \t */\n-\torion_pcie_setup_wins(base);\n+\tif (!orion_pcie_setup_wins(base))\n+\t\treturn 0;\n \n \t/*\n \t * Master + slave enable.\n@@ -203,6 +212,8 @@ void __init orion_pcie_setup(void __iomem *base)\n \tmask = readl(base + PCIE_MASK_OFF);\n \tmask |= 0x0f000000;\n \twritel(mask, base + PCIE_MASK_OFF);\n+\n+\treturn 1;\n }\n \n int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,\n", "prefixes": [ "RFC" ] }