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GET /api/patches/806557/?format=api
{ "id": 806557, "url": "http://patchwork.ozlabs.org/api/patches/806557/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170828143249.4c0791df@windsurf/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170828143249.4c0791df@windsurf>", "list_archive_url": null, "date": "2017-08-28T12:32:49", "name": "[U-Boot] I/O accessors on SuperH and endianness", "commit_ref": null, "pull_url": null, "state": "deferred", "archived": false, "hash": "b3dffe5600faa66d250a66d7c2b8c1ce6ea26041", "submitter": { "id": 2230, "url": "http://patchwork.ozlabs.org/api/people/2230/?format=api", "name": "Thomas Petazzoni", "email": "thomas.petazzoni@free-electrons.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170828143249.4c0791df@windsurf/mbox/", "series": [ { "id": 157, "url": "http://patchwork.ozlabs.org/api/series/157/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=157", "date": "2017-08-28T12:32:49", "name": "[U-Boot] I/O accessors on SuperH and endianness", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/157/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806557/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806557/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgrlR5XTNz9sNn\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 28 Aug 2017 22:33:07 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 5543EC224EF; Mon, 28 Aug 2017 12:32:56 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 6557AC224E3;\n\tMon, 28 Aug 2017 12:32:54 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 3F6BBC224E8; Mon, 28 Aug 2017 12:32:52 +0000 (UTC)", "from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54])\n\tby lists.denx.de (Postfix) with ESMTP id 000E9C224E1\n\tfor <u-boot@lists.denx.de>; Mon, 28 Aug 2017 12:32:49 +0000 (UTC)", "by mail.free-electrons.com (Postfix, from userid 110)\n\tid B15C821DEB; Mon, 28 Aug 2017 14:32:48 +0200 (CEST)", "from windsurf (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 8A36821DE9;\n\tMon, 28 Aug 2017 14:32:48 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "Date": "Mon, 28 Aug 2017 14:32:49 +0200", "From": "Thomas Petazzoni <thomas.petazzoni@free-electrons.com>", "To": "Nobuhiro Iwamatsu <iwamatsu@nigauri.org>,\n\tVladimir Zapolskiy <vz@mleia.com>", "Message-ID": "<20170828143249.4c0791df@windsurf>", "Organization": "Free Electrons", "X-Mailer": "Claws Mail 3.14.1 (GTK+ 2.24.31; x86_64-redhat-linux-gnu)", "MIME-Version": "1.0", "Cc": "u-boot@lists.denx.de", "Subject": "[U-Boot] I/O accessors on SuperH and endianness", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Hello,\n\nAs you've noticed, I'm porting U-Boot to a SH4 board running\nbig-endian. The big-endian choice cannot be changed, because it's\nselected by the HW design: moving to little endian would require a\nmodification of the board.\n\nThe serial_sh driver was working fine in big endian, with no change.\nHowever, the sh_eth driver was not working in big endian mode. After\ninvestigation, I realized that:\n\n - sh_serial is using the read/write (readb, writeb, readw, writew,\n etc.) macros to access I/O registers\n\n - sh_eth is using the in/out macros to access I/O registers\n\nThe in/out macros assume the device registers are little endian, so\nwhen the CPU is running big endian, they do an endianness conversion.\nHowever, on SuperH, when the CPU runs big endian, the device registers\nare also big endian, so there should be no endianness conversion.\n\nOn the other hand, read/write, when __mem_pci is not defined, do not do\nany endianness conversion. And this is why sh_serial was working out of\nthe box. Changing sh_eth to use read/write instead of in/out also made\nit work in big endian mode.\n\nHowever, if for some reason I enable PCI on this platform, __mem_pci\nwill be defined, and read/write will perform endianness conversion,\nbreaking support for the platform.\n\nSo what is the appropriate solution here? Use read/write like sh_serial\nis doing today, and ignore the potential problem? Use __raw_*()\nvariants everywhere? What if a driver is shared with another\nplatform/architecture where the devices remain little endian even if\nthe CPU is running big endian?\n\nBest regards,\n\nThomas\n\nFor the record, here is the current patch I have on sh_eth (a few other\nchanges are needed, but not directly related) :", "diff": "diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h\nindex a09a6d7..0e65f97 100644\n--- a/drivers/net/sh_eth.h\n+++ b/drivers/net/sh_eth.h\n@@ -675,11 +675,11 @@ static inline unsigned long sh_eth_reg_addr(struct sh_eth_dev *eth,\n static inline void sh_eth_write(struct sh_eth_dev *eth, unsigned long data,\n int enum_index)\n {\n- outl(data, sh_eth_reg_addr(eth, enum_index));\n+ writel(data, sh_eth_reg_addr(eth, enum_index));\n }\n \n static inline unsigned long sh_eth_read(struct sh_eth_dev *eth,\n int enum_index)\n {\n- return inl(sh_eth_reg_addr(eth, enum_index));\n+ return readl(sh_eth_reg_addr(eth, enum_index));\n }\n", "prefixes": [ "U-Boot" ] }