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{ "id": 806498, "url": "http://patchwork.ozlabs.org/api/patches/806498/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1503915996-11495-8-git-send-email-rajesh.bhagat@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503915996-11495-8-git-send-email-rajesh.bhagat@nxp.com>", "list_archive_url": null, "date": "2017-08-28T10:26:36", "name": "[U-Boot,v3,7/7] ls1088a: Add VID support for QDS and RDB platforms", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "5130b712aaa0485d8ba48afe83b27e26a443a9fa", "submitter": { "id": 68498, "url": "http://patchwork.ozlabs.org/api/people/68498/?format=api", "name": "Rajesh Bhagat", "email": "rajesh.bhagat@nxp.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1503915996-11495-8-git-send-email-rajesh.bhagat@nxp.com/mbox/", "series": [ { "id": 128, "url": "http://patchwork.ozlabs.org/api/series/128/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=128", "date": "2017-08-28T10:26:29", "name": "Add VID support for QDS and RDB platforms", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/128/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806498/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806498/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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Mon, 28 Aug 2017 03:26:51 -0700" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=BAD_ENC_HEADER,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL,\n\tSPF_HELO_PASS\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Rajesh Bhagat <rajesh.bhagat@nxp.com>", "To": "<u-boot@lists.denx.de>", "Date": "Mon, 28 Aug 2017 15:56:36 +0530", "Message-ID": "<1503915996-11495-8-git-send-email-rajesh.bhagat@nxp.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1503915996-11495-1-git-send-email-rajesh.bhagat@nxp.com>", "References": "<1503915996-11495-1-git-send-email-rajesh.bhagat@nxp.com>", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131483896139803747;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); 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BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:BN6PR03MB3313; ", "X-Forefront-PRVS": "0413C9F1ED", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "28 Aug 2017 10:26:53.8087\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN6PR03MB3313", "Cc": "albert.u.boot@aribaud.net, Raghav Dogra <raghav.dogra@nxp.com>,\n\tAmrita Kumari <amrita.kumari@nxp.com>", "Subject": "[U-Boot] [PATCH v3 7/7] ls1088a: Add VID support for QDS and RDB\n\tplatforms", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.\nIt reads the fusesr register and changes the VDD accordingly by adjusting the\nvoltage via LTC3882 regulator.\n\nThis patch also takes care of the special case of 0.9V VDD is present in\nfusesr register. In that case,it also changes the SERDES voltage by disabling\nthe SERDES, changing the SVDD and then re-enabling SERDES.\n\nSigned-off-by: Raghav Dogra <raghav.dogra@nxp.com>\nSigned-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>\nSigned-off-by: Amrita Kumari <amrita.kumari@nxp.com>\nSigned-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>\n---\nChanges in v3:\n Restructured LS1088A VID support to use common VID driver\n Removed APIs getLSB/MSB and used bit operations.\n\nChanges in v2:\n Checkpatch errors fixed\n\n board/freescale/ls1088a/ls1088a.c | 119 ++++++++++++++++++++++++++++++++++++++\n include/configs/ls1088aqds.h | 13 +++++\n include/configs/ls1088ardb.h | 14 +++++\n 3 files changed, 146 insertions(+)", "diff": "diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c\nindex d1de4d1..2c65ed3 100644\n--- a/board/freescale/ls1088a/ls1088a.c\n+++ b/board/freescale/ls1088a/ls1088a.c\n@@ -18,9 +18,13 @@\n #include <environment.h>\n #include <asm/arch-fsl-layerscape/soc.h>\n #include <asm/arch/ppa.h>\n+#include <asm/arch/fsl_serdes.h>\n+#include <asm/arch/soc.h>\n \n #include \"../common/qixis.h\"\n #include \"ls1088a_qixis.h\"\n+#include \"../common/vid.h\"\n+#include <fsl_immap.h>\n \n DECLARE_GLOBAL_DATA_PTR;\n \n@@ -295,6 +299,119 @@ void board_retimer_init(void)\n \t/*return the default channel*/\n \tselect_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);\n }\n+int i2c_multiplexer_select_vid_channel(u8 channel)\n+{\n+\treturn select_i2c_ch_pca9547(channel);\n+}\n+\n+#ifdef CONFIG_TARGET_LS1088AQDS\n+/* read the current value(SVDD) of the LTM Regulator Voltage */\n+int get_serdes_volt(void)\n+{\n+\tint ret, vcode = 0;\n+\n+\t/* Select the PAGE 0 using PMBus commands PAGE for VDD */\n+\tret = i2c_write(I2C_SVDD_MONITOR_ADDR,\n+\t\t\tPMBUS_CMD_PAGE, 1, PWM_CHANNEL0, 1);\n+\tif (ret) {\n+\t\tprintf(\"VID: failed to select VDD Page 0\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\t/* Read the output voltage using PMBus command READ_VOUT */\n+\tret = i2c_read(I2C_SVDD_MONITOR_ADDR,\n+\t\t PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);\n+\tif (ret) {\n+\t\tprintf(\"VID: failed to read the volatge\\n\");\n+\t\treturn ret;\n+\t}\n+\treturn vcode;\n+}\n+\n+int set_serdes_volt(int svdd)\n+{\n+\tint ret, vdd_last;\n+\tu8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,\n+\t\t\tsvdd & 0xFF, (svdd & 0xFF00) >> 8};\n+\n+\t/* Write the desired voltage code to the SVDD regulator */\n+\tret = i2c_write(I2C_SVDD_MONITOR_ADDR,\n+\t\t\tPMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);\n+\tif (ret) {\n+\t\tprintf(\"VID: I2C failed to write to the volatge regulator\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\t/* Wait for the volatge to get to the desired value */\n+\tdo {\n+\t\tvdd_last = get_serdes_volt();\n+\t\tif (vdd_last < 0) {\n+\t\t\tprintf(\"VID: Couldn't read sensor abort VID adjust\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\t} while (vdd_last != svdd);\n+\n+\treturn 1;\n+}\n+#else\n+int get_serdes_volt(void)\n+{\n+\treturn 0;\n+}\n+\n+int set_serdes_volt(int svdd)\n+{\n+\tint ret;\n+\tu8 brdcfg4;\n+\n+\tprintf(\"SVDD changing of RDB\\n\");\n+\n+\t/* Read the BRDCFG54 via CLPD */\n+\tret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR,\n+\t\tQIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);\n+\tif (ret) {\n+\t\tprintf(\"VID: I2C failed to read the CPLD BRDCFG4\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tbrdcfg4 = brdcfg4 | 0x08;\n+\n+\t/* Write to the BRDCFG4 */\n+\tret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR,\n+\t\t\tQIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);\n+\tif (ret) {\n+\t\tdebug(\"VID: I2C failed to set the SVDD CPLD BRDCFG4\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\t/* Wait for the volatge to get to the desired value */\n+\tudelay(10000);\n+\n+\treturn 1;\n+}\n+#endif\n+\n+/* this function disables the SERDES, changes the SVDD Voltage and enables it*/\n+int board_adjust_vdd(int vdd)\n+{\n+\tint ret = 0;\n+\n+\tdebug(\"%s: vdd = %d\\n\", __func__, vdd);\n+\n+\t/* Special settings to be performed when voltage is 900mV */\n+\tif (vdd == 900) {\n+#ifdef CONFIG_SYS_FSL_DDR\n+\t\tddr_enable_0v9_volt(true);\n+#endif\n+\t\tret = setup_serdes_volt(vdd);\n+\t\tif (ret < 0) {\n+\t\t\tret = -1;\n+\t\t\tgoto exit;\n+\t\t}\n+\t}\n+exit:\n+\treturn ret;\n+}\n \n int board_init(void)\n {\n@@ -314,6 +431,8 @@ int board_init(void)\n \t/* invert AQR105 IRQ pins polarity */\n \tout_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR105_IRQ_MASK);\n #endif\n+\tif (adjust_vdd(0) < 0)\n+\t\tprintf(\"core voltage not adjusted\\n\");\n \n #ifdef CONFIG_FSL_LS_PPA\n ppa_init();\ndiff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h\nindex 8ae98e1..a1135ed 100644\n--- a/include/configs/ls1088aqds.h\n+++ b/include/configs/ls1088aqds.h\n@@ -284,6 +284,19 @@ unsigned long get_board_ddr_clk(void);\n #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2\n #define I2C_VOL_MONITOR_BUS_V_OVF 0x1\n #define I2C_VOL_MONITOR_BUS_V_SHIFT 3\n+#define I2C_SVDD_MONITOR_ADDR 0x4F\n+\n+#define CONFIG_VID_FLS_ENV \"ls1088aqds_vdd_mv\"\n+#ifndef CONFIG_SPL_BUILD\n+#define CONFIG_VID\n+#endif\n+\n+/* The lowest and highest voltage allowed for LS1088AQDS */\n+#define VDD_MV_MIN\t\t\t819\n+#define VDD_MV_MAX\t\t\t1212\n+\n+#define CONFIG_VOL_MONITOR_LTC3882_SET\n+#define CONFIG_VOL_MONITOR_LTC3882_READ\n \n /* PM Bus commands code for LTC3882*/\n #define PMBUS_CMD_PAGE 0x0\ndiff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h\nindex 86fa033..615753b 100644\n--- a/include/configs/ls1088ardb.h\n+++ b/include/configs/ls1088ardb.h\n@@ -136,6 +136,7 @@\n \n #define CONFIG_FSL_QIXIS\n #define CONFIG_SYS_I2C_FPGA_ADDR\t0x66\n+#define QIXIS_BRDCFG4_OFFSET 0x54\n #define QIXIS_LBMAP_SWITCH\t\t2\n #define QIXIS_QMAP_MASK\t\t\t0xe0\n #define QIXIS_QMAP_SHIFT\t\t5\n@@ -216,6 +217,19 @@\n #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2\n #define I2C_VOL_MONITOR_BUS_V_OVF 0x1\n #define I2C_VOL_MONITOR_BUS_V_SHIFT 3\n+#define I2C_SVDD_MONITOR_ADDR\t\t0x4F\n+\n+#define CONFIG_VID_FLS_ENV \"ls1088ardb_vdd_mv\"\n+#ifndef CONFIG_SPL_BUILD\n+#define CONFIG_VID\n+#endif\n+\n+/* The lowest and highest voltage allowed for LS1088ARDB */\n+#define VDD_MV_MIN\t\t\t819\n+#define VDD_MV_MAX\t\t\t1212\n+\n+#define CONFIG_VOL_MONITOR_LTC3882_SET\n+#define CONFIG_VOL_MONITOR_LTC3882_READ\n \n /* PM Bus commands code for LTC3882*/\n #define PMBUS_CMD_PAGE 0x0\n", "prefixes": [ "U-Boot", "v3", "7/7" ] }