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GET /api/patches/806447/?format=api
{ "id": 806447, "url": "http://patchwork.ozlabs.org/api/patches/806447/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/87inh8t7a9.fsf@linaro.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<87inh8t7a9.fsf@linaro.org>", "list_archive_url": null, "date": "2017-08-28T08:39:58", "name": "Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "4d0be994bb77cc0d10e96d7a23083d280a437787", "submitter": { "id": 5450, "url": "http://patchwork.ozlabs.org/api/people/5450/?format=api", "name": "Richard Sandiford", "email": "richard.sandiford@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/87inh8t7a9.fsf@linaro.org/mbox/", "series": [ { "id": 109, "url": "http://patchwork.ozlabs.org/api/series/109/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=109", "date": "2017-08-28T08:39:58", "name": "Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/109/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806447/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806447/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-return-461001-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "mailing list gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461001-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"aTvIwCen\"; dkim-atps=neutral", "sourceware.org; auth=none" ], "Received": [ "from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xgm7d3G1cz9sNq\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 28 Aug 2017 19:05:16 +1000 (AEST)", "(qmail 37161 invoked by alias); 28 Aug 2017 08:57:38 -0000", "(qmail 31364 invoked by uid 89); 28 Aug 2017 08:40:01 -0000", "from mail-wr0-f173.google.com (HELO mail-wr0-f173.google.com)\n\t(209.85.128.173) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tMon, 28 Aug 2017 08:39:56 +0000", "by mail-wr0-f173.google.com with SMTP id a47so16388499wra.4 for\n\t<gcc-patches@gcc.gnu.org>; Mon, 28 Aug 2017 01:39:55 -0700 (PDT)", "from localhost ([95.145.139.63]) by smtp.gmail.com with ESMTPSA id\n\ti80sm10646942wmh.40.2017.08.28.01.39.49 for\n\t<gcc-patches@gcc.gnu.org> (version=TLS1_2\n\tcipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tMon, 28 Aug 2017 01:39:51 -0700 (PDT)" ], "DomainKey-Signature": "a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:subject:date:message-id:mime-version:content-type; q=dns; s=\n\tdefault; b=PnoIWzTQMmol66ufMSMkVjxpMqrsJeeguIpwhSPtMQVezI0cYQdcG\n\tpdmZjQdFpsIL8I8z7lKAvMnSjKy9YnJ6R6U+/3PbWlJibgE4+8o3XZuA6CQnmIys\n\tCRAnvpIdlcNGDpzMwhbtrvNBFb/bQogC9af0b/hFIhRyGPcTJgpSK4=", "DKIM-Signature": "v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:subject:date:message-id:mime-version:content-type; s=\n\tdefault; bh=Y7D4njIUHXmmFxV9q6Z7RdqUc1Q=; b=aTvIwCenRCRvq/vxEqb6\n\thGue9zYfu/i+bpWueazl2DgJKzWnLWLGDVo/CGTwltRPQQgFgmOEnFZ7cJA8O9k5\n\tlfZOJ/IU8CGMDV6eDOoCJ0PKQO9TWExWB1/gQAgoFdiarZyC+seBJ595sYwIy84u\n\toynUD89N3M1yWVB8g6iS+Yo=", "Mailing-List": "contact gcc-patches-help@gcc.gnu.org; run by ezmlm", "Precedence": "bulk", "List-Id": "<gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "List-Archive": "<http://gcc.gnu.org/ml/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-help@gcc.gnu.org>", "Sender": "gcc-patches-owner@gcc.gnu.org", "X-Virus-Found": "No", "X-Spam-SWARE-Status": "No, score=-15.5 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS,\n\tRCVD_IN_DNSWL_NONE,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=reserves,\n\tapproximately, enumerated", "X-HELO": "mail-wr0-f173.google.com", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net;\n\ts=20161025;\n\th=x-gm-message-state:from:to:mail-followup-to:subject:date:message-id\n\t:user-agent:mime-version;\n\tbh=6RF5X4JDdT8dh1TrrxJelQc37qeH95gQa/xVv3LRPco=;\n\tb=RyL7VRr/nqDEVvLciaeFd4tZTVn+d30rMd24lfRonqGtDIUkp35Y9YQm6RCu2mYJL8\n\tiRzvDjVrB+PfD+TqJT5ML09217HL8hF8B8ssDiOmHIA0MzucotKfMUIkusrg+c1cREAb\n\tpDllPZo8v/XcV4ekiJG9/QjGH/UxOEaorZCTdq8RYYS76ss5cnAKO6tZ/ly/AGfK23Gl\n\tqOvqKd2AaVuotoRsomla/0NBsS55Cy2nC4ouE6YcqJ/klCtu8Vayl+PyfZ1gAEmGOJAk\n\t4Z9GzlzjDN8WQTO7T7wabiZpLN3wP2Mdgpa57EeiGV3117fcPqheAAL3hTsGQOLp3GnM\n\tDOKQ==", "X-Gm-Message-State": "AHYfb5hDGzMYRQsyv1uVYEgLeqESMR4g/NesXl/NtpxBT+UMiRnQQUKO\tUU/P1StIUSwGQYj3fQTIiw==", "X-Received": "by 10.223.167.71 with SMTP id e7mr3843849wrd.205.1503909592465;\n\tMon, 28 Aug 2017 01:39:52 -0700 (PDT)", "From": "Richard Sandiford <richard.sandiford@linaro.org>", "To": "gcc-patches@gcc.gnu.org", "Mail-Followup-To": "gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org", "Subject": "Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook", "Date": "Mon, 28 Aug 2017 09:39:58 +0100", "Message-ID": "<87inh8t7a9.fsf@linaro.org>", "User-Agent": "Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux)", "MIME-Version": "1.0", "Content-Type": "text/plain" }, "content": "The SVE patches change the size of a machine_mode from a compile-time\nconstant to a runtime invariant. However, target-specific code can\ncontinue to treat the modes as constant-sized if the target only has\nconstant-sized modes.\n\nThe main snag with this approach is that target-independent code still\nuses macros from the target .h file. This patch is one of several that\nconverts a target macro to a hook.\n\nTested on aarch64-linux-gnu, x86_64-linux-gnu and powerpc64le-linux-gnu.\nAlso tested by checking that there were no extra warnings or changes in\ntestsuite assembly output for at least one target per CPU. OK to install?\n\nRichard\n\n\n2017-08-28 Richard Sandiford <richard.sandiford@linaro.org>\n\t Alan Hayward <alan.hayward@arm.com>\n\t David Sherwood <david.sherwood@arm.com>\n\ngcc/\n\t* target.def (hard_regno_call_part_clobbered): New hook.\n\t* doc/tm.texi.in (HARD_REGNO_CALL_PART_CLOBBERED): Replace with...\n\t(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): ...this hook.\n\t* doc/tm.texi: Regenerate.\n\t* hooks.h (hook_bool_uint_mode_false): Declare.\n\t* hooks.c (hook_bool_uint_mode_false): New function.\n\t* regs.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.\n\t* cselib.c (cselib_process_insn): Use\n\ttargetm.hard_regno_call_part_clobbered instead of\n\tHARD_REGNO_CALL_PART_CLOBBERED.\n\t* ira-conflicts.c (ira_build_conflicts): Likewise.\n\t* ira-costs.c (ira_tune_allocno_costs): Likewise.\n\t* lra-constraints.c (need_for_call_save_p): Likewise.\n\t* lra-lives.c: Include target.h.\n\t(check_pseudos_live_through_calls): Use\n\ttargetm.hard_regno_call_part_clobbered instead of\n\tHARD_REGNO_CALL_PART_CLOBBERED.\n\t* regcprop.c: Include target.h.\n\t(copyprop_hardreg_forward_1): Use\n\ttargetm.hard_regno_call_part_clobbered instead of\n\tHARD_REGNO_CALL_PART_CLOBBERED.\n\t* reginfo.c (choose_hard_reg_mode): Likewise.\n\t* regrename.c (check_new_reg_p): Likewise.\n\t* reload.c (find_equiv_reg): Likewise.\n\t* reload1.c (emit_reload_insns): Likewise.\n\t* sched-deps.c (deps_analyze_insn): Likewise.\n\t* sel-sched.c (init_regs_for_mode): Likewise.\n\t(mark_unavailable_hard_regs): Likewise.\n\t* targhooks.c (default_dwarf_frame_reg_mode): Likewise.\n\t* config/aarch64/aarch64.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.\n\t* config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered):\n\tNew function.\n\t(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.\n\t* config/avr/avr.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.\n\t* config/avr/avr-protos.h (avr_hard_regno_call_part_clobbered):\n\tDelete.\n\t* config/avr/avr.c (avr_hard_regno_call_part_clobbered): Make static\n\tand return a bool.\n\t(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.\n\t* config/i386/i386.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.\n\t* config/i386/i386.c (ix86_hard_regno_call_part_clobbered): New\n\tfunction.\n\t(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.\n\t* config/mips/mips.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.\n\t* config/mips/mips.c (mips_hard_regno_call_part_clobbered): New\n\tfunction.\n\t(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.\n\t* config/powerpcspe/powerpcspe.h (HARD_REGNO_CALL_PART_CLOBBERED):\n\tDelete.\n\t* config/powerpcspe/powerpcspe.c\n\t(rs6000_hard_regno_call_part_clobbered): New function.\n\t(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.\n\t* config/rs6000/rs6000.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.\n\t* config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered):\n\tNew function.\n\t(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.\n\t* config/s390/s390.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.\n\t* config/s390/s390.c (s390_hard_regno_call_part_clobbered): New\n\tfunction.\n\t(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.\n\t* config/sh/sh.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.\n\t* system.h (HARD_REGNO_CALL_PART_CLOBBERED): Poison.", "diff": "Index: gcc/target.def\n===================================================================\n--- gcc/target.def\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/target.def\t2017-08-28 09:36:10.075827140 +0100\n@@ -5395,6 +5395,19 @@ The default version of this hook always\n bool, (unsigned int regno),\n default_hard_regno_scratch_ok)\n \n+DEFHOOK\n+(hard_regno_call_part_clobbered,\n+ \"This hook should return true if @var{regno} is partly call-saved and\\n\\\n+partly call-clobbered, and if a value of mode @var{mode} would be partly\\n\\\n+clobbered by a call. For example, if the low 32 bits of @var{regno} are\\n\\\n+preserved across a call but higher bits are clobbered, this hook should\\n\\\n+return true for a 64-bit mode but false for a 32-bit mode.\\n\\\n+\\n\\\n+The default implementation returns false, which is correct\\n\\\n+for targets that don't have partly call-clobbered registers.\",\n+ bool, (unsigned int regno, machine_mode mode),\n+ hook_bool_uint_mode_false)\n+\n /* Return the smallest number of different values for which it is best to\n use a jump-table instead of a tree of conditional branches. */\n DEFHOOK\nIndex: gcc/doc/tm.texi.in\n===================================================================\n--- gcc/doc/tm.texi.in\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/doc/tm.texi.in\t2017-08-28 09:36:10.070827139 +0100\n@@ -1698,16 +1698,10 @@ This macro is optional. If not specifie\n of @code{CALL_USED_REGISTERS}.\n @end defmac\n \n-@defmac HARD_REGNO_CALL_PART_CLOBBERED (@var{regno}, @var{mode})\n @cindex call-used register\n @cindex call-clobbered register\n @cindex call-saved register\n-A C expression that is nonzero if it is not permissible to store a\n-value of mode @var{mode} in hard register number @var{regno} across a\n-call without some part of it being clobbered. For most machines this\n-macro need not be defined. It is only required for machines that do not\n-preserve the entire contents of a register across a call.\n-@end defmac\n+@hook TARGET_HARD_REGNO_CALL_PART_CLOBBERED\n \n @findex fixed_regs\n @findex call_used_regs\nIndex: gcc/doc/tm.texi\n===================================================================\n--- gcc/doc/tm.texi\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/doc/tm.texi\t2017-08-28 09:36:10.069827139 +0100\n@@ -1869,16 +1869,19 @@ This macro is optional. If not specifie\n of @code{CALL_USED_REGISTERS}.\n @end defmac\n \n-@defmac HARD_REGNO_CALL_PART_CLOBBERED (@var{regno}, @var{mode})\n @cindex call-used register\n @cindex call-clobbered register\n @cindex call-saved register\n-A C expression that is nonzero if it is not permissible to store a\n-value of mode @var{mode} in hard register number @var{regno} across a\n-call without some part of it being clobbered. For most machines this\n-macro need not be defined. It is only required for machines that do not\n-preserve the entire contents of a register across a call.\n-@end defmac\n+@deftypefn {Target Hook} bool TARGET_HARD_REGNO_CALL_PART_CLOBBERED (unsigned int @var{regno}, machine_mode @var{mode})\n+This hook should return true if @var{regno} is partly call-saved and\n+partly call-clobbered, and if a value of mode @var{mode} would be partly\n+clobbered by a call. For example, if the low 32 bits of @var{regno} are\n+preserved across a call but higher bits are clobbered, this hook should\n+return true for a 64-bit mode but false for a 32-bit mode.\n+\n+The default implementation returns false, which is correct\n+for targets that don't have partly call-clobbered registers.\n+@end deftypefn\n \n @findex fixed_regs\n @findex call_used_regs\nIndex: gcc/hooks.h\n===================================================================\n--- gcc/hooks.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/hooks.h\t2017-08-28 09:36:10.070827139 +0100\n@@ -38,6 +38,7 @@ extern bool hook_bool_const_rtx_insn_con\n \t\t\t\t\t\t\t const rtx_insn *);\n extern bool hook_bool_mode_uhwi_false (machine_mode,\n \t\t\t\t unsigned HOST_WIDE_INT);\n+extern bool hook_bool_uint_mode_false (unsigned int, machine_mode);\n extern bool hook_bool_tree_false (tree);\n extern bool hook_bool_const_tree_false (const_tree);\n extern bool hook_bool_tree_true (tree);\nIndex: gcc/hooks.c\n===================================================================\n--- gcc/hooks.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/hooks.c\t2017-08-28 09:36:10.070827139 +0100\n@@ -126,6 +126,13 @@ hook_bool_mode_uhwi_false (machine_mode,\n return false;\n }\n \n+/* Generic hook that takes (unsigned int, machine_mode) and returns false. */\n+bool\n+hook_bool_uint_mode_false (unsigned int, machine_mode)\n+{\n+ return false;\n+}\n+\n /* Generic hook that takes (FILE *, const char *) and does nothing. */\n void\n hook_void_FILEptr_constcharptr (FILE *, const char *)\nIndex: gcc/regs.h\n===================================================================\n--- gcc/regs.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/regs.h\t2017-08-28 09:36:10.072827140 +0100\n@@ -193,12 +193,6 @@ #define HARD_REGNO_CALLER_SAVE_MODE(REGN\n choose_hard_reg_mode (REGNO, NREGS, false)\n #endif\n \n-/* Registers that get partially clobbered by a call in a given mode.\n- These must not be call used registers. */\n-#ifndef HARD_REGNO_CALL_PART_CLOBBERED\n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0\n-#endif\n-\n /* Target-dependent globals. */\n struct target_regs {\n /* For each starting hard register, the number of consecutive hard\nIndex: gcc/cselib.c\n===================================================================\n--- gcc/cselib.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/cselib.c\t2017-08-28 09:36:10.068827139 +0100\n@@ -2660,8 +2660,8 @@ cselib_process_insn (rtx_insn *insn)\n for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)\n \tif (call_used_regs[i]\n \t || (REG_VALUES (i) && REG_VALUES (i)->elt\n-\t\t&& HARD_REGNO_CALL_PART_CLOBBERED (i,\n-\t\t GET_MODE (REG_VALUES (i)->elt->val_rtx))))\n+\t\t&& (targetm.hard_regno_call_part_clobbered\n+\t\t (i, GET_MODE (REG_VALUES (i)->elt->val_rtx)))))\n \t cselib_invalidate_regno (i, reg_raw_mode[i]);\n \n /* Since it is not clear how cselib is going to be used, be\nIndex: gcc/ira-conflicts.c\n===================================================================\n--- gcc/ira-conflicts.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/ira-conflicts.c\t2017-08-28 09:36:10.070827139 +0100\n@@ -743,6 +743,7 @@ ira_build_conflicts (void)\n for (i = 0; i < n; i++)\n \t{\n \t ira_object_t obj = ALLOCNO_OBJECT (a, i);\n+\t machine_mode obj_mode = obj->allocno->mode;\n \t rtx allocno_reg = regno_reg_rtx [ALLOCNO_REGNO (a)];\n \n \t if ((! flag_caller_saves && ALLOCNO_CALLS_CROSSED_NUM (a) != 0)\n@@ -804,8 +805,8 @@ ira_build_conflicts (void)\n \t\t regs must conflict with them. */\n \t for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)\n \t\tif (!TEST_HARD_REG_BIT (call_used_reg_set, regno)\n-\t\t && HARD_REGNO_CALL_PART_CLOBBERED (regno,\n-\t\t\t\t\t\t obj->allocno->mode))\n+\t\t && targetm.hard_regno_call_part_clobbered (regno,\n+\t\t\t\t\t\t\t obj_mode))\n \t\t {\n \t\t SET_HARD_REG_BIT (OBJECT_CONFLICT_HARD_REGS (obj), regno);\n \t\t SET_HARD_REG_BIT (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),\nIndex: gcc/ira-costs.c\n===================================================================\n--- gcc/ira-costs.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/ira-costs.c\t2017-08-28 09:36:10.071827140 +0100\n@@ -2341,7 +2341,8 @@ ira_tune_allocno_costs (void)\n \t\t\t\t\t\t *crossed_calls_clobber_regs)\n \t\t && (ira_hard_reg_set_intersection_p (regno, mode,\n \t\t\t\t\t\t call_used_reg_set)\n-\t\t || HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))\n+\t\t || targetm.hard_regno_call_part_clobbered (regno,\n+\t\t\t\t\t\t\t\t mode)))\n \t\tcost += (ALLOCNO_CALL_FREQ (a)\n \t\t\t * (ira_memory_move_cost[mode][rclass][0]\n \t\t\t + ira_memory_move_cost[mode][rclass][1]));\nIndex: gcc/lra-constraints.c\n===================================================================\n--- gcc/lra-constraints.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/lra-constraints.c\t2017-08-28 09:36:10.071827140 +0100\n@@ -5287,8 +5287,8 @@ need_for_call_save_p (int regno)\n \t ? lra_reg_info[regno].actual_call_used_reg_set\n \t : call_used_reg_set,\n \t PSEUDO_REGNO_MODE (regno), reg_renumber[regno])\n-\t || HARD_REGNO_CALL_PART_CLOBBERED (reg_renumber[regno],\n-\t\t\t\t\t\t PSEUDO_REGNO_MODE (regno))));\n+\t || (targetm.hard_regno_call_part_clobbered\n+\t\t (reg_renumber[regno], PSEUDO_REGNO_MODE (regno)))));\n }\n \n /* Global registers occurring in the current EBB. */\nIndex: gcc/lra-lives.c\n===================================================================\n--- gcc/lra-lives.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/lra-lives.c\t2017-08-28 09:36:10.072827140 +0100\n@@ -42,6 +42,7 @@ Software Foundation; either version 3, o\n #include \"cfganal.h\"\n #include \"sparseset.h\"\n #include \"lra-int.h\"\n+#include \"target.h\"\n \n /* Program points are enumerated by numbers from range\n 0..LRA_LIVE_MAX_POINT-1. There are approximately two times more\n@@ -575,7 +576,8 @@ check_pseudos_live_through_calls (int re\n \t\t last_call_used_reg_set);\n \n for (hr = 0; hr < FIRST_PSEUDO_REGISTER; hr++)\n- if (HARD_REGNO_CALL_PART_CLOBBERED (hr, PSEUDO_REGNO_MODE (regno)))\n+ if (targetm.hard_regno_call_part_clobbered (hr,\n+\t\t\t\t\t\tPSEUDO_REGNO_MODE (regno)))\n SET_HARD_REG_BIT (lra_reg_info[regno].conflict_hard_regs, hr);\n lra_reg_info[regno].call_p = true;\n if (! sparseset_bit_p (pseudos_live_through_setjumps, regno))\nIndex: gcc/regcprop.c\n===================================================================\n--- gcc/regcprop.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/regcprop.c\t2017-08-28 09:36:10.072827140 +0100\n@@ -34,6 +34,7 @@\n #include \"tree-pass.h\"\n #include \"rtl-iter.h\"\n #include \"cfgrtl.h\"\n+#include \"target.h\"\n \n /* The following code does forward propagation of hard register copies.\n The object is to eliminate as many dependencies as possible, so that\n@@ -1049,7 +1050,8 @@ copyprop_hardreg_forward_1 (basic_block\n \t\t\t\t regs_invalidated_by_call);\n \t for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)\n \t if ((TEST_HARD_REG_BIT (regs_invalidated_by_this_call, regno)\n-\t\t || HARD_REGNO_CALL_PART_CLOBBERED (regno, vd->e[regno].mode))\n+\t\t || (targetm.hard_regno_call_part_clobbered\n+\t\t (regno, vd->e[regno].mode)))\n \t\t&& (regno < set_regno || regno >= set_regno + set_nregs))\n \t kill_value_regno (regno, 1, vd);\n \nIndex: gcc/reginfo.c\n===================================================================\n--- gcc/reginfo.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/reginfo.c\t2017-08-28 09:36:10.072827140 +0100\n@@ -637,7 +637,8 @@ choose_hard_reg_mode (unsigned int regno\n mode = GET_MODE_WIDER_MODE (mode))\n if ((unsigned) hard_regno_nregs[regno][mode] == nregs\n \t&& HARD_REGNO_MODE_OK (regno, mode)\n-\t&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))\n+\t&& (!call_saved\n+\t || !targetm.hard_regno_call_part_clobbered (regno, mode))\n \t&& GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))\n found_mode = mode;\n \n@@ -646,7 +647,8 @@ choose_hard_reg_mode (unsigned int regno\n mode = GET_MODE_WIDER_MODE (mode))\n if ((unsigned) hard_regno_nregs[regno][mode] == nregs\n \t&& HARD_REGNO_MODE_OK (regno, mode)\n-\t&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))\n+\t&& (!call_saved\n+\t || !targetm.hard_regno_call_part_clobbered (regno, mode))\n \t&& GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))\n found_mode = mode;\n \n@@ -655,7 +657,8 @@ choose_hard_reg_mode (unsigned int regno\n mode = GET_MODE_WIDER_MODE (mode))\n if ((unsigned) hard_regno_nregs[regno][mode] == nregs\n \t&& HARD_REGNO_MODE_OK (regno, mode)\n-\t&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))\n+\t&& (!call_saved\n+\t || !targetm.hard_regno_call_part_clobbered (regno, mode))\n \t&& GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))\n found_mode = mode;\n \n@@ -664,7 +667,8 @@ choose_hard_reg_mode (unsigned int regno\n mode = GET_MODE_WIDER_MODE (mode))\n if ((unsigned) hard_regno_nregs[regno][mode] == nregs\n \t&& HARD_REGNO_MODE_OK (regno, mode)\n-\t&& (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))\n+\t&& (!call_saved\n+\t || !targetm.hard_regno_call_part_clobbered (regno, mode))\n \t&& GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))\n found_mode = mode;\n \n@@ -677,7 +681,8 @@ choose_hard_reg_mode (unsigned int regno\n mode = (machine_mode) m;\n if ((unsigned) hard_regno_nregs[regno][mode] == nregs\n \t && HARD_REGNO_MODE_OK (regno, mode)\n-\t && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))\n+\t && (!call_saved\n+\t || !targetm.hard_regno_call_part_clobbered (regno, mode)))\n \treturn mode;\n }\n \nIndex: gcc/regrename.c\n===================================================================\n--- gcc/regrename.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/regrename.c\t2017-08-28 09:36:10.072827140 +0100\n@@ -338,9 +338,9 @@ check_new_reg_p (int reg ATTRIBUTE_UNUSE\n if ((! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc))\n \t && ! DEBUG_INSN_P (tmp->insn))\n \t|| (this_head->need_caller_save_reg\n-\t && ! (HARD_REGNO_CALL_PART_CLOBBERED\n+\t && ! (targetm.hard_regno_call_part_clobbered\n \t\t (reg, GET_MODE (*tmp->loc)))\n-\t && (HARD_REGNO_CALL_PART_CLOBBERED\n+\t && (targetm.hard_regno_call_part_clobbered\n \t\t(new_reg, GET_MODE (*tmp->loc)))))\n return false;\n \nIndex: gcc/reload.c\n===================================================================\n--- gcc/reload.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/reload.c\t2017-08-28 09:36:10.073827140 +0100\n@@ -6922,13 +6922,14 @@ find_equiv_reg (rtx goal, rtx_insn *insn\n \t if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)\n \t for (i = 0; i < nregs; ++i)\n \t if (call_used_regs[regno + i]\n-\t\t || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))\n+\t\t || targetm.hard_regno_call_part_clobbered (regno + i, mode))\n \t\treturn 0;\n \n \t if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)\n \t for (i = 0; i < valuenregs; ++i)\n \t if (call_used_regs[valueno + i]\n-\t\t || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))\n+\t\t || targetm.hard_regno_call_part_clobbered (valueno + i,\n+\t\t\t\t\t\t\t mode))\n \t\treturn 0;\n \t}\n \nIndex: gcc/reload1.c\n===================================================================\n--- gcc/reload1.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/reload1.c\t2017-08-28 09:36:10.074827140 +0100\n@@ -8276,7 +8276,8 @@ emit_reload_insns (struct insn_chain *ch\n \t\t\t : out_regno + k);\n \t\t reg_reloaded_insn[regno + k] = insn;\n \t\t SET_HARD_REG_BIT (reg_reloaded_valid, regno + k);\n-\t\t if (HARD_REGNO_CALL_PART_CLOBBERED (regno + k, mode))\n+\t\t if (targetm.hard_regno_call_part_clobbered (regno + k,\n+\t\t\t\t\t\t\t\t mode))\n \t\t\tSET_HARD_REG_BIT (reg_reloaded_call_part_clobbered,\n \t\t\t\t\t regno + k);\n \t\t else\n@@ -8355,7 +8356,8 @@ emit_reload_insns (struct insn_chain *ch\n \t\t\t : in_regno + k);\n \t\t reg_reloaded_insn[regno + k] = insn;\n \t\t SET_HARD_REG_BIT (reg_reloaded_valid, regno + k);\n-\t\t if (HARD_REGNO_CALL_PART_CLOBBERED (regno + k, mode))\n+\t\t if (targetm.hard_regno_call_part_clobbered (regno + k,\n+\t\t\t\t\t\t\t\t mode))\n \t\t\tSET_HARD_REG_BIT (reg_reloaded_call_part_clobbered,\n \t\t\t\t\t regno + k);\n \t\t else\n@@ -8469,8 +8471,8 @@ emit_reload_insns (struct insn_chain *ch\n \t\t reg_reloaded_insn[src_regno + k] = store_insn;\n \t\t CLEAR_HARD_REG_BIT (reg_reloaded_dead, src_regno + k);\n \t\t SET_HARD_REG_BIT (reg_reloaded_valid, src_regno + k);\n-\t\t if (HARD_REGNO_CALL_PART_CLOBBERED (src_regno + k,\n-\t\t\t\t\t\t\t mode))\n+\t\t if (targetm.hard_regno_call_part_clobbered\n+\t\t\t (src_regno + k, mode))\n \t\t\tSET_HARD_REG_BIT (reg_reloaded_call_part_clobbered,\n \t\t\t\t\t src_regno + k);\n \t\t else\nIndex: gcc/sched-deps.c\n===================================================================\n--- gcc/sched-deps.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/sched-deps.c\t2017-08-28 09:36:10.074827140 +0100\n@@ -3706,7 +3706,8 @@ deps_analyze_insn (struct deps_desc *dep\n Since we only have a choice between 'might be clobbered'\n and 'definitely not clobbered', we must include all\n partly call-clobbered registers here. */\n- else if (HARD_REGNO_CALL_PART_CLOBBERED (i, reg_raw_mode[i])\n+\t else if (targetm.hard_regno_call_part_clobbered (i,\n+\t\t\t\t\t\t\t reg_raw_mode[i])\n || TEST_HARD_REG_BIT (regs_invalidated_by_call, i))\n SET_REGNO_REG_SET (reg_pending_clobbers, i);\n /* We don't know what set of fixed registers might be used\nIndex: gcc/sel-sched.c\n===================================================================\n--- gcc/sel-sched.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/sel-sched.c\t2017-08-28 09:36:10.075827140 +0100\n@@ -1102,7 +1102,7 @@ init_regs_for_mode (machine_mode mode)\n if (i >= 0)\n continue;\n \n- if (HARD_REGNO_CALL_PART_CLOBBERED (cur_reg, mode))\n+ if (targetm.hard_regno_call_part_clobbered (cur_reg, mode))\n SET_HARD_REG_BIT (sel_hrd.regs_for_call_clobbered[mode],\n cur_reg);\n \n@@ -1251,7 +1251,7 @@ mark_unavailable_hard_regs (def_t def, s\n \n /* Exclude registers that are partially call clobbered. */\n if (def->crosses_call\n- && ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))\n+ && !targetm.hard_regno_call_part_clobbered (regno, mode))\n AND_COMPL_HARD_REG_SET (reg_rename_p->available_for_renaming,\n sel_hrd.regs_for_call_clobbered[mode]);\n \nIndex: gcc/targhooks.c\n===================================================================\n--- gcc/targhooks.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/targhooks.c\t2017-08-28 09:36:10.076827140 +0100\n@@ -1736,7 +1736,7 @@ default_dwarf_frame_reg_mode (int regno)\n {\n machine_mode save_mode = reg_raw_mode[regno];\n \n- if (HARD_REGNO_CALL_PART_CLOBBERED (regno, save_mode))\n+ if (targetm.hard_regno_call_part_clobbered (regno, save_mode))\n save_mode = choose_hard_reg_mode (regno, 1, true);\n return save_mode;\n }\nIndex: gcc/config/aarch64/aarch64.h\n===================================================================\n--- gcc/config/aarch64/aarch64.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/aarch64/aarch64.h\t2017-08-28 09:36:10.053827138 +0100\n@@ -888,12 +888,6 @@ #define SHIFT_COUNT_TRUNCATED (!TARGET_S\n #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \\\n aarch64_hard_regno_caller_save_mode ((REGNO), (NREGS), (MODE))\n \n-/* Callee only saves lower 64-bits of a 128-bit register. Tell the\n- compiler the callee clobbers the top 64-bits when restoring the\n- bottom 64-bits. */\n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \\\n-\t\t(FP_REGNUM_P (REGNO) && GET_MODE_SIZE (MODE) > 8)\n-\n #undef SWITCHABLE_TARGET\n #define SWITCHABLE_TARGET 1\n \nIndex: gcc/config/aarch64/aarch64.c\n===================================================================\n--- gcc/config/aarch64/aarch64.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/aarch64/aarch64.c\t2017-08-28 09:36:10.053827138 +0100\n@@ -1115,6 +1115,16 @@ aarch64_hard_regno_mode_ok (unsigned reg\n return 0;\n }\n \n+/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. The callee only saves\n+ the lower 64 bits of a 128-bit register. Tell the compiler the callee\n+ clobbers the top 64 bits when restoring the bottom 64 bits. */\n+\n+static bool\n+aarch64_hard_regno_call_part_clobbered (unsigned int regno, machine_mode mode)\n+{\n+ return FP_REGNUM_P (regno) && GET_MODE_SIZE (mode) > 8;\n+}\n+\n /* Implement HARD_REGNO_CALLER_SAVE_MODE. */\n machine_mode\n aarch64_hard_regno_caller_save_mode (unsigned regno, unsigned nregs,\n@@ -15644,6 +15654,10 @@ #define TARGET_OMIT_STRUCT_RETURN_REG tr\n #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS\n #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 4\n \n+#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED\n+#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \\\n+ aarch64_hard_regno_call_part_clobbered\n+\n #if CHECKING_P\n #undef TARGET_RUN_TARGET_SELFTESTS\n #define TARGET_RUN_TARGET_SELFTESTS selftest::aarch64_run_selftests\nIndex: gcc/config/avr/avr.h\n===================================================================\n--- gcc/config/avr/avr.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/avr/avr.h\t2017-08-28 09:36:10.054827138 +0100\n@@ -285,9 +285,6 @@ #define REGNO_MODE_CODE_OK_FOR_BASE_P(nu\n \n #define REGNO_OK_FOR_INDEX_P(NUM) 0\n \n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \\\n- avr_hard_regno_call_part_clobbered (REGNO, MODE)\n-\n #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true\n \n #define STACK_PUSH_CODE POST_DEC\nIndex: gcc/config/avr/avr-protos.h\n===================================================================\n--- gcc/config/avr/avr-protos.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/avr/avr-protos.h\t2017-08-28 09:36:10.053827138 +0100\n@@ -46,7 +46,6 @@ extern void avr_init_cumulative_args (CU\n #endif /* TREE_CODE */\n \n #ifdef RTX_CODE\n-extern int avr_hard_regno_call_part_clobbered (unsigned, machine_mode);\n extern const char *output_movqi (rtx_insn *insn, rtx operands[], int *l);\n extern const char *output_movhi (rtx_insn *insn, rtx operands[], int *l);\n extern const char *output_movsisf (rtx_insn *insn, rtx operands[], int *l);\nIndex: gcc/config/avr/avr.c\n===================================================================\n--- gcc/config/avr/avr.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/avr/avr.c\t2017-08-28 09:36:10.054827138 +0100\n@@ -12186,9 +12186,9 @@ avr_hard_regno_mode_ok (int regno, machi\n }\n \n \n-/* Implement `HARD_REGNO_CALL_PART_CLOBBERED'. */\n+/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. */\n \n-int\n+static bool\n avr_hard_regno_call_part_clobbered (unsigned regno, machine_mode mode)\n {\n /* FIXME: This hook gets called with MODE:REGNO combinations that don't\n@@ -14693,6 +14693,10 @@ #define TARGET_CONDITIONAL_REGISTER_USAG\n \n #undef TARGET_HARD_REGNO_SCRATCH_OK\n #define TARGET_HARD_REGNO_SCRATCH_OK avr_hard_regno_scratch_ok\n+#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED\n+#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \\\n+ avr_hard_regno_call_part_clobbered\n+\n #undef TARGET_CASE_VALUES_THRESHOLD\n #define TARGET_CASE_VALUES_THRESHOLD avr_case_values_threshold\n \nIndex: gcc/config/i386/i386.h\n===================================================================\n--- gcc/config/i386/i386.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/i386/i386.h\t2017-08-28 09:36:10.059827139 +0100\n@@ -1214,12 +1214,6 @@ #define HARD_REGNO_CALLER_SAVE_MODE(REGN\n \t\t\t || MASK_REGNO_P (REGNO)) ? SImode\t\t\\\n : (MODE))\n \n-/* The only ABI that saves SSE registers across calls is Win64 (thus no\n- need to check the current ABI here), and with AVX enabled Win64 only\n- guarantees that the low 16 bytes are saved. */\n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \\\n- (SSE_REGNO_P (REGNO) && GET_MODE_SIZE (MODE) > 16)\n-\n /* Specify the registers used for certain standard purposes.\n The values of these macros are register numbers. */\n \nIndex: gcc/config/i386/i386.c\n===================================================================\n--- gcc/config/i386/i386.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/i386/i386.c\t2017-08-28 09:36:10.058827139 +0100\n@@ -41397,6 +41397,17 @@ ix86_hard_regno_mode_ok (int regno, mach\n return false;\n }\n \n+/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. The only ABI that\n+ saves SSE registers across calls is Win64 (thus no need to check the\n+ current ABI here), and with AVX enabled Win64 only guarantees that\n+ the low 16 bytes are saved. */\n+\n+static bool\n+ix86_hard_regno_call_part_clobbered (unsigned int regno, machine_mode mode)\n+{\n+ return SSE_REGNO_P (regno) && GET_MODE_SIZE (mode) > 16;\n+}\n+\n /* A subroutine of ix86_modes_tieable_p. Return true if MODE is a\n tieable integer mode. */\n \n@@ -53239,6 +53250,10 @@ #define TARGET_MAX_NOCE_IFCVT_SEQ_COST i\n #undef TARGET_NOCE_CONVERSION_PROFITABLE_P\n #define TARGET_NOCE_CONVERSION_PROFITABLE_P ix86_noce_conversion_profitable_p\n \n+#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED\n+#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \\\n+ ix86_hard_regno_call_part_clobbered\n+\n #if CHECKING_P\n #undef TARGET_RUN_TARGET_SELFTESTS\n #define TARGET_RUN_TARGET_SELFTESTS selftest::ix86_run_selftests\nIndex: gcc/config/mips/mips.h\n===================================================================\n--- gcc/config/mips/mips.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/mips/mips.h\t2017-08-28 09:36:10.060827139 +0100\n@@ -1971,14 +1971,6 @@ #define HARD_REGNO_RENAME_OK(OLD_REG, NE\n #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \\\n mips_hard_regno_caller_save_mode (REGNO, NREGS, MODE)\n \n-/* Odd-numbered single-precision registers are not considered callee-saved\n- for o32 FPXX as they will be clobbered when run on an FR=1 FPU.\n- MSA vector registers with MODE > 64 bits are part clobbered too. */\n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)\t\t\t\\\n- ((TARGET_FLOATXX && hard_regno_nregs[REGNO][MODE] == 1\t\t\\\n- && FP_REG_P (REGNO) && ((REGNO) & 1))\t\t\t\t\\\n- || (ISA_HAS_MSA && FP_REG_P (REGNO) && GET_MODE_SIZE (MODE) > 8))\n-\n #define MODES_TIEABLE_P mips_modes_tieable_p\n \n /* Register to use for pushing function arguments. */\nIndex: gcc/config/mips/mips.c\n===================================================================\n--- gcc/config/mips/mips.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/mips/mips.c\t2017-08-28 09:36:10.060827139 +0100\n@@ -12857,6 +12857,26 @@ mips_hard_regno_scratch_ok (unsigned int\n return true;\n }\n \n+/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. Odd-numbered\n+ single-precision registers are not considered callee-saved for o32\n+ FPXX as they will be clobbered when run on an FR=1 FPU. MSA vector\n+ registers with MODE > 64 bits are part clobbered too. */\n+\n+static bool\n+mips_hard_regno_call_part_clobbered (unsigned int regno, machine_mode mode)\n+{\n+ if (TARGET_FLOATXX\n+ && hard_regno_nregs[regno][mode] == 1\n+ && FP_REG_P (regno)\n+ && (regno & 1) != 0)\n+ return true;\n+\n+ if (ISA_HAS_MSA && FP_REG_P (regno) && GET_MODE_SIZE (mode) > 8)\n+ return true;\n+\n+ return false;\n+}\n+\n /* Implement HARD_REGNO_NREGS. */\n \n unsigned int\n@@ -22557,6 +22577,10 @@ #define TARGET_IRA_CHANGE_PSEUDO_ALLOCNO\n #undef TARGET_HARD_REGNO_SCRATCH_OK\n #define TARGET_HARD_REGNO_SCRATCH_OK mips_hard_regno_scratch_ok\n \n+#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED\n+#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \\\n+ mips_hard_regno_call_part_clobbered\n+\n /* The architecture reserves bit 0 for MIPS16 so use bit 1 for descriptors. */\n #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS\n #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2\nIndex: gcc/config/powerpcspe/powerpcspe.h\n===================================================================\n--- gcc/config/powerpcspe/powerpcspe.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/powerpcspe/powerpcspe.h\t2017-08-28 09:36:10.064827139 +0100\n@@ -1302,13 +1302,6 @@ #define HARD_REGNO_CALLER_SAVE_MODE(REGN\n ? DImode\t\t\t\t\t\t\t\t\\\n : choose_hard_reg_mode ((REGNO), (NREGS), false))\n \n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)\t\t\t\\\n- (((TARGET_32BIT && TARGET_POWERPC64\t\t\t\t\t\\\n- && (GET_MODE_SIZE (MODE) > 4)\t\t\t\t\t\\\n- && INT_REGNO_P (REGNO)) ? 1 : 0)\t\t\t\t\t\\\n- || (TARGET_VSX && FP_REGNO_P (REGNO)\t\t\t\t\t\\\n- && GET_MODE_SIZE (MODE) > 8 && !FLOAT128_2REG_P (MODE)))\n-\n #define VSX_VECTOR_MODE(MODE)\t\t\\\n \t ((MODE) == V4SFmode\t\t\\\n \t || (MODE) == V2DFmode)\t\\\nIndex: gcc/config/powerpcspe/powerpcspe.c\n===================================================================\n--- gcc/config/powerpcspe/powerpcspe.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/powerpcspe/powerpcspe.c\t2017-08-28 09:36:10.063827139 +0100\n@@ -1972,6 +1972,10 @@ #define TARGET_OPTAB_SUPPORTED_P rs6000_\n \n #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS\n #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 1\n+\n+#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED\n+#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \\\n+ rs6000_hard_regno_call_part_clobbered\n \f\n \n /* Processor table. */\n@@ -2157,6 +2161,26 @@ rs6000_hard_regno_mode_ok (int regno, ma\n return GET_MODE_SIZE (mode) <= UNITS_PER_WORD;\n }\n \n+/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. */\n+\n+static bool\n+rs6000_hard_regno_call_part_clobbered (unsigned int regno, machine_mode mode)\n+{\n+ if (TARGET_32BIT\n+ && TARGET_POWERPC64\n+ && GET_MODE_SIZE (mode) > 4\n+ && INT_REGNO_P (regno))\n+ return true;\n+\n+ if (TARGET_VSX\n+ && FP_REGNO_P (regno)\n+ && GET_MODE_SIZE (mode) > 8\n+ && !FLOAT128_2REG_P (mode))\n+ return true;\n+\n+ return false;\n+}\n+\n /* Print interesting facts about registers. */\n static void\n rs6000_debug_reg_print (int first_regno, int last_regno, const char *reg_name)\nIndex: gcc/config/rs6000/rs6000.h\n===================================================================\n--- gcc/config/rs6000/rs6000.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/rs6000/rs6000.h\t2017-08-28 09:36:10.067827139 +0100\n@@ -1240,13 +1240,6 @@ #define HARD_REGNO_CALLER_SAVE_MODE(REGN\n ? DImode\t\t\t\t\t\t\t\t\\\n : choose_hard_reg_mode ((REGNO), (NREGS), false))\n \n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)\t\t\t\\\n- (((TARGET_32BIT && TARGET_POWERPC64\t\t\t\t\t\\\n- && (GET_MODE_SIZE (MODE) > 4)\t\t\t\t\t\\\n- && INT_REGNO_P (REGNO)) ? 1 : 0)\t\t\t\t\t\\\n- || (TARGET_VSX && FP_REGNO_P (REGNO)\t\t\t\t\t\\\n- && GET_MODE_SIZE (MODE) > 8 && !FLOAT128_2REG_P (MODE)))\n-\n #define VSX_VECTOR_MODE(MODE)\t\t\\\n \t ((MODE) == V4SFmode\t\t\\\n \t || (MODE) == V2DFmode)\t\\\nIndex: gcc/config/rs6000/rs6000.c\n===================================================================\n--- gcc/config/rs6000/rs6000.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/rs6000/rs6000.c\t2017-08-28 09:36:10.066827139 +0100\n@@ -1963,6 +1963,9 @@ #define TARGET_GET_FUNCTION_VERSIONS_DIS\n #undef TARGET_OPTION_FUNCTION_VERSIONS\n #define TARGET_OPTION_FUNCTION_VERSIONS common_function_versions\n \n+#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED\n+#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \\\n+ rs6000_hard_regno_call_part_clobbered\n \f\n \n /* Processor table. */\n@@ -2125,6 +2128,26 @@ rs6000_hard_regno_mode_ok (int regno, ma\n return GET_MODE_SIZE (mode) <= UNITS_PER_WORD;\n }\n \n+/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. */\n+\n+static bool\n+rs6000_hard_regno_call_part_clobbered (unsigned int regno, machine_mode mode)\n+{\n+ if (TARGET_32BIT\n+ && TARGET_POWERPC64\n+ && GET_MODE_SIZE (mode) > 4\n+ && INT_REGNO_P (regno))\n+ return true;\n+\n+ if (TARGET_VSX\n+ && FP_REGNO_P (regno)\n+ && GET_MODE_SIZE (mode) > 8\n+ && !FLOAT128_2REG_P (mode))\n+ return true;\n+\n+ return false;\n+}\n+\n /* Print interesting facts about registers. */\n static void\n rs6000_debug_reg_print (int first_regno, int last_regno, const char *reg_name)\nIndex: gcc/config/s390/s390.h\n===================================================================\n--- gcc/config/s390/s390.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/s390/s390.h\t2017-08-28 09:36:10.068827139 +0100\n@@ -509,19 +509,6 @@ #define MODES_TIEABLE_P(MODE1, MODE2)\t\t\\\n (((MODE1) == SFmode || (MODE1) == DFmode)\t\\\n == ((MODE2) == SFmode || (MODE2) == DFmode))\n \n-/* When generating code that runs in z/Architecture mode,\n- but conforms to the 31-bit ABI, GPRs can hold 8 bytes;\n- the ABI guarantees only that the lower 4 bytes are\n- saved across calls, however. */\n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)\t\t\t\\\n- ((!TARGET_64BIT && TARGET_ZARCH\t\t\t\t\t\\\n- && GET_MODE_SIZE (MODE) > 4\t\t\t\t\t\t\\\n- && (((REGNO) >= 6 && (REGNO) <= 15) || (REGNO) == 32))\t\t\\\n- || (TARGET_VX\t\t\t\t\t\t\t\\\n- && GET_MODE_SIZE (MODE) > 8\t\t\t\t\t\\\n- && (((TARGET_64BIT && (REGNO) >= 24 && (REGNO) <= 31))\t\t\\\n-\t || (!TARGET_64BIT && ((REGNO) == 18 || (REGNO) == 19)))))\n-\n /* Maximum number of registers to represent a value of mode MODE\n in a register of class CLASS. */\n #define CLASS_MAX_NREGS(CLASS, MODE) \t\t\t\t\t\\\nIndex: gcc/config/s390/s390.c\n===================================================================\n--- gcc/config/s390/s390.c\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/s390/s390.c\t2017-08-28 09:36:10.068827139 +0100\n@@ -10476,6 +10476,29 @@ s390_hard_regno_scratch_ok (unsigned int\n return true;\n }\n \n+/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. When generating\n+ code that runs in z/Architecture mode, but conforms to the 31-bit\n+ ABI, GPRs can hold 8 bytes; the ABI guarantees only that the lower 4\n+ bytes are saved across calls, however. */\n+\n+static bool\n+s390_hard_regno_call_part_clobbered (unsigned int regno, machine_mode mode)\n+{\n+ if (!TARGET_64BIT\n+ && TARGET_ZARCH\n+ && GET_MODE_SIZE (mode) > 4\n+ && ((regno >= 6 && regno <= 15) || regno == 32))\n+ return true;\n+\n+ if (TARGET_VX\n+ && GET_MODE_SIZE (mode) > 8\n+ && (((TARGET_64BIT && regno >= 24 && regno <= 31))\n+\t || (!TARGET_64BIT && (regno == 18 || regno == 19))))\n+ return true;\n+\n+ return false;\n+}\n+\n /* Maximum number of registers to represent a value of mode MODE\n in a register of class RCLASS. */\n \n@@ -15877,6 +15900,10 @@ #define TARGET_CANONICALIZE_COMPARISON s\n #undef TARGET_HARD_REGNO_SCRATCH_OK\n #define TARGET_HARD_REGNO_SCRATCH_OK s390_hard_regno_scratch_ok\n \n+#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED\n+#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \\\n+ s390_hard_regno_call_part_clobbered\n+\n #undef TARGET_ATTRIBUTE_TABLE\n #define TARGET_ATTRIBUTE_TABLE s390_attribute_table\n \nIndex: gcc/config/sh/sh.h\n===================================================================\n--- gcc/config/sh/sh.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/config/sh/sh.h\t2017-08-28 09:36:10.068827139 +0100\n@@ -811,8 +811,6 @@ #define CALL_REALLY_USED_REGISTERS\n 1, 1, 0, 0,\t\t\t\t\t\t\\\n }\n \n-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) (false)\n-\n /* Return number of consecutive hard regs needed starting at reg REGNO\n to hold something of mode MODE.\n This is ordinarily the length in words of a value of mode MODE\nIndex: gcc/system.h\n===================================================================\n--- gcc/system.h\t2017-08-28 09:36:09.610827107 +0100\n+++ gcc/system.h\t2017-08-28 09:36:10.075827140 +0100\n@@ -904,7 +904,8 @@ #define realloc xrealloc\n \tASM_BYTE_OP MEMBER_TYPE_FORCES_BLK LIBGCC2_HAS_SF_MODE\t\t\\\n \tLIBGCC2_HAS_DF_MODE LIBGCC2_HAS_XF_MODE LIBGCC2_HAS_TF_MODE\t\\\n \tCLEAR_BY_PIECES_P MOVE_BY_PIECES_P SET_BY_PIECES_P\t\t\\\n-\tSTORE_BY_PIECES_P TARGET_FLT_EVAL_METHOD\n+\tSTORE_BY_PIECES_P TARGET_FLT_EVAL_METHOD\t\t\t\\\n+\tHARD_REGNO_CALL_PART_CLOBBERED\n \n /* Target macros only used for code built for the target, that have\n moved to libgcc-tm.h or have never been present elsewhere. */\n", "prefixes": [] }