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GET /api/patches/806339/?format=api
{ "id": 806339, "url": "http://patchwork.ozlabs.org/api/patches/806339/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170828015654.2530-5-Sergio.G.DelReal@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170828015654.2530-5-Sergio.G.DelReal@gmail.com>", "list_archive_url": null, "date": "2017-08-28T01:56:44", "name": "[04/14] hvf: add fields to CPUState and CPUX86State; add definitions", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "decd5f7ee9578777ad15129ccb1fddec14f3c2e9", "submitter": { "id": 70675, "url": "http://patchwork.ozlabs.org/api/people/70675/?format=api", "name": "Sergio Andres Gomez Del Real", "email": "sergio.g.delreal@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170828015654.2530-5-Sergio.G.DelReal@gmail.com/mbox/", "series": [ { "id": 56, "url": "http://patchwork.ozlabs.org/api/series/56/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=56", "date": "2017-08-28T01:56:40", "name": "add support for Hypervisor.framework in QEMU", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/56/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806339/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806339/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"HY/6FWR3\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xgZk15Xqpz9sNw\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 28 Aug 2017 12:00:57 +1000 (AEST)", "from localhost ([::1]:36508 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dm9MF-0007AP-KD\n\tfor incoming@patchwork.ozlabs.org; Sun, 27 Aug 2017 22:00:55 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:41996)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <sergio.g.delreal@gmail.com>) id 1dm9Ix-0004rn-ND\n\tfor qemu-devel@nongnu.org; Sun, 27 Aug 2017 21:57:32 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <sergio.g.delreal@gmail.com>) id 1dm9Iw-00010z-FS\n\tfor qemu-devel@nongnu.org; Sun, 27 Aug 2017 21:57:31 -0400", "from mail-vk0-x242.google.com ([2607:f8b0:400c:c05::242]:38039)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <sergio.g.delreal@gmail.com>)\n\tid 1dm9Iw-00010k-9m\n\tfor qemu-devel@nongnu.org; Sun, 27 Aug 2017 21:57:30 -0400", "by mail-vk0-x242.google.com with SMTP id w84so1879879vkd.5\n\tfor <qemu-devel@nongnu.org>; Sun, 27 Aug 2017 18:57:30 -0700 (PDT)", "from localhost.localdomain ([191.109.6.191])\n\tby smtp.gmail.com with ESMTPSA id\n\ty12sm2696824uad.22.2017.08.27.18.57.28\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSun, 27 Aug 2017 18:57:29 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=HZZGcCSvSL78kL4Db7ZyAqa2JGN9UEZ4tyvnrVdF9i4=;\n\tb=HY/6FWR3p6edQShj6irqngnrp5/iIDK7qSdi52sSHcDNC4iwECpLhl+TNEoYr7zlCl\n\tkOS8h27pF2pZrwLXcROdLgl2XAQZ+/szmdMQAsxcYFyAt0hpPTSeUWzFgC5DjhtEsb7m\n\txPEgA0M28oHBfheA5WrMII5r+a2nBLcqCMIXsZIrUAecs929ukZe1h8Ij5Dmtq4ZB2aW\n\ttxz6kXUeFfpT1Sj9xXsItO9QF/31PDD9tNjgi8QzUzdk/jSuSL0TAVzGgK8L9Z4bH9m5\n\tJ5xbW1ulYKYQT8blbIGPMDsi3XL5J24Z3pUah0SFFm9d8rLJ3CojKiPImSfucVgPbwcP\n\tc2Ug==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=HZZGcCSvSL78kL4Db7ZyAqa2JGN9UEZ4tyvnrVdF9i4=;\n\tb=KTCbjBPIX09T94dIC3IUThx7nkEeEUNb12pW7LZUQ9Om/RVxFwdqXN0oUrLWKqW3xz\n\t9juXLkVA1K3TU5WsZiIAK2GgYRaJ1H1qU+NUb/p4pHyKk3r21aKiC9aNwNTMqVuTM6P4\n\tlCHhwV38T/+mDIINet9PJPtq1Gw4lGQSndy9ftQQHs+5RiF3F9W6eNY0xReYzaVP/bbr\n\tTejXJhcRebCrukhOz6bfIu8aL+kADDMv1cxo5IS2NJJtZBgzvzJ9R9VycqwvDg4KZw2M\n\tsPCztbDRSfTR4vILOFEAvm2XaTOMgVeuncql/WAgOwoCwz49i3pcasjhwIMOQcyPXiIF\n\tN2pg==", "X-Gm-Message-State": "AHYfb5gUHwn604j7bFc0SapzHGavExLGLgN6aomaWr2Niqk7CbmAhH6y\n\tuj30OtYfMsvpdiPv", "X-Received": "by 10.31.208.134 with SMTP id h128mr3353148vkg.93.1503885449447; \n\tSun, 27 Aug 2017 18:57:29 -0700 (PDT)", "From": "Sergio Andres Gomez Del Real <sergio.g.delreal@gmail.com>", "X-Google-Original-From": "Sergio Andres Gomez Del Real\n\t<Sergio.G.DelReal@gmail.com>", "To": "qemu-devel@nongnu.org", "Date": "Sun, 27 Aug 2017 20:56:44 -0500", "Message-Id": "<20170828015654.2530-5-Sergio.G.DelReal@gmail.com>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<20170828015654.2530-1-Sergio.G.DelReal@gmail.com>", "References": "<20170828015654.2530-1-Sergio.G.DelReal@gmail.com>", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400c:c05::242", "Subject": "[Qemu-devel] [PATCH 04/14] hvf: add fields to CPUState and\n\tCPUX86State; add definitions", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "This commit adds some fields specific to hvf in CPUState and\nCPUX86State. It also adds some handy #defines.\n\nSigned-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com>\n---\n include/qom/cpu.h | 8 ++++++++\n target/i386/cpu.h | 23 +++++++++++++++++++++++\n 2 files changed, 31 insertions(+)", "diff": "diff --git a/include/qom/cpu.h b/include/qom/cpu.h\nindex 25eefea7ab..c46eb61240 100644\n--- a/include/qom/cpu.h\n+++ b/include/qom/cpu.h\n@@ -407,6 +407,14 @@ struct CPUState {\n * unnecessary flushes.\n */\n uint16_t pending_tlb_flush;\n+\n+ // HVF\n+ bool hvf_vcpu_dirty;\n+ uint64_t hvf_fd; // fd of vcpu created by HVF\n+ // Supporting data structures for VMCS capabilities\n+ // and x86 emulation state\n+ struct hvf_vcpu_caps* hvf_caps;\n+ struct hvf_x86_state* hvf_x86;\n };\n \n QTAILQ_HEAD(CPUTailQ, CPUState);\ndiff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex 051867399b..7d90f08b98 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -82,15 +82,19 @@\n #define R_GS 5\n \n /* segment descriptor fields */\n+#define DESC_G_SHIFT 23\n #define DESC_G_MASK (1 << 23)\n #define DESC_B_SHIFT 22\n #define DESC_B_MASK (1 << DESC_B_SHIFT)\n #define DESC_L_SHIFT 21 /* x86_64 only : 64 bit code segment */\n #define DESC_L_MASK (1 << DESC_L_SHIFT)\n+#define DESC_AVL_SHIFT 20\n #define DESC_AVL_MASK (1 << 20)\n+#define DESC_P_SHIFT 15\n #define DESC_P_MASK (1 << 15)\n #define DESC_DPL_SHIFT 13\n #define DESC_DPL_MASK (3 << DESC_DPL_SHIFT)\n+#define DESC_S_SHIFT 12\n #define DESC_S_MASK (1 << 12)\n #define DESC_TYPE_SHIFT 8\n #define DESC_TYPE_MASK (15 << DESC_TYPE_SHIFT)\n@@ -631,6 +635,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];\n #define CPUID_7_0_EBX_AVX512BW (1U << 30) /* AVX-512 Byte and Word Instructions */\n #define CPUID_7_0_EBX_AVX512VL (1U << 31) /* AVX-512 Vector Length Extensions */\n \n+#define CPUID_7_0_ECX_AVX512BMI (1U << 1)\n #define CPUID_7_0_ECX_VBMI (1U << 1) /* AVX-512 Vector Byte Manipulation Instrs */\n #define CPUID_7_0_ECX_UMIP (1U << 2)\n #define CPUID_7_0_ECX_PKU (1U << 3)\n@@ -806,6 +811,20 @@ typedef struct SegmentCache {\n float64 _d_##n[(bits)/64]; \\\n }\n \n+typedef union {\n+ uint8_t _b[16];\n+ uint16_t _w[8];\n+ uint32_t _l[4];\n+ uint64_t _q[2];\n+} XMMReg;\n+\n+typedef union {\n+ uint8_t _b[32];\n+ uint16_t _w[16];\n+ uint32_t _l[8];\n+ uint64_t _q[4];\n+} YMMReg;\n+\n typedef MMREG_UNION(ZMMReg, 512) ZMMReg;\n typedef MMREG_UNION(MMXReg, 64) MMXReg;\n \n@@ -1041,7 +1060,11 @@ typedef struct CPUX86State {\n ZMMReg xmm_t0;\n MMXReg mmx_t0;\n \n+ XMMReg ymmh_regs[CPU_NB_REGS];\n+\n uint64_t opmask_regs[NB_OPMASK_REGS];\n+ YMMReg zmmh_regs[CPU_NB_REGS];\n+ ZMMReg hi16_zmm_regs[CPU_NB_REGS];\n \n /* sysenter registers */\n uint32_t sysenter_cs;\n", "prefixes": [ "04/14" ] }