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GET /api/patches/806332/?format=api
{ "id": 806332, "url": "http://patchwork.ozlabs.org/api/patches/806332/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/1503879957-30008-1-git-send-email-festevam@gmail.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503879957-30008-1-git-send-email-festevam@gmail.com>", "list_archive_url": null, "date": "2017-08-28T00:25:57", "name": "[RESEND] PCI: rockchip: Use gpiod_set_value_cansleep() to allow reset via expanders", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "c0115243f3494d33db5ac66e1843fd391f80bb6b", "submitter": { "id": 6978, "url": "http://patchwork.ozlabs.org/api/people/6978/?format=api", "name": "Fabio Estevam", "email": "festevam@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/1503879957-30008-1-git-send-email-festevam@gmail.com/mbox/", "series": [ { "id": 55, "url": "http://patchwork.ozlabs.org/api/series/55/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=55", "date": "2017-08-28T00:25:57", "name": "[RESEND] PCI: rockchip: Use gpiod_set_value_cansleep() to allow reset via expanders", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/55/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806332/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806332/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-pci-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"mZZWAIo+\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgXcm1ZcZz9s7v\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 28 Aug 2017 10:26:16 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751742AbdH1A0O (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tSun, 27 Aug 2017 20:26:14 -0400", "from mail-qt0-f195.google.com ([209.85.216.195]:35013 \"EHLO\n\tmail-qt0-f195.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751473AbdH1A0O (ORCPT\n\t<rfc822; linux-pci@vger.kernel.org>); Sun, 27 Aug 2017 20:26:14 -0400", "by mail-qt0-f195.google.com with SMTP id u11so4022236qtu.2\n\tfor <linux-pci@vger.kernel.org>; Sun, 27 Aug 2017 17:26:13 -0700 (PDT)", "from localhost.localdomain ([187.180.183.214])\n\tby smtp.gmail.com with ESMTPSA id\n\tt36sm7324927qtd.50.2017.08.27.17.26.11\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tSun, 27 Aug 2017 17:26:12 -0700 (PDT)" ], "DKIM-Signature": "v=1; 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\n\tSun, 27 Aug 2017 17:26:13 -0700 (PDT)", "From": "Fabio Estevam <festevam@gmail.com>", "To": "bhelgaas@google.com", "Cc": "shawn.lin@rock-chips.com, heiko@sntech.de,\n\tlinux-pci@vger.kernel.org, Fabio Estevam <festevam@gmail.com>", "Subject": "[PATCH RESEND] PCI: rockchip: Use gpiod_set_value_cansleep() to\n\tallow reset via expanders", "Date": "Sun, 27 Aug 2017 21:25:57 -0300", "Message-Id": "<1503879957-30008-1-git-send-email-festevam@gmail.com>", "X-Mailer": "git-send-email 2.7.4", "Sender": "linux-pci-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-pci.vger.kernel.org>", "X-Mailing-List": "linux-pci@vger.kernel.org" }, "content": "The reset GPIO can be connected to a I2C or SPI IO expander, which may\nsleep, so it is safer to use the gpiod_set_value_cansleep() variant\ninstead.\n\nSigned-off-by: Fabio Estevam <festevam@gmail.com>\n---\nChanges since v1:\n- Resending with Shawn Lin added on Cc.\n\n drivers/pci/host/pcie-rockchip.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c\nindex 2eccd53..124b280 100644\n--- a/drivers/pci/host/pcie-rockchip.c\n+++ b/drivers/pci/host/pcie-rockchip.c\n@@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)\n \tint err, i;\n \tu32 status;\n \n-\tgpiod_set_value(rockchip->ep_gpio, 0);\n+\tgpiod_set_value_cansleep(rockchip->ep_gpio, 0);\n \n \terr = reset_control_assert(rockchip->aclk_rst);\n \tif (err) {\n@@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)\n \trockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,\n \t\t\t PCIE_CLIENT_CONFIG);\n \n-\tgpiod_set_value(rockchip->ep_gpio, 1);\n+\tgpiod_set_value_cansleep(rockchip->ep_gpio, 1);\n \n \t/* 500ms timeout value should be enough for Gen1/2 training */\n \terr = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,\n", "prefixes": [ "RESEND" ] }