Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/806258/?format=api
{ "id": 806258, "url": "http://patchwork.ozlabs.org/api/patches/806258/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170827152351.20609-3-sjg@chromium.org/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170827152351.20609-3-sjg@chromium.org>", "list_archive_url": null, "date": "2017-08-27T15:23:47", "name": "[U-Boot,v2,2/6] dm: x86: Allow TSC timer to be used before DM is ready", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "f0cb1ba39de16ad6b52c3f5274816a44039956c8", "submitter": { "id": 6170, "url": "http://patchwork.ozlabs.org/api/people/6170/?format=api", "name": "Simon Glass", "email": "sjg@chromium.org" }, "delegate": { "id": 56520, "url": "http://patchwork.ozlabs.org/api/users/56520/?format=api", "username": "bmeng", "first_name": "Bin", "last_name": "Meng", "email": "bmeng.cn@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170827152351.20609-3-sjg@chromium.org/mbox/", "series": [ { "id": 26, "url": "http://patchwork.ozlabs.org/api/series/26/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=26", "date": "2017-08-27T15:23:45", "name": "x86: bootstage: Fix bootstage operation on link", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/26/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806258/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806258/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=google.com header.i=@google.com\n\theader.b=\"eoCmjyRO\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgJdv5dS4z9s8V\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 28 Aug 2017 01:26:27 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 85C5CC2223A; Sun, 27 Aug 2017 15:25:07 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 301B1C2224B;\n\tSun, 27 Aug 2017 15:24:30 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 70784C22247; Sun, 27 Aug 2017 15:24:06 +0000 (UTC)", "from mail-oi0-f48.google.com (mail-oi0-f48.google.com\n\t[209.85.218.48])\n\tby lists.denx.de (Postfix) with ESMTPS id 8D072C2222B\n\tfor <u-boot@lists.denx.de>; Sun, 27 Aug 2017 15:24:03 +0000 (UTC)", "by mail-oi0-f48.google.com with SMTP id r203so25851066oih.0\n\tfor <u-boot@lists.denx.de>; Sun, 27 Aug 2017 08:24:03 -0700 (PDT)", "from kaki.bld.corp.google.com ([100.100.197.131])\n\tby smtp.gmail.com with ESMTPSA id\n\tr8sm10940185oih.37.2017.08.27.08.23.58\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSun, 27 Aug 2017 08:23:58 -0700 (PDT)", "by kaki.bld.corp.google.com (Postfix, from userid 121222)\n\tid 1628C40198; Sun, 27 Aug 2017 09:23:58 -0600 (MDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H2,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com;\n\ts=20161025; \n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=mFkYz+37f4/rwYVWOJI84pujzmqVuSdVW7N4BFFS/Ts=;\n\tb=eoCmjyRO9VGW7zPIcFRS+pOQw1Jcq4V183TsnhHin8yWR7DUwU+GJ9UYn18zBur0+K\n\tIqrAEbkU51xVsxedXrj0dNRFqhca2jtS6OAAZj+Uq4JG9IIVB1ONi4vA5ANFQhYvHSsl\n\t+WcOuRNE/zHghPTwRTItTW/BdWTFlmMsK0oS+JU8tMUz+MON+7DsWcAF5WFbx6ovw5vf\n\t5fULr32xC5Ycpv80sUv+s2eaIulRatpcUbsU7UwHlE9mHN4h++7Gkeslxu4vtTgPWihz\n\tLQh0iwxOqf4So7TO/QM4FQvm0NQ10HSCd1TVhuDOAVMUEIIviVD4DsoqBW6PfH56Zag7\n\t0uoQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=mFkYz+37f4/rwYVWOJI84pujzmqVuSdVW7N4BFFS/Ts=;\n\tb=qpYeY6Xx4ADK/bCrq3AJlkxJ1tzVpkAu6b56C0TCrWOq0sJHyQxpqo2PxkgzuNFe+z\n\tVBbi9bO6R7XOtwxGrGGsCxzo2Ap5S/VSplX/H2teakhrEURUZYfY+i8yqzV1+4M95NOn\n\t3BXzS9UgcUWIiGlHpsOE4GE/kChYeDJggDwJF0tpH2YMt75JUlUW3+meIEl/r4Kcp+HT\n\t24btdVX14m3ik9nz6lGBleH20a/82EHqpXCSEtGM+L6fkJMqeA4SO3M0v3hRGfI6VGpe\n\tfMv0gJfMYULfUvCYGavWdMHqZBCoIo7Ld1DxO2romqY9vuKNHtr6APZuo3BeOFpw2gMs\n\toPJA==", "X-Gm-Message-State": "AHYfb5j96itpOUEGbIdyihSPnmsiTrbbwOQ20yuE45YZIPTwuUyZot0c\n\tae83SGyRFfLcLxsH", "X-Google-Smtp-Source": "ADKCNb6mQtHsNWindbufIBwnm802Rr3XDyMDZtC4L9o20JdYUJrA/lF4tl1G05W1GP3UwgdB+A6Aqg==", "X-Received": "by 10.202.220.133 with SMTP id\n\tt127mr5951818oig.242.1503847441893; \n\tSun, 27 Aug 2017 08:24:01 -0700 (PDT)", "From": "Simon Glass <sjg@chromium.org>", "To": "U-Boot Mailing List <u-boot@lists.denx.de>", "Date": "Sun, 27 Aug 2017 09:23:47 -0600", "Message-Id": "<20170827152351.20609-3-sjg@chromium.org>", "X-Mailer": "git-send-email 2.14.1.342.g6490525c54-goog", "In-Reply-To": "<20170827152351.20609-1-sjg@chromium.org>", "References": "<20170827152351.20609-1-sjg@chromium.org>", "Subject": "[U-Boot] [PATCH v2 2/6] dm: x86: Allow TSC timer to be used before\n\tDM is ready", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "With bootstage we need access to the timer before driver model is set up.\nTo handle this, put the required state in global_data and provide a new\nfunction to set up the device, separate from the driver's probe() method.\n\nThis will be used by the 'early' timer also.\n\nSigned-off-by: Simon Glass <sjg@chromium.org>\n---\n\nChanges in v2:\n- Update to support the early timer\n\n arch/x86/include/asm/global_data.h | 1 +\n drivers/timer/tsc_timer.c | 30 +++++++++++++++++++++++++-----\n 2 files changed, 26 insertions(+), 5 deletions(-)", "diff": "diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h\nindex 93a80fe2b6c..fcb6853a380 100644\n--- a/arch/x86/include/asm/global_data.h\n+++ b/arch/x86/include/asm/global_data.h\n@@ -77,6 +77,7 @@ struct arch_global_data {\n \tuint8_t x86_mask;\n \tuint32_t x86_device;\n \tuint64_t tsc_base;\t\t/* Initial value returned by rdtsc() */\n+\tunsigned long clock_rate;\t/* Clock rate of timer in Hz */\n \tvoid *new_fdt;\t\t\t/* Relocated FDT */\n \tuint32_t bist;\t\t\t/* Built-in self test value */\n \tenum pei_boot_mode_t pei_boot_mode;\ndiff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c\nindex 4d1fc9cd137..0012fecde09 100644\n--- a/drivers/timer/tsc_timer.c\n+++ b/drivers/timer/tsc_timer.c\n@@ -328,17 +328,17 @@ static int tsc_timer_get_count(struct udevice *dev, u64 *count)\n \treturn 0;\n }\n \n-static int tsc_timer_probe(struct udevice *dev)\n+static void tsc_timer_ensure_setup(void)\n {\n-\tstruct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);\n-\n+\tif (gd->arch.tsc_base)\n+\t\treturn;\n \tgd->arch.tsc_base = rdtsc();\n \n \t/*\n \t * If there is no clock frequency specified in the device tree,\n \t * calibrate it by ourselves.\n \t */\n-\tif (!uc_priv->clock_rate) {\n+\tif (!gd->arch.clock_rate) {\n \t\tunsigned long fast_calibrate;\n \n \t\tfast_calibrate = cpu_mhz_from_msr();\n@@ -348,12 +348,32 @@ static int tsc_timer_probe(struct udevice *dev)\n \t\t\t\tpanic(\"TSC frequency is ZERO\");\n \t\t}\n \n-\t\tuc_priv->clock_rate = fast_calibrate * 1000000;\n+\t\tgd->arch.clock_rate = fast_calibrate * 1000000;\n \t}\n+}\n+\n+static int tsc_timer_probe(struct udevice *dev)\n+{\n+\tstruct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);\n+\n+\ttsc_timer_ensure_setup();\n+\tuc_priv->clock_rate = gd->arch.clock_rate;\n \n \treturn 0;\n }\n \n+unsigned long notrace timer_early_get_rate(void)\n+{\n+\ttsc_timer_ensure_setup();\n+\n+\treturn gd->arch.clock_rate;\n+}\n+\n+u64 notrace timer_early_get_count(void)\n+{\n+\treturn rdtsc() - gd->arch.tsc_base;\n+}\n+\n static const struct timer_ops tsc_timer_ops = {\n \t.get_count = tsc_timer_get_count,\n };\n", "prefixes": [ "U-Boot", "v2", "2/6" ] }