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GET /api/patches/806248/?format=api
{ "id": 806248, "url": "http://patchwork.ozlabs.org/api/patches/806248/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1503841421-17677-1-git-send-email-aisheng.dong@nxp.com/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503841421-17677-1-git-send-email-aisheng.dong@nxp.com>", "list_archive_url": null, "date": "2017-08-27T13:43:41", "name": "[1/1] ARM: imx7ulp: add cpuidle support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f4120f1c55fd5aee6cec7556a854b7f78e560194", "submitter": { "id": 71420, "url": "http://patchwork.ozlabs.org/api/people/71420/?format=api", "name": "Aisheng Dong", "email": "aisheng.dong@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1503841421-17677-1-git-send-email-aisheng.dong@nxp.com/mbox/", "series": [ { "id": 23, "url": "http://patchwork.ozlabs.org/api/series/23/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=23", "date": "2017-08-27T13:43:41", "name": "[1/1] ARM: imx7ulp: add cpuidle support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/23/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/806248/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806248/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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Sun, 27 Aug 2017 13:44:16 +0000", "from BN1AFFO11OLC001.protection.gbl (2a01:111:f400:7c10::170) by\n\tBN6PR03CA0014.outlook.office365.com (2603:10b6:404:23::24) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1385.9 via\n\tFrontend Transport; Sun, 27 Aug 2017 13:44:16 +0000", "from az84smr01.freescale.net (192.88.158.2) by\n\tBN1AFFO11OLC001.mail.protection.outlook.com (10.58.53.72) with\n\tMicrosoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1341.15\n\tvia Frontend Transport; Sun, 27 Aug 2017 13:44:15 +0000", "from b29396-OptiPlex-7040.ap.freescale.net\n\t(b29396-OptiPlex-7040.ap.freescale.net [10.192.242.182])\n\tby az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv7RDiAks018325; Sun, 27 Aug 2017 06:44:10 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To\n\t:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:\n\tResent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:\n\tList-Owner; bh=B7Z9wgvHEi+LH1iW00fSk7neTTYHqcUCHpHwC7f7MGw=;\n\tb=mZy8VnYUCwvbQb\n\tSRQuMzqMBY+amKNlQPfjMFnpa4hpazOoJs5kTvEioWPYhHOEb/a6+W9JFxYpOIG36qEbXAaUVis5T\n\tuSt9Kahe6A/dbWYYz6raL7QdA7k6Z5kLpeBmVP4XKzGsHRexzpZAr0xL2HP3yt8DZKsDcYI2m2s+r\n\tkKx4/bfLttEsPZtpEFe+wd3o6c+LYSAnfibbReZOzQUU61dH9u3NUFFt2YIgEvmc66y8pGGjEKNZs\n\ttw8ZApBE2i048uPy9GpWVnYh8CccDM0f13oYxyZQ/Z6jCSn2BJEsMcte/mtyNUteuRCVK1iY8NlTj\n\tzh7mhs1WYmK232bzP/tw==;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.158.2 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.158.2; helo=az84smr01.freescale.net;", "From": "Dong Aisheng <aisheng.dong@nxp.com>", "To": "<linux-pm@vger.kernel.org>", "Subject": "[PATCH 1/1] ARM: imx7ulp: add cpuidle support", "Date": "Sun, 27 Aug 2017 21:43:41 +0800", "Message-ID": "<1503841421-17677-1-git-send-email-aisheng.dong@nxp.com>", "X-Mailer": "git-send-email 2.7.4", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131483150558907510;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); 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BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:BN6PR03MB3315; ", "X-Forefront-PRVS": "0412A98A59", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Aug 2017 13:44:15.6567\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.158.2]; \n\tHelo=[az84smr01.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN6PR03MB3315", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170827_064441_312878_860E2481 ", "X-CRM114-Status": "GOOD ( 18.12 )", "X-Spam-Score": "-1.9 (-)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.0 T_SPF_PERMERROR SPF: test of record failed (permerror)\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "Dong Aisheng <aisheng.dong@nxp.com>, Anson.Huang@nxp.com,\n\tdaniel.lezcano@linaro.org, rjw@rjwysocki.net, shawnguo@kernel.org,\n\tlinux-arm-kernel@lists.infradead.org", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "i.MX7ULP support 3 levels idle as below:\n1. patial stop mode 3;\n2. patial stop mode 2;\n3. patial stop mode 1.\n\nPSTOP1 - Partial Stop with system and bus clock disabled\nPSTOP2 - Partial Stop with system clock disabled and bus clock enabled\nPSTOP3 - Partial Stop with system clock enabled and bus clock enabled\n\nFor PSTOP 1/2 mode, as the system and bus clock will be disabled, the\ndevices working inprogress may not be able to work anymore, driver needs\nto use pm_qos API to prevent system enter those modes.\n\nCc: \"Rafael J. Wysocki\" <rjw@rjwysocki.net>\nCc: Daniel Lezcano <daniel.lezcano@linaro.org>\nCc: Shawn Guo <shawnguo@kernel.org>\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>\nSigned-off-by: Dong Aisheng <aisheng.dong@nxp.com>\n---\n arch/arm/mach-imx/Makefile | 1 +\n arch/arm/mach-imx/common.h | 12 +++++++\n arch/arm/mach-imx/cpuidle-imx7ulp.c | 69 +++++++++++++++++++++++++++++++++++++\n arch/arm/mach-imx/cpuidle.h | 5 +++\n arch/arm/mach-imx/mach-imx7ulp.c | 7 ++++\n arch/arm/mach-imx/pm-imx7ulp.c | 65 +++++++++++++++++++++++++++++++---\n 6 files changed, 155 insertions(+), 4 deletions(-)\n create mode 100644 arch/arm/mach-imx/cpuidle-imx7ulp.c", "diff": "diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile\nindex c5948b7..a3f55a9 100644\n--- a/arch/arm/mach-imx/Makefile\n+++ b/arch/arm/mach-imx/Makefile\n@@ -28,6 +28,7 @@ obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o\n obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o\n obj-$(CONFIG_SOC_IMX6SX) += cpuidle-imx6sx.o\n obj-$(CONFIG_SOC_IMX6UL) += cpuidle-imx6sx.o\n+obj-$(CONFIG_SOC_IMX7ULP) += cpuidle-imx7ulp.o\n endif\n \n ifdef CONFIG_SND_IMX_SOC\ndiff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h\nindex b0e85df..9b78902 100644\n--- a/arch/arm/mach-imx/common.h\n+++ b/arch/arm/mach-imx/common.h\n@@ -78,6 +78,17 @@ enum mx3_cpu_pwr_mode {\n \tMX3_SLEEP,\n };\n \n+enum imx7ulp_cpu_pwr_mode {\n+\tHSRUN,\n+\tRUN,\n+\tVLPR,\n+\tWAIT,\n+\tVLPW,\n+\tSTOP,\n+\tVLPS,\n+\tVLLS,\n+};\n+\n void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);\n \n void imx_enable_cpu(int cpu, bool enable);\n@@ -106,6 +117,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);\n void imx6_set_int_mem_clk_lpm(bool enable);\n void imx6sl_set_wait_clk(bool enter);\n int imx_mmdc_get_ddr_type(void);\n+int imx7ulp_set_lpm(enum imx7ulp_cpu_pwr_mode mode);\n \n void imx_cpu_die(unsigned int cpu);\n int imx_cpu_kill(unsigned int cpu);\ndiff --git a/arch/arm/mach-imx/cpuidle-imx7ulp.c b/arch/arm/mach-imx/cpuidle-imx7ulp.c\nnew file mode 100644\nindex 0000000..f165d85\n--- /dev/null\n+++ b/arch/arm/mach-imx/cpuidle-imx7ulp.c\n@@ -0,0 +1,69 @@\n+/*\n+ * Copyright (C) 2016 Freescale Semiconductor, Inc.\n+ * Copyright (C) 2017 NXP.\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License version 2 as\n+ * published by the Free Software Foundation.\n+ */\n+\n+#include <linux/cpuidle.h>\n+#include <linux/module.h>\n+#include <asm/cpuidle.h>\n+\n+#include \"common.h\"\n+#include \"cpuidle.h\"\n+#include \"hardware.h\"\n+\n+static int imx7ulp_enter_idle(struct cpuidle_device *dev,\n+\t\t\t struct cpuidle_driver *drv, int index)\n+{\n+\tswitch (index) {\n+\tcase 1:\n+\t\timx7ulp_set_lpm(WAIT);\n+\t\tbreak;\n+\tcase 2:\n+\t\timx7ulp_set_lpm(STOP);\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\tcpu_do_idle();\n+\n+\timx7ulp_set_lpm(RUN);\n+\n+\treturn index;\n+}\n+\n+static struct cpuidle_driver imx7ulp_cpuidle_driver = {\n+\t.name = \"imx7ulp_cpuidle\",\n+\t.owner = THIS_MODULE,\n+\t.states = {\n+\t\t/* WFI */\n+\t\tARM_CPUIDLE_WFI_STATE,\n+\t\t/* WAIT */\n+\t\t{\n+\t\t\t.exit_latency = 50,\n+\t\t\t.target_residency = 75,\n+\t\t\t.enter = imx7ulp_enter_idle,\n+\t\t\t.name = \"WAIT\",\n+\t\t\t.desc = \"PSTOP2\",\n+\t\t},\n+\t\t/* STOP */\n+\t\t{\n+\t\t\t.exit_latency = 100,\n+\t\t\t.target_residency = 150,\n+\t\t\t.enter = imx7ulp_enter_idle,\n+\t\t\t.name = \"STOP\",\n+\t\t\t.desc = \"PSTOP1\",\n+\t\t},\n+\t},\n+\t.state_count = 3,\n+\t.safe_state_index = 0,\n+};\n+\n+int __init imx7ulp_cpuidle_init(void)\n+{\n+\treturn cpuidle_register(&imx7ulp_cpuidle_driver, NULL);\n+}\ndiff --git a/arch/arm/mach-imx/cpuidle.h b/arch/arm/mach-imx/cpuidle.h\nindex f914012..7694c8f 100644\n--- a/arch/arm/mach-imx/cpuidle.h\n+++ b/arch/arm/mach-imx/cpuidle.h\n@@ -15,6 +15,7 @@ extern int imx5_cpuidle_init(void);\n extern int imx6q_cpuidle_init(void);\n extern int imx6sl_cpuidle_init(void);\n extern int imx6sx_cpuidle_init(void);\n+extern int imx7ulp_cpuidle_init(void);\n #else\n static inline int imx5_cpuidle_init(void)\n {\n@@ -32,4 +33,8 @@ static inline int imx6sx_cpuidle_init(void)\n {\n \treturn 0;\n }\n+static inline int imx7ulp_cpuidle_init(void)\n+{\n+\treturn 0;\n+}\n #endif\ndiff --git a/arch/arm/mach-imx/mach-imx7ulp.c b/arch/arm/mach-imx/mach-imx7ulp.c\nindex 9f7a25c..1d8fe71 100644\n--- a/arch/arm/mach-imx/mach-imx7ulp.c\n+++ b/arch/arm/mach-imx/mach-imx7ulp.c\n@@ -15,8 +15,14 @@\n #include <asm/mach/arch.h>\n \n #include \"common.h\"\n+#include \"cpuidle.h\"\n #include \"hardware.h\"\n \n+static void __init imx7ulp_init_late(void)\n+{\n+\timx7ulp_cpuidle_init();\n+}\n+\n static void __init imx7ulp_init_machine(void)\n {\n \timx7ulp_pm_init();\n@@ -33,5 +39,6 @@ static const char *const imx7ulp_dt_compat[] __initconst = {\n \n DT_MACHINE_START(IMX7ulp, \"Freescale i.MX7ULP (Device Tree)\")\n \t.init_machine\t= imx7ulp_init_machine,\n+\t.init_late\t= imx7ulp_init_late,\n \t.dt_compat\t= imx7ulp_dt_compat,\n MACHINE_END\ndiff --git a/arch/arm/mach-imx/pm-imx7ulp.c b/arch/arm/mach-imx/pm-imx7ulp.c\nindex df5d6b6..5f85040 100644\n--- a/arch/arm/mach-imx/pm-imx7ulp.c\n+++ b/arch/arm/mach-imx/pm-imx7ulp.c\n@@ -14,20 +14,77 @@\n #include <linux/of.h>\n #include <linux/of_address.h>\n \n+#include \"common.h\"\n+\n+/* SMC registers */\n+#define SMC_PMPROT\t\t0x8\n #define SMC_PMCTRL\t\t0x10\n+#define SMC_PMSTAT\t\t0x18\n+#define SMC_SRS\t\t\t0x20\n+#define SMC_RPC\t\t\t0x24\n+#define SMC_SSRS\t\t0x28\n+#define SMC_SRIE\t\t0x2c\n+#define SMC_SRIF\t\t0x30\n+#define SMC_CSRE\t\t0x34\n+#define SMC_MR\t\t\t0x40\n+#define SMC_FM\t\t\t0x40\n+\n+/* PMPROT */\n+#define BM_PMPROT_AHSRUN BIT(7)\n+#define BM_PMPROT_AVLP BIT(5)\n+#define BM_PMPROT_ALLS BIT(3)\n+#define BM_PMPROT_AVLLS BIT(1)\n+\n+/* PMCTRL */\n+#define BM_PMCTRL_STOPA (0x1 << 24)\n #define BP_PMCTRL_PSTOPO 16\n+#define BM_PMCTRL_PSTOPO (0x3 << BP_PMCTRL_PSTOPO)\n+#define BP_PMCTRL_RUNM\t\t8\n+#define BM_PMCTRL_RUNM (0x3 << BP_PMCTRL_RUNM)\n+#define BP_PMCTRL_STOPM\t\t0\n+#define BM_PMCTRL_STOPM (0x7 << BP_PMCTRL_STOPM)\n+\n #define PSTOPO_PSTOP3\t\t0x3\n+#define PSTOPO_PSTOP2\t\t0x2\n+#define PSTOPO_PSTOP1\t\t0x1\n+\n+static void __iomem *smc1_base;\n+\n+int imx7ulp_set_lpm(enum imx7ulp_cpu_pwr_mode mode)\n+{\n+\tu32 smc_ctrl = readl_relaxed(smc1_base + SMC_PMCTRL);\n+\n+\tsmc_ctrl &= ~(BM_PMCTRL_RUNM | BM_PMCTRL_STOPM | BM_PMCTRL_PSTOPO);\n+\n+\tswitch (mode) {\n+\tcase RUN:\n+\t\t/* system/bus clock enabled */\n+\t\tsmc_ctrl |= PSTOPO_PSTOP3 << BP_PMCTRL_PSTOPO;\n+\t\tbreak;\n+\tcase WAIT:\n+\t\t/* system clock disabled, bus clock enabled */\n+\t\tsmc_ctrl |= PSTOPO_PSTOP2 << BP_PMCTRL_PSTOPO;\n+\t\tbreak;\n+\tcase STOP:\n+\t\t/* system/bus clock disabled */\n+\t\tsmc_ctrl |= PSTOPO_PSTOP1 << BP_PMCTRL_PSTOPO;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\twritel_relaxed(smc_ctrl, smc1_base + SMC_PMCTRL);\n+\n+\treturn 0;\n+}\n \n void __init imx7ulp_pm_init(void)\n {\n \tstruct device_node *np;\n-\tvoid __iomem *smc1_base;\n \n \tnp = of_find_compatible_node(NULL, NULL, \"fsl,imx7ulp-smc1\");\n \tsmc1_base = of_iomap(np, 0);\n \tWARN_ON(!smc1_base);\n \n-\t/* Partial Stop mode 3 with system/bus clock enabled */\n-\twritel_relaxed(PSTOPO_PSTOP3 << BP_PMCTRL_PSTOPO,\n-\t\t smc1_base + SMC_PMCTRL);\n+\timx7ulp_set_lpm(RUN);\n }\n", "prefixes": [ "1/1" ] }