get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/804835/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 804835,
    "url": "http://patchwork.ozlabs.org/api/patches/804835/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/1503471758-73904-1-git-send-email-shawn.lin@rock-chips.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1503471758-73904-1-git-send-email-shawn.lin@rock-chips.com>",
    "list_archive_url": null,
    "date": "2017-08-23T07:02:38",
    "name": "[v5,04/10] PCI: rockchip: fix system hang up if activating CONFIG_DEBUG_SHIRQ",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": false,
    "hash": "8e5846d21fc27d82c397300107aceaafd773bb94",
    "submitter": {
        "id": 66993,
        "url": "http://patchwork.ozlabs.org/api/people/66993/?format=api",
        "name": "Shawn Lin",
        "email": "shawn.lin@rock-chips.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/1503471758-73904-1-git-send-email-shawn.lin@rock-chips.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/804835/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/804835/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-pci-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)",
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xcdgj24fgz9sNd\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 23 Aug 2017 17:03:45 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753359AbdHWHDo (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tWed, 23 Aug 2017 03:03:44 -0400",
            "from lucky1.263xmail.com ([211.157.147.132]:44756 \"EHLO\n\tlucky1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753238AbdHWHDo (ORCPT\n\t<rfc822; linux-pci@vger.kernel.org>); Wed, 23 Aug 2017 03:03:44 -0400",
            "from shawn.lin?rock-chips.com (unknown [192.168.167.230])\n\tby lucky1.263xmail.com (Postfix) with ESMTP id D36A4645A9;\n\tWed, 23 Aug 2017 15:03:40 +0800 (CST)",
            "from localhost.localdomain (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id 6A7733C3;\n\tWed, 23 Aug 2017 15:03:37 +0800 (CST)",
            "from localhost.localdomain (unknown [58.22.7.114])\n\tby smtp.263.net (Postfix) whith ESMTP id 1498ZYQ7TC;\n\tWed, 23 Aug 2017 15:03:39 +0800 (CST)"
        ],
        "X-263anti-spam": "KSV:0;",
        "X-MAIL-GRAY": "1",
        "X-MAIL-DELIVERY": "0",
        "X-KSVirus-check": "0",
        "X-ABS-CHECKED": "4",
        "X-RL-SENDER": "shawn.lin@rock-chips.com",
        "X-FST-TO": "bhelgaas@google.com",
        "X-SENDER-IP": "58.22.7.114",
        "X-LOGIN-NAME": "shawn.lin@rock-chips.com",
        "X-UNIQUE-TAG": "<ffd2f13995a03ff1f43d11215f7d0733>",
        "X-ATTACHMENT-NUM": "0",
        "X-SENDER": "lintao@rock-chips.com",
        "X-DNS-TYPE": "0",
        "From": "Shawn Lin <shawn.lin@rock-chips.com>",
        "To": "Bjorn Helgaas <bhelgaas@google.com>",
        "Cc": "linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,\n\tBrian Norris <briannorris@chromium.org>,\n\tJeffy Chen <jeffy.chen@rock-chips.com>,\n\tShawn Lin <shawn.lin@rock-chips.com>",
        "Subject": "[PATCH v5 04/10] PCI: rockchip: fix system hang up if activating\n\tCONFIG_DEBUG_SHIRQ",
        "Date": "Wed, 23 Aug 2017 15:02:38 +0800",
        "Message-Id": "<1503471758-73904-1-git-send-email-shawn.lin@rock-chips.com>",
        "X-Mailer": "git-send-email 1.9.1",
        "In-Reply-To": "<1503471673-69478-1-git-send-email-shawn.lin@rock-chips.com>",
        "References": "<1503471673-69478-1-git-send-email-shawn.lin@rock-chips.com>",
        "Sender": "linux-pci-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-pci.vger.kernel.org>",
        "X-Mailing-List": "linux-pci@vger.kernel.org"
    },
    "content": "With CONFIG_DEBUG_SHIRQ enabled, the irq tear down routine\nwould still access the irq handler registed as a shard irq.\nPer the comment within the function of __free_irq, it says\n\"It's a shared IRQ -- the driver ought to be prepared for\nan IRQ event to happen even now it's being freed\". However\nwhen failing to probe the driver, it may disable the clock\nfor accessing the register and the following check for shared\nirq state would call the irq handler which accesses the register\nw/o the clk enabled. That will hang the system forever.\n\nWith adding some dump_stack we could see how that happened.\n\ncalling  rockchip_pcie_driver_init+0x0/0x28 @ 1\nrockchip-pcie f8000000.pcie: no vpcie3v3 regulator found\nrockchip-pcie f8000000.pcie: no vpcie1v8 regulator found\nrockchip-pcie f8000000.pcie: no vpcie0v9 regulator found\nrockchip-pcie f8000000.pcie: PCIe link training gen1 timeout!\nCPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.13.0-rc3-next-20170807-ARCH+ #189\nHardware name: Firefly-RK3399 Board (DT)\nCall trace:\n[<ffff000008089bf0>] dump_backtrace+0x0/0x250\n[<ffff000008089eb0>] show_stack+0x20/0x28\n[<ffff000008c3313c>] dump_stack+0x90/0xb0\n[<ffff000008632ad4>] rockchip_pcie_read.isra.11+0x54/0x58\n[<ffff0000086334fc>] rockchip_pcie_client_irq_handler+0x30/0x1a0\n[<ffff00000813ce98>] __free_irq+0x1c8/0x2dc\n[<ffff00000813d044>] free_irq+0x44/0x74\n[<ffff0000081415fc>] devm_irq_release+0x24/0x2c\n[<ffff00000877429c>] release_nodes+0x1d8/0x30c\n[<ffff000008774838>] devres_release_all+0x3c/0x5c\n[<ffff00000876f19c>] driver_probe_device+0x244/0x494\n[<ffff00000876f50c>] __driver_attach+0x120/0x124\n[<ffff00000876cb80>] bus_for_each_dev+0x6c/0xac\n[<ffff00000876e984>] driver_attach+0x2c/0x34\n[<ffff00000876e3a4>] bus_add_driver+0x244/0x2b0\n[<ffff000008770264>] driver_register+0x70/0x110\n[<ffff0000087718b4>] platform_driver_register+0x60/0x6c\n[<ffff0000091eb108>] rockchip_pcie_driver_init+0x20/0x28\n[<ffff000008083a2c>] do_one_initcall+0xc8/0x130\n[<ffff0000091a0ea8>] kernel_init_freeable+0x1a0/0x238\n[<ffff000008c461cc>] kernel_init+0x18/0x108\n[<ffff0000080836c0>] ret_from_fork+0x10/0x50\n\nIn order to fix this, we remove all the clock-disabling from\nthe error handle path and driver's remove function. And replying\non the devm_add_action_or_reset to fire the clock-disabling at\nthe appropriate time. Also split out rockchip_pcie_setup_irq\nand move requesting irq after enabling clks to avoid this kind\n\nSigned-off-by: Shawn Lin <shawn.lin@rock-chips.com>\n\n---\n\nChanges in v5:\n- rebase on former reconstrtion patches suggested by Bjorn\n\nChanges in v4:\n- split out rockchip_pcie_enable_clocks and reuse\n  rockchip_pcie_enable_clocks and rockchip_pcie_disable_clocks\n  for elsewhere suggested by Jeffy\n\nChanges in v3:\n- check the return value of devm_add_action_or_reset and spilt out\n  rockchip_pcie_setup_irq in order to move requesting irq after\n  enabling clks.\n\nChanges in v2:\n- use devm_add_action_or_reset to fix this ordering suggested by\n  Heiko and Jeffy. Thanks!\n\n drivers/pci/host/pcie-rockchip.c | 22 +++++++++++++---------\n 1 file changed, 13 insertions(+), 9 deletions(-)",
    "diff": "diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c\nindex 971d22b..891b60a 100644\n--- a/drivers/pci/host/pcie-rockchip.c\n+++ b/drivers/pci/host/pcie-rockchip.c\n@@ -1099,10 +1099,6 @@ static int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)\n \t\treturn PTR_ERR(rockchip->clk_pcie_pm);\n \t}\n \n-\terr = rockchip_pcie_setup_irq(rockchip);\n-\tif (err)\n-\t\treturn err;\n-\n \trockchip->vpcie12v = devm_regulator_get_optional(dev, \"vpcie12v\");\n \tif (IS_ERR(rockchip->vpcie12v)) {\n \t\tif (PTR_ERR(rockchip->vpcie12v) == -EPROBE_DEFER)\n@@ -1525,10 +1521,22 @@ static int rockchip_pcie_probe(struct platform_device *pdev)\n \tif (err)\n \t\treturn err;\n \n+\terr = devm_add_action_or_reset(dev,\n+\t\t\t\t       rockchip_pcie_disable_clocks,\n+\t\t\t\t       rockchip);\n+\tif (err) {\n+\t\tdev_err(dev, \"unable to add action or reset\\n\");\n+\t\treturn err;\n+\t}\n+\n+\terr = rockchip_pcie_setup_irq(rockchip);\n+\tif (err)\n+\t\treturn err;\n+\n \terr = rockchip_pcie_set_vpcie(rockchip);\n \tif (err) {\n \t\tdev_err(dev, \"failed to set vpcie regulator\\n\");\n-\t\tgoto err_set_vpcie;\n+\t\treturn err;\n \t}\n \n \terr = rockchip_pcie_init_port(rockchip);\n@@ -1625,8 +1633,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)\n \t\tregulator_disable(rockchip->vpcie1v8);\n \tif (!IS_ERR(rockchip->vpcie0v9))\n \t\tregulator_disable(rockchip->vpcie0v9);\n-err_set_vpcie:\n-\trockchip_pcie_disable_clocks(rockchip);\n \treturn err;\n }\n \n@@ -1648,8 +1654,6 @@ static int rockchip_pcie_remove(struct platform_device *pdev)\n \t\tphy_exit(rockchip->phys[i]);\n \t}\n \n-\trockchip_pcie_disable_clocks(rockchip);\n-\n \tif (!IS_ERR(rockchip->vpcie12v))\n \t\tregulator_disable(rockchip->vpcie12v);\n \tif (!IS_ERR(rockchip->vpcie3v3))\n",
    "prefixes": [
        "v5",
        "04/10"
    ]
}