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GET /api/patches/803869/?format=api
{ "id": 803869, "url": "http://patchwork.ozlabs.org/api/patches/803869/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170821072101.29375-7-lokeshvutla@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170821072101.29375-7-lokeshvutla@ti.com>", "list_archive_url": null, "date": "2017-08-21T07:20:54", "name": "[U-Boot,v2,06/13] board: ti: dra76-evm: Add the pmic data", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "9c14effe6d33c7530c714f184345bbbf959722e3", "submitter": { "id": 14145, "url": "http://patchwork.ozlabs.org/api/people/14145/?format=api", "name": "Lokesh Vutla", "email": "lokeshvutla@ti.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170821072101.29375-7-lokeshvutla@ti.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/803869/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/803869/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"UqAa96Vz\";\n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xbQSQ0PFFz9s8V\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 21 Aug 2017 17:34:46 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid CBAF1C22107; Mon, 21 Aug 2017 07:32:46 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 98B87C22010;\n\tMon, 21 Aug 2017 07:26:09 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 0E23CC22106; Mon, 21 Aug 2017 07:25:23 +0000 (UTC)", "from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80])\n\tby lists.denx.de (Postfix) with ESMTPS id 7AC58C2204D\n\tfor <u-boot@lists.denx.de>; Mon, 21 Aug 2017 07:25:19 +0000 (UTC)", "from dlelxv90.itg.ti.com ([172.17.2.17])\n\tby lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7L7PIYM022782; \n\tMon, 21 Aug 2017 02:25:18 -0500", "from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30])\n\tby dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7L7PIfs003980; \n\tMon, 21 Aug 2017 02:25:18 -0500", "from DLEE103.ent.ti.com (157.170.170.33) by DLEE100.ent.ti.com\n\t(157.170.170.30) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tMon, 21 Aug 2017 02:25:17 -0500", "from dflp32.itg.ti.com (10.64.6.15) by DLEE103.ent.ti.com\n\t(157.170.170.33) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Mon, 21 Aug 2017 02:25:17 -0500", "from a0131933.india.ti.com (ileax41-snat.itg.ti.com\n\t[10.172.224.153])\n\tby dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7L7P3Zg010673;\n\tMon, 21 Aug 2017 02:25:15 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1503300318;\n\tbh=uo8+uSJW/iksoLMmlr5UdMDoWioN96Nm2+X1Mqf798I=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=UqAa96VzjLOPauBx4KH4dwRpHMb0lrsCv2ah+P0NJb+3hoLOvDGFOnashTFd5LNcZ\n\trEjMQZGKFPkCN4PT4q/LGliz5U6M2wOpw3j89WoRnk2YMTKiBZsIhKYy8j8Gu82f9v\n\tGU0xsFDo290ITkQzwtgDsNqWV3vUDrmBSB5FmWMU=", "From": "Lokesh Vutla <lokeshvutla@ti.com>", "To": "Tom Rini <trini@konsulko.com>, <u-boot@lists.denx.de>", "Date": "Mon, 21 Aug 2017 12:50:54 +0530", "Message-ID": "<20170821072101.29375-7-lokeshvutla@ti.com>", "X-Mailer": "git-send-email 2.13.0", "In-Reply-To": "<20170821072101.29375-1-lokeshvutla@ti.com>", "References": "<20170821072101.29375-1-lokeshvutla@ti.com>", "MIME-Version": "1.0", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "Cc": "Tero Kristo <t-kristo@ti.com>", "Subject": "[U-Boot] [PATCH v2 06/13] board: ti: dra76-evm: Add the pmic data", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Keerthy <j-keerthy@ti.com>\n\ndra76-evm uses lp8736 and tps65917 pmic for powering on\nvarious peripherals. Add data for these pmics and register\nfor dra76-evm.\n\nReviewed-by: Tom Rini <trini@konsulko.com>\nSigned-off-by: Keerthy <j-keerthy@ti.com>\nSigned-off-by: Lokesh Vutla <lokeshvutla@ti.com>\n---\n arch/arm/include/asm/arch-omap5/clock.h | 9 ++++++\n arch/arm/include/asm/omap_common.h | 1 +\n arch/arm/mach-omap2/omap5/hw_data.c | 16 +++++++++++\n board/ti/dra7xx/evm.c | 50 +++++++++++++++++++++++++++++++++\n 4 files changed, 76 insertions(+)", "diff": "diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h\nindex dbe340d23e..ee2e78b99b 100644\n--- a/arch/arm/include/asm/arch-omap5/clock.h\n+++ b/arch/arm/include/asm/arch-omap5/clock.h\n@@ -340,6 +340,9 @@\n /* Offset is 0.73V for LP873x */\n #define LP873X_BUCK_BASE_VOLT_UV\t\t730000\n \n+/* Offset is 0.73V for LP87565 */\n+#define LP87565_BUCK_BASE_VOLT_UV\t\t730000\n+\n /* TPS659038 */\n #define TPS659038_I2C_SLAVE_ADDR\t\t0x58\n #define TPS659038_REG_ADDR_SMPS12\t\t0x23\n@@ -353,6 +356,7 @@\n #define TPS65917_REG_ADDR_SMPS1\t\t0x23\n #define TPS65917_REG_ADDR_SMPS2\t\t0x27\n #define TPS65917_REG_ADDR_SMPS3\t\t0x2F\n+#define TPS65917_REG_ADDR_SMPS4\t\t0x33\n \n /* LP873X */\n #define LP873X_I2C_SLAVE_ADDR\t\t0x60\n@@ -360,6 +364,11 @@\n #define LP873X_REG_ADDR_BUCK1\t\t0x7\n #define LP873X_REG_ADDR_LDO1\t\t0xA\n \n+/* LP87565 */\n+#define LP87565_I2C_SLAVE_ADDR\t\t0x61\n+#define LP87565_REG_ADDR_BUCK01\t\t0xA\n+#define LP87565_REG_ADDR_BUCK23\t\t0xE\n+\n /* TPS */\n #define TPS62361_I2C_SLAVE_ADDR\t\t0x60\n #define TPS62361_REG_ADDR_SET0\t\t0x0\ndiff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h\nindex e951b232d6..b34ad41325 100644\n--- a/arch/arm/include/asm/omap_common.h\n+++ b/arch/arm/include/asm/omap_common.h\n@@ -607,6 +607,7 @@ extern struct omap_sys_ctrl_regs const dra7xx_ctrl;\n \n extern struct pmic_data tps659038;\n extern struct pmic_data lp8733;\n+extern struct pmic_data lp87565;\n \n void hw_data_init(void);\n \ndiff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c\nindex 19a8d10cef..7aaf379357 100644\n--- a/arch/arm/mach-omap2/omap5/hw_data.c\n+++ b/arch/arm/mach-omap2/omap5/hw_data.c\n@@ -306,6 +306,22 @@ struct pmic_data tps659038 = {\n \t.gpio_en = 0,\n };\n \n+/* The LP87565*/\n+struct pmic_data lp87565 = {\n+\t.base_offset = LP873X_BUCK_BASE_VOLT_UV,\n+\t.step = 5000, /* 5 mV represented in uV */\n+\t/*\n+\t * Offset codes 0 - 0x13 Invalid.\n+\t * Offset codes 0x14 0x17 give 10mV steps\n+\t * Offset codes 0x17 through 0x9D give 5mV steps\n+\t * So let us start with our operating range from .73V\n+\t */\n+\t.start_code = 0x17,\n+\t.i2c_slave_addr = 0x60,\n+\t.pmic_bus_init = gpi2c_init,\n+\t.pmic_write = palmas_i2c_write_u8,\n+};\n+\n /* The LP8732 and LP8733 are software-compatible, use common struct */\n struct pmic_data lp8733 = {\n \t.base_offset = LP873X_BUCK_BASE_VOLT_UV,\ndiff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c\nindex ee6d5251d5..8e79350111 100644\n--- a/board/ti/dra7xx/evm.c\n+++ b/board/ti/dra7xx/evm.c\n@@ -357,6 +357,54 @@ struct vcores_data dra752_volts = {\n \t.iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,\n };\n \n+struct vcores_data dra76x_volts = {\n+\t.mpu.value[OPP_NOM]\t= VDD_MPU_DRA7_NOM,\n+\t.mpu.efuse.reg[OPP_NOM]\t= STD_FUSE_OPP_VMIN_MPU_NOM,\n+\t.mpu.efuse.reg_bits\t= DRA752_EFUSE_REGBITS,\n+\t.mpu.addr\t= LP87565_REG_ADDR_BUCK01,\n+\t.mpu.pmic\t= &lp87565,\n+\t.mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,\n+\n+\t.eve.value[OPP_NOM]\t= VDD_EVE_DRA7_NOM,\n+\t.eve.value[OPP_OD]\t= VDD_EVE_DRA7_OD,\n+\t.eve.value[OPP_HIGH]\t= VDD_EVE_DRA7_HIGH,\n+\t.eve.efuse.reg[OPP_NOM]\t= STD_FUSE_OPP_VMIN_DSPEVE_NOM,\n+\t.eve.efuse.reg[OPP_OD]\t= STD_FUSE_OPP_VMIN_DSPEVE_OD,\n+\t.eve.efuse.reg[OPP_HIGH]\t= STD_FUSE_OPP_VMIN_DSPEVE_HIGH,\n+\t.eve.efuse.reg_bits\t= DRA752_EFUSE_REGBITS,\n+\t.eve.addr\t= TPS65917_REG_ADDR_SMPS1,\n+\t.eve.pmic\t= &tps659038,\n+\t.eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,\n+\n+\t.gpu.value[OPP_NOM]\t= VDD_GPU_DRA7_NOM,\n+\t.gpu.value[OPP_OD]\t= VDD_GPU_DRA7_OD,\n+\t.gpu.value[OPP_HIGH]\t= VDD_GPU_DRA7_HIGH,\n+\t.gpu.efuse.reg[OPP_NOM]\t= STD_FUSE_OPP_VMIN_GPU_NOM,\n+\t.gpu.efuse.reg[OPP_OD]\t= STD_FUSE_OPP_VMIN_GPU_OD,\n+\t.gpu.efuse.reg[OPP_HIGH]\t= STD_FUSE_OPP_VMIN_GPU_HIGH,\n+\t.gpu.efuse.reg_bits\t= DRA752_EFUSE_REGBITS,\n+\t.gpu.addr\t= LP87565_REG_ADDR_BUCK23,\n+\t.gpu.pmic\t= &lp87565,\n+\t.gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,\n+\n+\t.core.value[OPP_NOM]\t= VDD_CORE_DRA7_NOM,\n+\t.core.efuse.reg[OPP_NOM]\t= STD_FUSE_OPP_VMIN_CORE_NOM,\n+\t.core.efuse.reg_bits = DRA752_EFUSE_REGBITS,\n+\t.core.addr\t= TPS65917_REG_ADDR_SMPS3,\n+\t.core.pmic\t= &tps659038,\n+\n+\t.iva.value[OPP_NOM]\t= VDD_IVA_DRA7_NOM,\n+\t.iva.value[OPP_OD]\t= VDD_IVA_DRA7_OD,\n+\t.iva.value[OPP_HIGH]\t= VDD_IVA_DRA7_HIGH,\n+\t.iva.efuse.reg[OPP_NOM]\t= STD_FUSE_OPP_VMIN_IVA_NOM,\n+\t.iva.efuse.reg[OPP_OD]\t= STD_FUSE_OPP_VMIN_IVA_OD,\n+\t.iva.efuse.reg[OPP_HIGH]\t= STD_FUSE_OPP_VMIN_IVA_HIGH,\n+\t.iva.efuse.reg_bits\t= DRA752_EFUSE_REGBITS,\n+\t.iva.addr\t= TPS65917_REG_ADDR_SMPS4,\n+\t.iva.pmic\t= &tps659038,\n+\t.iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,\n+};\n+\n struct vcores_data dra722_volts = {\n \t.mpu.value[OPP_NOM]\t= VDD_MPU_DRA7_NOM,\n \t.mpu.efuse.reg[OPP_NOM]\t= STD_FUSE_OPP_VMIN_MPU_NOM,\n@@ -622,6 +670,8 @@ void vcores_init(void)\n \t\t*omap_vcores = &dra722_volts;\n \t} else if (board_is_dra71x_evm()) {\n \t\t*omap_vcores = &dra718_volts;\n+\t} else if (board_is_dra76x_evm()) {\n+\t\t*omap_vcores = &dra76x_volts;\n \t} else {\n \t\t/* If EEPROM is not populated */\n \t\tif (is_dra72x())\n", "prefixes": [ "U-Boot", "v2", "06/13" ] }