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GET /api/patches/803169/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 803169,
    "url": "http://patchwork.ozlabs.org/api/patches/803169/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1503052823-17206-2-git-send-email-Ashish.Kumar@nxp.com/",
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    "date": "2017-08-18T10:40:23",
    "name": "[U-Boot,v2,2/2] board:ls1088aqds: Add support of EC1 and EC2",
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    "submitter": {
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        "name": "Ashish Kumar",
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    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1503052823-17206-2-git-send-email-Ashish.Kumar@nxp.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/803169/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/803169/checks/",
    "tags": {},
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        "From": "Ashish Kumar <Ashish.Kumar@nxp.com>",
        "To": "<u-boot@lists.denx.de>",
        "Date": "Fri, 18 Aug 2017 16:10:23 +0530",
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        "Cc": "Amrita Kumari <amrita.kumari@nxp.com>",
        "Subject": "[U-Boot] [PATCH v2 2/2] board:ls1088aqds: Add support of EC1 and EC2",
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    },
    "content": "From: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>\n\nEC1 and EC2 are RGMII interface on ls1088aqds platform.\nThis patch add support of RGMII with PHY and MDIO\n\nSigned-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>\nSigned-off-by: Amrita Kumari <amrita.kumari@nxp.com>\n---\n\ndepends upon base platform patches\n\nv2: \nfor https://patchwork.ozlabs.org/patch/755618/\nMake function static\n\n board/freescale/ls1088a/eth_ls1088aqds.c | 35 ++++++++++++++++++++++++++++++++\n 1 file changed, 35 insertions(+)",
    "diff": "diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c\nindex a73896d..f5320eb 100644\n--- a/board/freescale/ls1088a/eth_ls1088aqds.c\n+++ b/board/freescale/ls1088a/eth_ls1088aqds.c\n@@ -576,6 +576,38 @@ void ls1088a_handle_phy_interface_xsgmii(int i)\n \t\tbreak;\n \t}\n }\n+\n+static void ls1088a_handle_phy_interface_rgmii(int dpmac_id)\n+{\n+\tstruct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;\n+\tu32 serdes1_prtcl, cfg;\n+\tstruct mii_dev *bus;\n+\n+\tcfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) &\n+\t\t\t\tFSL_CHASSIS3_SRDS1_PRTCL_MASK;\n+\tcfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT;\n+\tserdes1_prtcl = serdes_get_number(FSL_SRDS_1, cfg);\n+\n+\tswitch (dpmac_id) {\n+\tcase 4:\n+\t\twriop_set_phy_address(dpmac_id, RGMII_PHY1_ADDR);\n+\t\tdpmac_info[dpmac_id].board_mux = EMI1_RGMII1;\n+\t\tbus = mii_dev_for_muxval(EMI1_RGMII1);\n+\t\twriop_set_mdio(dpmac_id, bus);\n+\t\tbreak;\n+\tcase 5:\n+\t\twriop_set_phy_address(dpmac_id, RGMII_PHY2_ADDR);\n+\t\tdpmac_info[dpmac_id].board_mux = EMI1_RGMII2;\n+\t\tbus = mii_dev_for_muxval(EMI1_RGMII2);\n+\t\twriop_set_mdio(dpmac_id, bus);\n+\t\tbreak;\n+\tdefault:\n+\t\tprintf(\"qds: WRIOP: Unsupported RGMII SerDes Protocol 0x%02x\\n\",\n+\t\t       serdes1_prtcl);\n+\t\tbreak;\n+\t}\n+\n+}\n #endif\n \n int board_eth_init(bd_t *bis)\n@@ -604,6 +636,9 @@ int board_eth_init(bd_t *bis)\n \n \tfor (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {\n \t\tswitch (wriop_get_enet_if(i)) {\n+\t\tcase PHY_INTERFACE_MODE_RGMII:\n+\t\t\tls1088a_handle_phy_interface_rgmii(i);\n+\t\t\tbreak;\n \t\tcase PHY_INTERFACE_MODE_QSGMII:\n \t\t\tls1088a_handle_phy_interface_qsgmii(i);\n \t\t\tbreak;\n",
    "prefixes": [
        "U-Boot",
        "v2",
        "2/2"
    ]
}