Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/803168/?format=api
{ "id": 803168, "url": "http://patchwork.ozlabs.org/api/patches/803168/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1503052823-17206-1-git-send-email-Ashish.Kumar@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503052823-17206-1-git-send-email-Ashish.Kumar@nxp.com>", "list_archive_url": null, "date": "2017-08-18T10:40:22", "name": "[U-Boot,v2,1/2] armv8: fsl-layerscape: Support to add RGMII for ls1088aqds", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "1d35c036839e1d3123293dc6b4ca12979e9cf274", "submitter": { "id": 68053, "url": "http://patchwork.ozlabs.org/api/people/68053/?format=api", "name": "Ashish Kumar", "email": "Ashish.kumar@nxp.com" }, "delegate": { "id": 2666, "url": "http://patchwork.ozlabs.org/api/users/2666/?format=api", "username": "yorksun", "first_name": "York", "last_name": "Sun", "email": "yorksun@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1503052823-17206-1-git-send-email-Ashish.Kumar@nxp.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/803168/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/803168/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xYfk73vjsz9t2V\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 18 Aug 2017 20:40:31 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 2689BC21F9A; Fri, 18 Aug 2017 10:40:28 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id D2CFDC21DC4;\n\tFri, 18 Aug 2017 10:40:24 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 63AE7C21D70; Fri, 18 Aug 2017 10:40:23 +0000 (UTC)", "from NAM02-BL2-obe.outbound.protection.outlook.com\n\t(mail-bl2nam02on0059.outbound.protection.outlook.com [104.47.38.59])\n\tby lists.denx.de (Postfix) with ESMTPS id 73E78C21C6D\n\tfor <u-boot@lists.denx.de>; Fri, 18 Aug 2017 10:40:22 +0000 (UTC)", "from CY4PR03CA0016.namprd03.prod.outlook.com (10.168.162.26) by\n\tCY4PR03MB3317.namprd03.prod.outlook.com (10.171.246.150) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.1.1341.21; Fri, 18 Aug 2017 10:40:20 +0000", "from BY2FFO11FD019.protection.gbl (2a01:111:f400:7c0c::110) by\n\tCY4PR03CA0016.outlook.office365.com (2603:10b6:903:33::26) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1362.18\n\tvia Frontend Transport; Fri, 18 Aug 2017 10:40:20 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBY2FFO11FD019.mail.protection.outlook.com (10.1.14.107) with\n\tMicrosoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1341.15\n\tvia Frontend Transport; Fri, 18 Aug 2017 10:40:20 +0000", "from ubuntu1604.ap.freescale.net (ubuntu1604.ap.freescale.net\n\t[10.232.133.7])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv7IAeGf5012410; Fri, 18 Aug 2017 03:40:17 -0700" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=BAD_ENC_HEADER,\n\tRCVD_IN_DNSWL_NONE,\n\tSPF_HELO_PASS autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Ashish Kumar <Ashish.Kumar@nxp.com>", "To": "<u-boot@lists.denx.de>", "Date": "Fri, 18 Aug 2017 16:10:22 +0530", "Message-ID": "<1503052823-17206-1-git-send-email-Ashish.Kumar@nxp.com>", "X-Mailer": "git-send-email 2.7.4", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131475264205859204;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()", "X-Forefront-Antispam-Report": "CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(39380400002)(39860400002)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(8676002)(8936002)(189998001)(86362001)(2906002)(575784001)(81156014)(6916009)(81166006)(6666003)(50986999)(5660300001)(36756003)(53936002)(68736007)(8656003)(47776003)(5003940100001)(110136004)(6306002)(54906002)(48376002)(50466002)(72206003)(85426001)(966005)(50226002)(104016004)(4326008)(2351001)(105606002)(626005)(356003)(77096006)(305945005)(106466001)(498600001)(97736004);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:CY4PR03MB3317;\n\tH:tx30smr01.am.freescale.net; \n\tFPR:; SPF:Fail; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; ", "X-Microsoft-Exchange-Diagnostics": [ "1; BY2FFO11FD019;\n\t1:/kd43PCXGVMJ+nBr6iov04u2nIu8scKxIfvy9osarA19BpEJgvaWVPKNB4zyfhQRJRnqPem8atmU0Nb35hYQ9oO4JZExIS8MO7+QRDDlSvELbUfjzBH5pcIYAD5l2xCl", "1; CY4PR03MB3317;\n\t3:Hs4mKA7OxIH0Z++YkP6VXCOgdy4FiiTztgTVQ/euF7EvdnkKgjKMpxelDjFlit4eZzQ9pLRbcYxZLwSilosGnFyI0l2QVaxAm5G+0KdwxlAU8nJ3CApF6aZbChQ9Ncdix/38azno3Jrv/l2/GJVDd+3mTSCs5Ax/WpJDwEgpT40AJ0V/AGTc3TNPeXshrQQdT+ImHMV702aHTJeAnrSJGL68xJiYFPc2uErMWhowJmRddI5V1xtEyLJgH/NBBnzrWLRu7+gX7nVAaKoaeRNxtucvrRCkKMoWbWVWJ9iAunwSm9/Zudjx9F8Qs+I/OIxzPRymE/MQtLVeP/FLg6JVmFVmMG6+BqfnqT+NaphsSj0=;\n\t25:rF5G9Cpx3+r8LHzvUeVD5CcdkwCh+gNttgxKnt5NnR3JH3srwly6s2ZTP9anLwC6LbWZx65l1jJ+cLMJpmXQ1NraXDiHVToHZYTMPCM7NIWXiQJq0JtZnD4/NBFl6BsLIwrSwkqkSMhFkVzkqd7cP1bEGBygLDztm1eLo17D1JK7pst3IpgNYDQldItU/VdimW1OICCIr2F55zhsukqFmbCj4ZPMxST52JiMiHruhugEZWy1bqiT+bXYiaFB8Rh3FUSbLLVXZoAni8AyybSXa1O2d2RDaXcTFroarpKjpM6JupVNzbgHfpkiBCDCndVxFtoYVZnYC95VhpgCHimgxA==", "1; CY4PR03MB3317;\n\t31:odDCwRcfjZcBl+YJRIHf4HQL3TjEaLJjJ60wBVBytm4W0fCwFlnaRy+wEbt8Xh756iC2/ADQmIopuYlFWQ+6x3CqFrdpz4+j1TQiPxJ7q5bJ/nQgHcT562CUlyPsIPSrqdjXqiETXu1bC2vlk7qR0kpnwuzfedQsrrt3eFkZVQuO7kQFzsrWEzGI6BFzPbH2qvwaTzqSITabVn40PCmT9D985R+9h3fYvH1M8DWxw/g=;\n\t4:HZ97BC3YPMhqi6Tjy5aCtFCj95MtP9OixCf33AEdayvL2ks2LtlvEy8TduN9CINK3jP4o751YMCHDmvcY2RAhvNx0O2Yah0lahVmTmUsXk7boEt9p6Dc7RGZrE1gr4rqZrgjVDVDFfehRr2STyjlecc7FZZgtMNoFjGGKEpFOyib8oywHARhn7DUbX1V57smh/1QC4shyFpacXgP0zu/N37Ty6AMLeJu1MEy4tLasfXMV3/whGRgfzlLX8dkiKA7ri1WikqBqMYCeVDCLsk/Y3gHvtvZE8FF2gNIRZ7b2Vg=", "=?us-ascii?Q?1; CY4PR03MB3317;\n\t23:rC/wjuHU7RjkLARTFhLEG34rlWRsdbuMgrUQTzrDy?=\n\t=?us-ascii?Q?kV+qImSN0n3q+kgP49eiJ4lpChVpxMMAlnwY4+a2/ZS51k/msYOny1j1qIjD?=\n\t=?us-ascii?Q?GVZELIER1RMFiylijGOoUl5W9rQBuEoBlwILICO2fgs1HXbjILXJwI/CMT45?=\n\t=?us-ascii?Q?D/Zmd6Jl95N0pj6FO8L+cDdN3Mz5oPx4gmsLIM/YeNwNr3fkXyobjxTICr2d?=\n\t=?us-ascii?Q?2dOL3JYFyPpPBfWUamg73TJptW9cPm/R6nwPBXz3uk8RegynHIKwz1D4FZK1?=\n\t=?us-ascii?Q?Zob42jOt2k4qR1/juQRTrjCEiKIrP+nrZtIFv7snGpgFxkawr7+Fw/QcxjmR?=\n\t=?us-ascii?Q?EcsCRVHORZdu96X+jBAcImI4IT3oAkkBg2ajLFoY8fzM0ZFE+eDHMlagoS6D?=\n\t=?us-ascii?Q?ya0WIwtGnEEqIoTzpP9i64M0QFsMFHWyPitBrBhtfBYjD6DVhdfuBNyyGUTk?=\n\t=?us-ascii?Q?5h9MrjTk924Ps0f1XJngwyK7pB5efk5XQYDMaHk8PD5r4+qc67+a782isJDD?=\n\t=?us-ascii?Q?DTcXHueMj/gykYbdGexq+trcGkwhe4a+pr2SlvB441tJMRNJ1l20yX64awaX?=\n\t=?us-ascii?Q?Ij+bIh+huFA1NGv0C2J29x1DBCAoMzV6cMtDGFKS0INtNls5YyudtQsH0zQV?=\n\t=?us-ascii?Q?Huy781nVFT8MtrUAKbZHQrB8tBZNrEvHcQiqtZTfsZ1JmnZ/VA5YrT/e/ZcL?=\n\t=?us-ascii?Q?yEddrMUZFKIwSYqJw4u2sBLxqcXW41bUZSmSwjoTlurTHNgCPtM3ZEdaWfB+?=\n\t=?us-ascii?Q?IFF7CxV7SErS24WSfRL/RbyQ8e+ZZAQzKh+kesAqxwaaBf6aw5Czmz/pCvfd?=\n\t=?us-ascii?Q?5yWuVF1ppFNMF65PQXvBN+QG7pxepJXO0jgn+LtE/9n1lyiapfNIVqllnZ6p?=\n\t=?us-ascii?Q?1gjgCG+mAL/+s4ozL+R2yj8hBU3yCYlc7oLaFJ4KcMngQSrcXPc1ha90eEWP?=\n\t=?us-ascii?Q?cIWMoXgOLuhDFC8S9+BRcc21ZlyuI8quvKpei7sgteOLBUkvZgG3KZef9oDv?=\n\t=?us-ascii?Q?lBQVOtyczvQMrkZ3Gk/tBaskxwHlpHS+9Fv7j24Osl1hKLdSBKiQ+EBDLDnZ?=\n\t=?us-ascii?Q?xVWbmanAHntSQgLoN2pcHrsmPJ/4EpsyDYtafT+ZSK33PcEAilXU7+MVRwGf?=\n\t=?us-ascii?Q?3aKsO9O+Ls6EcvN8EwnzmMfsFNFWzbf?=", "1; CY4PR03MB3317;\n\t6:Pv86Bp8abDmjxPVDGqKSXGurhzSw7f+mGZeEN6QNCVqlW3hNNX1q2nK4vyjfvYU+1wsCgeeX3mybxrB0nNuKHPKRTCjHHVOvzDAbnwp3wq89ungDlvbfoVvxrxlcayaw3SKI6/ZDjGr6qBGCgd51zn+wkQge5qcuq9kQVIYuuGtnKtBGAoa/DeKoXH82Hl3gTRvJj5iSGacpkZPplKouVR0RZv6hVmLnSzWDfhX9hI3jwNPtIlyXQo1Rl4p1Rf86rO1cbrq0uHRnW0uegKam8ButAPMzvdmUKvf07IcfHPpaP9wZKZqW0E4TrL+vAdy+wHMRP05oP6Lg5QvyIrLp/Q==;\n\t5:ASXYxbG0YxEnr+gS8KbsTxCNGslaF/0R6duw/DoRYgO9dwS+MapO+spIKlkozmd713SfWBRiZ1tSPVf3H485a4yja7jLvtr/3xQKWlROnUBrgSr260YX7soVHdmEYhAANXAmcMUfjYmyN72RQTpm5g==;\n\t24:2Qv74DEn8L/qNyb1OmKM32pXNMTszL/qp8keTS0tyacYdhE6I68v3ZluVQLEV5gQNTyXeRTiam7Dv+oZ6OBITCHxiH/uaqzb2XTo9ps9OT0=;\n\t7:UssG4RBQpn9O809LyTeQvWQt3NMZUSZQFUoiCLwkSoQZz7bJ1eBo2sLOlxsf3nXryrpW+agwcu7UEn1Y1giUuBmsdonYKmyYuiGWi2NFey+a1cNT/ZmASccdPg7UnsX2878VBuK5giVqckdW3vV0w+rZ29wjRJ/Oosi5fDcKvuC4qJzcR5rBMjUk/X1oKQivSvcm6TD/ea49CzlonsKrcyrH4fVXKP7e9huwriDvVCk=" ], "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "11b1d5b9-54dd-402f-9e8c-08d4e6258621", "X-Microsoft-Antispam": "UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(300000503095)(300135400095)(2017052603031)(201703131430075)(201703131517081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:CY4PR03MB3317; ", "X-MS-TrafficTypeDiagnostic": "CY4PR03MB3317:", "X-Exchange-Antispam-Report-Test": "UriScan:(185117386973197);", "X-Microsoft-Antispam-PRVS": "<CY4PR03MB3317A35D2D84DF84D46F3E0B95800@CY4PR03MB3317.namprd03.prod.outlook.com>", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6095135)(601004)(2401047)(13018025)(5005006)(13016025)(8121501046)(100000703101)(100105400095)(93006095)(93001095)(10201501046)(3002001)(6055026)(6096035)(20161123563025)(20161123565025)(20161123556025)(20161123559100)(201703131430075)(201703131433075)(201703131448075)(201703161259150)(201703151042153)(20161123561025)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:CY4PR03MB3317; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:CY4PR03MB3317; ", "X-Forefront-PRVS": "040359335D", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "18 Aug 2017 10:40:20.2739\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY4PR03MB3317", "Cc": "Amrita Kumari <amrita.kumari@nxp.com>", "Subject": "[U-Boot] [PATCH v2 1/2] armv8: fsl-layerscape: Support to add RGMII\n\tfor ls1088aqds", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "This patch adds support for RGMII protocol\n\nNXP's LDPAA2 support RGMII protocol. LS1088A is the\nfirst Soc supporting both RGMII and SGMII.\n\nSigned-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>\nSigned-off-by: Amrita Kumari <amrita.kumari@nxp.com>\nSigned-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>\n---\ndepends upon base platform patches\n\nThis is v2 for https://patchwork.ozlabs.org/patch/755617/\nv2:\n1.Add description for EC1 and EC2\n2.Rename SYS_HAS_RGMII to SYS_FSL_HAS_RGMII \n\n arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 21 +++++++++++++++++\n arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 4 ++++\n .../include/asm/arch-fsl-layerscape/fsl_serdes.h | 1 +\n .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 6 +++++\n board/freescale/ls1088a/eth_ls1088aqds.c | 1 -\n drivers/net/ldpaa_eth/ldpaa_wriop.c | 9 ++++++++\n drivers/net/ldpaa_eth/ls1088a.c | 27 ++++++++++++++++++++++\n include/fsl-mc/ldpaa_wriop.h | 2 ++\n 8 files changed, 70 insertions(+), 1 deletion(-)", "diff": "diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\nindex be9e401..91e04f3 100644\n--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig\n@@ -56,6 +56,8 @@ config ARCH_LS1088A\n \tselect SYS_FSL_DDR\n \tselect SYS_FSL_DDR_LE\n \tselect SYS_FSL_DDR_VER_50\n+\tselect SYS_FSL_EC1\n+\tselect SYS_FSL_EC2\n \tselect SYS_FSL_ERRATUM_A009803\n \tselect SYS_FSL_ERRATUM_A009942\n \tselect SYS_FSL_ERRATUM_A010165\n@@ -63,6 +65,7 @@ config ARCH_LS1088A\n \tselect SYS_FSL_ERRATUM_A008850\n \tselect SYS_FSL_HAS_CCI400\n \tselect SYS_FSL_HAS_DDR4\n+\tselect SYS_FSL_HAS_RGMII\n \tselect SYS_FSL_HAS_SEC\n \tselect SYS_FSL_SEC_COMPAT_5\n \tselect SYS_FSL_SEC_LE\n@@ -405,6 +408,18 @@ config RESV_RAM\n \t be at the high end of physical memory. The reserve RAM may be\n \t excluded from memory bank(s) passed to OS, or marked as reserved.\n \n+config SYS_FSL_EC1\n+\tbool\n+\thelp\n+\t Ethernet controller 1, this is connected to MAC3.\n+\t Provides DPAA2 capabilities\n+\n+config SYS_FSL_EC2\n+\tbool\n+\thelp\n+\t Ethernet controller 2, this is connected to MAC4.\n+\t Provides DPAA2 capabilities\n+\n config SYS_FSL_ERRATUM_A008336\n \tbool\n \n@@ -429,6 +444,12 @@ config SYS_FSL_ERRATUM_A009660\n config SYS_FSL_ERRATUM_A009929\n \tbool\n \n+\n+config SYS_FSL_HAS_RGMII\n+\tbool\n+\tdepends on SYS_FSL_EC1 || SYS_FSL_EC2\n+\n+\n config SYS_MC_RSV_MEM_ALIGN\n \thex \"Management Complex reserved memory alignment\"\n \tdepends on RESV_RAM\ndiff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c\nindex ec58065..3c9a5ed 100644\n--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c\n+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c\n@@ -517,6 +517,10 @@ int arch_early_init_r(void)\n \t\t\tprintf(\"Did not wake secondary cores\\n\");\n \t}\n \n+#ifdef CONFIG_SYS_FSL_HAS_RGMII\n+\tfsl_rgmii_init();\n+#endif\n+\n #ifdef CONFIG_SYS_HAS_SERDES\n \tfsl_serdes_init();\n #endif\ndiff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h\nindex a2c7578..12fd6b8 100644\n--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h\n+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h\n@@ -159,6 +159,7 @@ int serdes_get_first_lane(u32 sd, enum srds_prtcl device);\n enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);\n int is_serdes_prtcl_valid(int serdes, u32 prtcl);\n int serdes_get_number(int serdes, int cfg);\n+void fsl_rgmii_init(void);\n \n #ifdef CONFIG_FSL_LSCH2\n const char *serdes_clock_to_string(u32 clock);\ndiff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h\nindex 99a7413..ffc5fa2 100644\n--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h\n+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h\n@@ -247,6 +247,12 @@ struct ccsr_gur {\n #define FSL_CHASSIS3_SRDS1_REGSR\t29\n #define FSL_CHASSIS3_SRDS2_REGSR\t29\n #elif defined(CONFIG_ARCH_LS1088A)\n+#define FSL_CHASSIS3_EC1_REGSR 26\n+#define FSL_CHASSIS3_EC2_REGSR 26\n+#define FSL_CHASSIS3_RCWSR25_EC1_PRTCL_MASK 0x00000007\n+#define FSL_CHASSIS3_RCWSR25_EC1_PRTCL_SHIFT 0\n+#define FSL_CHASSIS3_RCWSR25_EC2_PRTCL_MASK 0x00000038\n+#define FSL_CHASSIS3_RCWSR25_EC2_PRTCL_SHIFT 3\n #define\tFSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_MASK\t0xFFFF0000\n #define\tFSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_SHIFT\t16\n #define\tFSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_MASK\t0x0000FFFF\ndiff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c\nindex 3e78ac7..a73896d 100644\n--- a/board/freescale/ls1088a/eth_ls1088aqds.c\n+++ b/board/freescale/ls1088a/eth_ls1088aqds.c\n@@ -597,7 +597,6 @@ int board_eth_init(bd_t *bis)\n \n \t/* Register the real MDIO1 bus */\n \tfm_memac_mdio_init(bis, memac_mdio0_info);\n-\n \t/* Register the muxing front-ends to the MDIO buses */\n \tls1088a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_RGMII1);\n \tls1088a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_RGMII2);\ndiff --git a/drivers/net/ldpaa_eth/ldpaa_wriop.c b/drivers/net/ldpaa_eth/ldpaa_wriop.c\nindex f7f26c2..831a330 100644\n--- a/drivers/net/ldpaa_eth/ldpaa_wriop.c\n+++ b/drivers/net/ldpaa_eth/ldpaa_wriop.c\n@@ -37,6 +37,15 @@ void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)\n \t}\n }\n \n+void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if)\n+{\n+\tdpmac_info[dpmac_id].enabled = 1;\n+\tdpmac_info[dpmac_id].id = dpmac_id;\n+\tdpmac_info[dpmac_id].phy_addr = -1;\n+\tdpmac_info[dpmac_id].enet_if = enet_if;\n+}\n+\n+\n /*TODO what it do */\n static int wriop_dpmac_to_index(int dpmac_id)\n {\ndiff --git a/drivers/net/ldpaa_eth/ls1088a.c b/drivers/net/ldpaa_eth/ls1088a.c\nindex 703945c..061935e 100644\n--- a/drivers/net/ldpaa_eth/ls1088a.c\n+++ b/drivers/net/ldpaa_eth/ls1088a.c\n@@ -8,6 +8,7 @@\n #include <fsl-mc/ldpaa_wriop.h>\n #include <asm/io.h>\n #include <asm/arch/fsl_serdes.h>\n+#include <asm/arch/soc.h>\n \n u32 dpmac_to_devdisr[] = {\n \t[WRIOP1_DPMAC1] = FSL_CHASSIS3_DEVDISR2_DPMAC1,\n@@ -85,3 +86,29 @@ void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)\n \t\tbreak;\n \t}\n }\n+\n+#ifdef CONFIG_SYS_FSL_HAS_RGMII\n+void fsl_rgmii_init(void)\n+{\n+\tstruct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);\n+\tu32 ec;\n+\n+#ifdef CONFIG_SYS_FSL_EC1\n+\tec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR - 1])\n+\t\t& FSL_CHASSIS3_RCWSR25_EC1_PRTCL_MASK;\n+\tec >>= FSL_CHASSIS3_RCWSR25_EC1_PRTCL_SHIFT;\n+\n+\tif (!ec)\n+\t\twriop_init_dpmac_enet_if(4, PHY_INTERFACE_MODE_RGMII);\n+#endif\n+\n+#ifdef CONFIG_SYS_FSL_EC2\n+\tec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR - 1])\n+\t\t& FSL_CHASSIS3_RCWSR25_EC2_PRTCL_MASK;\n+\tec >>= FSL_CHASSIS3_RCWSR25_EC2_PRTCL_SHIFT;\n+\n+\tif (!ec)\n+\t\twriop_init_dpmac_enet_if(5, PHY_INTERFACE_MODE_RGMII);\n+#endif\n+}\n+#endif\ndiff --git a/include/fsl-mc/ldpaa_wriop.h b/include/fsl-mc/ldpaa_wriop.h\nindex 8ae0fc0..0ca4956 100644\n--- a/include/fsl-mc/ldpaa_wriop.h\n+++ b/include/fsl-mc/ldpaa_wriop.h\n@@ -69,4 +69,6 @@ void wriop_dpmac_disable(int);\n void wriop_dpmac_enable(int);\n phy_interface_t wriop_dpmac_enet_if(int, int);\n void wriop_init_dpmac_qsgmii(int, int);\n+void wriop_init_rgmii(void);\n+void wriop_init_dpmac_enet_if(int , phy_interface_t);\n #endif\t/* __LDPAA_WRIOP_H */\n", "prefixes": [ "U-Boot", "v2", "1/2" ] }