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{
    "id": 801455,
    "url": "http://patchwork.ozlabs.org/api/patches/801455/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20170815072102.23067-1-andrew@aj.id.au/",
    "project": {
        "id": 35,
        "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api",
        "name": "Linux I2C development",
        "link_name": "linux-i2c",
        "list_id": "linux-i2c.vger.kernel.org",
        "list_email": "linux-i2c@vger.kernel.org",
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    "msgid": "<20170815072102.23067-1-andrew@aj.id.au>",
    "list_archive_url": null,
    "date": "2017-08-15T07:21:02",
    "name": "i2c: aspeed: Retain delay/setup/hold values when configuring bus frequency",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "624e48c3ff555795529a70b0dbda7c4d055f8827",
    "submitter": {
        "id": 68332,
        "url": "http://patchwork.ozlabs.org/api/people/68332/?format=api",
        "name": "Andrew Jeffery",
        "email": "andrew@aj.id.au"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20170815072102.23067-1-andrew@aj.id.au/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/801455/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/801455/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "X-Sasl-enc": "XAJMdXutb/OF+0vpf8QojVymBc5bo71OzcGHCO3ZIQbV 1502781699",
        "From": "Andrew Jeffery <andrew@aj.id.au>",
        "To": "linux-i2c@vger.kernel.org",
        "Cc": "Andrew Jeffery <andrew@aj.id.au>, wsa@the-dreams.de,\n\tbrendanhiggins@google.com, benh@kernel.crashing.org,\n\tjoel@jms.id.au, openbmc@lists.ozlabs.org,\n\tlinux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,\n\tryan_chen@aspeedtech.com",
        "Subject": "[PATCH] i2c: aspeed: Retain delay/setup/hold values when\n\tconfiguring bus frequency",
        "Date": "Tue, 15 Aug 2017 16:51:02 +0930",
        "Message-Id": "<20170815072102.23067-1-andrew@aj.id.au>",
        "X-Mailer": "git-send-email 2.11.0",
        "Sender": "linux-i2c-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-i2c.vger.kernel.org>",
        "X-Mailing-List": "linux-i2c@vger.kernel.org"
    },
    "content": "In addition to the base, low and high clock configuration, the AC timing\nregister #1 on the AST2400 houses fields controlling:\n\n1. tBUF: Minimum delay between Stop and Start conditions\n2. tHDSTA: Hold time for the Start condition\n3. tACST: Setup time for Start and Stop conditions, and hold time for the\n   Repeated Start condition\n\nThese values are defined in hardware on the AST2500 and therefore don't\nneed to be set.\n\naspeed_i2c_init_clk() was performing a direct write of the generated\nclock values rather than a read/mask/modify/update sequence to retain\ntBUF, tHDSTA and tACST, and therefore cleared the tBUF, tHDSTA and tACST\nfields on the AST2400. This resulted in a delay/setup/hold time of 1\nbase clock, which in some configurations is not enough for some devices\n(e.g. the MAX31785 fan controller, with an APB of 48MHz and a desired\nbus speed of 100kHz).\n\nSigned-off-by: Andrew Jeffery <andrew@aj.id.au>\n---\n drivers/i2c/busses/i2c-aspeed.c | 9 ++++++++-\n 1 file changed, 8 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c\nindex ee76e6dddc4b..284f8670dbeb 100644\n--- a/drivers/i2c/busses/i2c-aspeed.c\n+++ b/drivers/i2c/busses/i2c-aspeed.c\n@@ -53,6 +53,9 @@\n #define ASPEED_I2CD_MASTER_EN\t\t\t\tBIT(0)\n \n /* 0x04 : I2CD Clock and AC Timing Control Register #1 */\n+#define ASPEED_I2CD_TIME_TBUF_MASK\t\t\tGENMASK(31, 28)\n+#define ASPEED_I2CD_TIME_THDSTA_MASK\t\t\tGENMASK(27, 24)\n+#define ASPEED_I2CD_TIME_TACST_MASK\t\t\tGENMASK(23, 20)\n #define ASPEED_I2CD_TIME_SCL_HIGH_SHIFT\t\t\t16\n #define ASPEED_I2CD_TIME_SCL_HIGH_MASK\t\t\tGENMASK(19, 16)\n #define ASPEED_I2CD_TIME_SCL_LOW_SHIFT\t\t\t12\n@@ -744,7 +747,11 @@ static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus)\n \tu32 divisor, clk_reg_val;\n \n \tdivisor = DIV_ROUND_UP(bus->parent_clk_frequency, bus->bus_frequency);\n-\tclk_reg_val = bus->get_clk_reg_val(divisor);\n+\tclk_reg_val = readl(bus->base + ASPEED_I2C_AC_TIMING_REG1);\n+\tclk_reg_val &= (ASPEED_I2CD_TIME_TBUF_MASK |\n+\t\t\tASPEED_I2CD_TIME_THDSTA_MASK |\n+\t\t\tASPEED_I2CD_TIME_TACST_MASK);\n+\tclk_reg_val |= bus->get_clk_reg_val(divisor);\n \twritel(clk_reg_val, bus->base + ASPEED_I2C_AC_TIMING_REG1);\n \twritel(ASPEED_NO_TIMEOUT_CTRL, bus->base + ASPEED_I2C_AC_TIMING_REG2);\n \n",
    "prefixes": []
}