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GET /api/patches/801447/?format=api
{ "id": 801447, "url": "http://patchwork.ozlabs.org/api/patches/801447/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20170814160450.21978-1-qiuxu.zhuo@intel.com/", "project": { "id": 35, "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api", "name": "Linux I2C development", "link_name": "linux-i2c", "list_id": "linux-i2c.vger.kernel.org", "list_email": "linux-i2c@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170814160450.21978-1-qiuxu.zhuo@intel.com>", "list_archive_url": null, "date": "2017-08-14T16:04:50", "name": "[1/1] i2c: i801: Restore the presence state of P2SB PCI device after reading BAR", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "75c7ae2c31d3542219b47c77065cb8fd41427202", "submitter": { "id": 72165, "url": "http://patchwork.ozlabs.org/api/people/72165/?format=api", "name": "Zhuo, Qiuxu", "email": "qiuxu.zhuo@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20170814160450.21978-1-qiuxu.zhuo@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/801447/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/801447/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-i2c-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-i2c-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xWjpk2DQrz9sRm\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 15 Aug 2017 16:52:46 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753135AbdHOGwp (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 15 Aug 2017 02:52:45 -0400", "from mga02.intel.com ([134.134.136.20]:63978 \"EHLO mga02.intel.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1753127AbdHOGwp (ORCPT <rfc822;linux-i2c@vger.kernel.org>);\n\tTue, 15 Aug 2017 02:52:45 -0400", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t14 Aug 2017 23:52:44 -0700", "from orsmsx104.amr.corp.intel.com ([10.22.225.131])\n\tby orsmga005.jf.intel.com with ESMTP; 14 Aug 2017 23:52:44 -0700", "from qiuxu-lab.sh.intel.com (10.22.254.139) by\n\tORSMSX104.amr.corp.intel.com (10.22.225.131) with Microsoft SMTP\n\tServer (TLS) id 14.3.319.2; Mon, 14 Aug 2017 23:52:43 -0700" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.41,376,1498546800\"; d=\"scan'208\";a=\"137522746\"", "From": "Qiuxu Zhuo <qiuxu.zhuo@intel.com>", "To": "<jdelvare@suse.com>, <wsa@the-dreams.de>", "CC": "<tony.luck@intel.com>, <mika.westerberg@intel.com>, <bp@alien8.de>,\n\t<linux-i2c@vger.kernel.org>, Qiuxu Zhuo <qiuxu.zhuo@intel.com>", "Subject": "[PATCH 1/1] i2c: i801: Restore the presence state of P2SB PCI\n\tdevice after reading BAR", "Date": "Tue, 15 Aug 2017 00:04:50 +0800", "Message-ID": "<20170814160450.21978-1-qiuxu.zhuo@intel.com>", "X-Mailer": "git-send-email 2.9.0.GIT", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.22.254.139]", "Sender": "linux-i2c-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-i2c.vger.kernel.org>", "X-Mailing-List": "linux-i2c@vger.kernel.org" }, "content": "Sun, Yunying reported the following failure on Denverton micro-server:\n\n EDAC DEBUG: pnd2_init:\n EDAC DEBUG: pnd2_probe:\n EDAC DEBUG: dnv_rd_reg: Read b_cr_tolud_pci=00000000_80000000\n EDAC DEBUG: dnv_rd_reg: Read b_cr_touud_lo_pci=00000000_80000000\n EDAC DEBUG: dnv_rd_reg: Read b_cr_touud_hi_pci=00000000_00000004\n EDAC DEBUG: dnv_rd_reg: Read b_cr_asym_mem_region0_mchbar=00000000_00000000\n EDAC DEBUG: dnv_rd_reg: Read b_cr_asym_mem_region1_mchbar=00000000_00000000\n EDAC DEBUG: dnv_rd_reg: Read b_cr_mot_out_base_mchbar=00000000_00000000\n EDAC DEBUG: dnv_rd_reg: Read b_cr_mot_out_mask_mchbar=00000000_00000000\n EDAC pnd2: Failed to register device with error -19.\n\nOn Denverton micro-server, the presence of the P2SB bridge PCI device is\nenabled or disabled by the item 'RelaxSecConf' in BIOS setup menu. When\n'RelaxSecConf' is enabled, the P2SB PCI device is present and the pnd2_edac\nEDAC driver also uses it to get BAR. Hiding the P2SB PCI device caused the\npnd2_edac EDAC driver failed to get BAR then reported the above failure.\n\nTherefor, store the presence state of P2SB PCI device before unhiding it\nfor reading BAR and restore the presence state after reading BAR.\n\nSigned-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>\nReported-and-tested-by: Yunying Sun <yunying.sun@intel.com>\n---\n drivers/i2c/busses/i2c-i801.c | 12 ++++++++----\n 1 file changed, 8 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c\nindex c9536e1..e114e4e 100644\n--- a/drivers/i2c/busses/i2c-i801.c\n+++ b/drivers/i2c/busses/i2c-i801.c\n@@ -1332,6 +1332,7 @@ static void i801_add_tco(struct i801_priv *priv)\n \tu32 tco_base, tco_ctl;\n \tu32 base_addr, ctrl_val;\n \tu64 base64_addr;\n+\tu8 hidden;\n \n \tif (!(priv->features & FEATURE_TCO))\n \t\treturn;\n@@ -1376,8 +1377,10 @@ static void i801_add_tco(struct i801_priv *priv)\n \n \tdevfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1);\n \n-\t/* Unhide the P2SB device */\n-\tpci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0);\n+\t/* Unhide the P2SB device, if it is hidden */\n+\tpci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden);\n+\tif (hidden)\n+\t\tpci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0);\n \n \tpci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr);\n \tbase64_addr = base_addr & 0xfffffff0;\n@@ -1385,8 +1388,9 @@ static void i801_add_tco(struct i801_priv *priv)\n \tpci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr);\n \tbase64_addr |= (u64)base_addr << 32;\n \n-\t/* Hide the P2SB device */\n-\tpci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x1);\n+\t/* Hide the P2SB device, if it was hidden before */\n+\tif (hidden)\n+\t\tpci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden);\n \tspin_unlock(&p2sb_spinlock);\n \n \tres = &tco_res[ICH_RES_MEM_OFF];\n", "prefixes": [ "1/1" ] }