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{
    "id": 801353,
    "url": "http://patchwork.ozlabs.org/api/patches/801353/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1502748417-26417-3-git-send-email-lori.hikichi@broadcom.com/",
    "project": {
        "id": 37,
        "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api",
        "name": "Devicetree Bindings",
        "link_name": "devicetree-bindings",
        "list_id": "devicetree.vger.kernel.org",
        "list_email": "devicetree@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
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    },
    "msgid": "<1502748417-26417-3-git-send-email-lori.hikichi@broadcom.com>",
    "list_archive_url": null,
    "date": "2017-08-14T22:06:50",
    "name": "[2/9] ASoC: cygnus: Update bindings for audio clock changes",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "6c3f8c3c7f423c9fac69de446fc0d70ec66d638b",
    "submitter": {
        "id": 72163,
        "url": "http://patchwork.ozlabs.org/api/people/72163/?format=api",
        "name": "Lori Hikichi",
        "email": "lori.hikichi@broadcom.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1502748417-26417-3-git-send-email-lori.hikichi@broadcom.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/801353/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/801353/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Lori Hikichi <lori.hikichi@broadcom.com>",
        "To": "Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>,\n\tRob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,\n\tRay Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>,\n\tJon Mason <jonmason@broadcom.com>,\n\tbcm-kernel-feedback-list@broadcom.com, \n\tJaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>",
        "Cc": "alsa-devel@alsa-project.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tLori Hikichi <lori.hikichi@broadcom.com>",
        "Subject": "[PATCH 2/9] ASoC: cygnus: Update bindings for audio clock changes",
        "Date": "Mon, 14 Aug 2017 15:06:50 -0700",
        "Message-Id": "<1502748417-26417-3-git-send-email-lori.hikichi@broadcom.com>",
        "X-Mailer": "git-send-email 1.9.1",
        "In-Reply-To": "<1502748417-26417-1-git-send-email-lori.hikichi@broadcom.com>",
        "References": "<1502748417-26417-1-git-send-email-lori.hikichi@broadcom.com>",
        "Sender": "devicetree-owner@vger.kernel.org",
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        "List-ID": "<devicetree.vger.kernel.org>",
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    },
    "content": "Allow each audio port to select which clock (if any) it wants to use.\n\nSigned-off-by: Lori Hikichi <lori.hikichi@broadcom.com>\n---\n .../bindings/sound/brcm,cygnus-audio.txt           | 70 ++++++++++++++--------\n 1 file changed, 45 insertions(+), 25 deletions(-)",
    "diff": "diff --git a/Documentation/devicetree/bindings/sound/brcm,cygnus-audio.txt b/Documentation/devicetree/bindings/sound/brcm,cygnus-audio.txt\nindex b139e66..2ef2f2c 100644\n--- a/Documentation/devicetree/bindings/sound/brcm,cygnus-audio.txt\n+++ b/Documentation/devicetree/bindings/sound/brcm,cygnus-audio.txt\n@@ -9,19 +9,28 @@ Required properties:\n \t\tValid names are \"aud\" and \"i2s_in\". \"aud\" contains a\n \t\tset of DMA, I2S_OUT and SPDIF registers. \"i2s_in\" contains\n \t\ta set of I2S_IN registers.\n-\t- clocks: PLL and leaf clocks used by audio ports\n-\t- assigned-clocks: PLL and leaf clocks\n-\t- assigned-clock-parents: parent clocks of the assigned clocks\n-\t\t(usually the PLL)\n-\t- assigned-clock-rates: List of clock frequencies of the\n-\t\tassigned clocks\n-\t- clock-names: names of 3 leaf clocks used by audio ports\n-\t\tValid names are \"ch0_audio\", \"ch1_audio\", \"ch2_audio\"\n \t- interrupts: audio DMA interrupt number\n \n+Optional properties:\n+\t- assigned-clocks: only valid choice is audiopll\n+\t- assigned-clock-rates: clock frequency for audiopll\n+If none of the ports need an internal master clock then there no need to\n+initialize the pll clock.\n+\n+\n SSP Subnode properties:\n-- reg: The index of ssp port interface to use\n-\tValid value are 0, 1, 2, or 3 (for spdif)\n+Required:\n+\t- reg: The index of ssp port interface to use\n+\t\tValid value are 0, 1, 2, or 3 (for spdif)\n+Optional:\n+\t- clocks: clock used by audio port\n+\t\t  one of the audiopll outputs (see brcm,iproc-clocks.txt).\n+\t- clock-names: Must be \"ssp_clk\"\n+\t- brcm,ssp-clk-mux = Needed if a clock is named and used.  This value is\n+\t\t\tused to program the mux within the audio driver which selects\n+\t\t\tthe incoming clock. Here is the mapping.\n+\t\t\taudio_pll   output 0 = 0, output 1 = 1, and output 2 = 2\n+\n \n Example:\n \tcygnus_audio: audio@180ae000 {\n@@ -30,38 +39,49 @@ Example:\n \t\t#size-cells = <0>;\n \t\treg = <0x180ae000 0xafd>, <0x180aec00 0x1f8>;\n \t\treg-names = \"aud\", \"i2s_in\";\n-\t\tclocks = <&audiopll BCM_CYGNUS_AUDIOPLL_CH0>,\n-\t\t\t\t<&audiopll BCM_CYGNUS_AUDIOPLL_CH1>,\n-\t\t\t\t<&audiopll BCM_CYGNUS_AUDIOPLL_CH2>;\n-\t\tassigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,\n-\t\t\t\t\t\t\t<&audiopll BCM_CYGNUS_AUDIOPLL_CH0>,\n-\t\t\t\t\t\t\t<&audiopll BCM_CYGNUS_AUDIOPLL_CH1>,\n-\t\t\t\t\t\t\t<&audiopll BCM_CYGNUS_AUDIOPLL_CH2>;\n-\t\tassigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;\n-\t\tassigned-clock-rates = <1769470191>,\n-\t\t\t\t\t\t\t\t<0>,\n-\t\t\t\t\t\t\t\t<0>,\n-\t\t\t\t\t\t\t\t<0>;\n-\t\tclock-names = \"ch0_audio\", \"ch1_audio\", \"ch2_audio\";\n+\n+\t\tassigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>;\n+\t\tassigned-clock-rates = <1376255989>;\n+\n \t\tinterrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;\n \n \t\tssp0: ssp_port@0 {\n \t\t\treg = <0>;\n+\n+\t\t\tclocks = <&audiopll BCM_CYGNUS_AUDIOPLL_CH0>;\n+\t\t\tclock-names = \"ssp_clk\";\n+\t\t\tbrcm,ssp-clk-mux = <0>;\n+\n \t\t\tstatus = \"okay\";\n \t\t};\n \n \t\tssp1: ssp_port@1 {\n \t\t\treg = <1>;\n-\t\t\tstatus = \"disabled\";\n+\n+\t\t\tclocks = <&audiopll BCM_CYGNUS_AUDIOPLL_CH1>;\n+\t\t\tclock-names = \"ssp_clk\";\n+\t\t\tbrcm,ssp-clk-mux = <1>;\n+\n+\t\t\tstatus = \"okay\";\n \t\t};\n \n \t\tssp2: ssp_port@2 {\n \t\t\treg = <2>;\n-\t\t\tstatus = \"disabled\";\n+\n+\t\t\tclocks = <&audiopll BCM_CYGNUS_AUDIOPLL_CH2>;\n+\t\t\tclock-names = \"ssp_clk\";\n+\t\t\tbrcm,ssp-clk-mux = <2>;\n+\n+\t\t\tstatus = \"okay\";\n \t\t};\n \n \t\tspdif: spdif_port@3 {\n \t\t\treg = <3>;\n+\n+\t\t\tclocks = <&audiopll BCM_CYGNUS_AUDIOPLL_CH2>;\n+       \t\t\tclock-names = \"ssp_clk\";\n+\t\t\tbrcm,ssp-clk-mux = <2>;\n+\n \t\t\tstatus = \"disabled\";\n \t\t};\n \t};\n",
    "prefixes": [
        "2/9"
    ]
}