Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/800989/?format=api
{ "id": 800989, "url": "http://patchwork.ozlabs.org/api/patches/800989/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170813114448.20179-2-linus.walleij@linaro.org/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170813114448.20179-2-linus.walleij@linaro.org>", "list_archive_url": null, "date": "2017-08-13T11:44:47", "name": "[2/3] drm/panel: Add DT bindings for Ilitek ILI9322", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "d907541384f8767ac6b015af83a16b6b909c398e", "submitter": { "id": 7055, "url": "http://patchwork.ozlabs.org/api/people/7055/?format=api", "name": "Linus Walleij", "email": "linus.walleij@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170813114448.20179-2-linus.walleij@linaro.org/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/800989/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/800989/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"c4f+of8b\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xVcNs22Trz9t24\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tSun, 13 Aug 2017 21:45:01 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751420AbdHMLpA (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tSun, 13 Aug 2017 07:45:00 -0400", "from mail-lf0-f46.google.com ([209.85.215.46]:36628 \"EHLO\n\tmail-lf0-f46.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751023AbdHMLpA (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Sun, 13 Aug 2017 07:45:00 -0400", "by mail-lf0-f46.google.com with SMTP id o85so30440762lff.3\n\tfor <devicetree@vger.kernel.org>;\n\tSun, 13 Aug 2017 04:44:59 -0700 (PDT)", "from fabina.bredbandsbolaget.se\n\t(c-277e71d5.014-348-6c756e10.cust.bredbandsbolaget.se.\n\t[213.113.126.39])\n\tby smtp.gmail.com with ESMTPSA id 1sm749759lju.63.2017.08.13.04.44.56\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tSun, 13 Aug 2017 04:44:57 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=43jRHixsiHxu4a+Nc4+94SFbrzkYu1qDx4VgKXaAcks=;\n\tb=c4f+of8bYbyDIrQ/zztheRMc/X2f4jzs2NE0QwVzhLbB1NHs7w+XZ8BIV8xlaNS94T\n\t81clnudm2Ab8alOLZt7N+QXeIMb87vOEV1CKgLm9qgJWgttgvfbINAinkTp1+mUtcHrc\n\tHQBMN2CKAnagzGPouy+iqL/4TOlqS7qUtEJck=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=43jRHixsiHxu4a+Nc4+94SFbrzkYu1qDx4VgKXaAcks=;\n\tb=YECNkif2URMgE6q3oDIKFYGSag5T6zaP73jopK/hefwn/MA+1iryte1sDW9bAynb5e\n\trdtBY2sUskBgI20bpsbNz9CVTqObwUahSc83tue+gtZVzl9PtHkMLgClRUXlyIZK83vf\n\tEey7xa+eemmLogVvuFFeehimX4cJiZu5JgBoFjMZtYN2Wp6kblDXk1zGj6HBKvra0OUP\n\tTK2mbS1MaKNoz2tlwPQOELFB3It6+AWnBKgBng0PXKOYuomdFtZyNxtmn0/nf74nu5tk\n\tR8PwEhFFkpeu9M31du8a7FOVQ9Gi8tazTl1gIdL1SEQrsfyJZjxN/AkF4mmjk403LNLS\n\tcU0A==", "X-Gm-Message-State": "AHYfb5gO4hmUmVPr5Y2jubwg8me2vj5bb6/4V172YqcwH2a5Sj8BNN0A\n\tkmcO9jPiPw3mY8P2", "X-Received": "by 10.46.78.1 with SMTP id c1mr6957136ljb.189.1502624698329;\n\tSun, 13 Aug 2017 04:44:58 -0700 (PDT)", "From": "Linus Walleij <linus.walleij@linaro.org>", "To": "Thierry Reding <thierry.reding@gmail.com>,\n\tdri-devel@lists.freedesktop.org", "Cc": "Linus Walleij <linus.walleij@linaro.org>, devicetree@vger.kernel.org", "Subject": "[PATCH 2/3] drm/panel: Add DT bindings for Ilitek ILI9322", "Date": "Sun, 13 Aug 2017 13:44:47 +0200", "Message-Id": "<20170813114448.20179-2-linus.walleij@linaro.org>", "X-Mailer": "git-send-email 2.13.4", "In-Reply-To": "<20170813114448.20179-1-linus.walleij@linaro.org>", "References": "<20170813114448.20179-1-linus.walleij@linaro.org>", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "This adds device tree bindings for the Ilitek ILI9322\n320x240 TFT panel driver.\n\nCc: devicetree@vger.kernel.org\nSigned-off-by: Linus Walleij <linus.walleij@linaro.org>\n---\n .../bindings/display/panel/ilitek,ili9322.txt | 120 +++++++++++++++++++++\n 1 file changed, 120 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/display/panel/ilitek,ili9322.txt", "diff": "diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9322.txt b/Documentation/devicetree/bindings/display/panel/ilitek,ili9322.txt\nnew file mode 100644\nindex 000000000000..d619b1ad14a6\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9322.txt\n@@ -0,0 +1,120 @@\n+Ilitek ILI9322 TFT panel driver with SPI control bus\n+\n+This is a driver for 320x240 TFT panels, accepting a variety of input\n+streams that get adapted and scaled to the panel. The panel output has\n+960 TFT source driver pins and 240 TFT gate driver pins, VCOM, VCOML and\n+VCOMH outputs.\n+\n+Required properties:\n+ - compatible: \"ilitek,ili9322\"\n+ - reg: address of the panel on the SPI bus\n+\n+Optional properties:\n+ - width-mm: physical panel width [mm]\n+ - height-mm: physical panel height [mm]\n+ - vcc-supply: core voltage supply, see regulator/regulator.txt\n+ - iovcc-supply: voltage supply for the interface input/output signals,\n+ see regulator/regulator.txt\n+ - vci-supply: voltage supply for analog parts, see regulator/regulator.txt\n+ - reset-gpios: a GPIO spec for the reset pin, see gpio/gpio.txt\n+ - ilitek,vreg1out-microvolt: the output in microvolts for the VREGOUT1\n+ regulator used to drive the physical display. Valid ranges are 3600 thru\n+ 6000 in 100 microvolt increments. If not specified, hardware defaults will\n+ be used (4.5V).\n+ - ilitek,vcom-amplitude-percent: the percentage of VREGOUT1 used for the\n+ peak-to-peak amplitude of the communcation signals to the physical display.\n+ Valid ranges are 70 thru 132 percent in increments if two percent. Odd\n+ percentages will be truncated. If not specified, hardware defaults will be\n+ used (114%).\n+ - ilitek,vcom-high-percent: the percentage of VREGOUT1 used for the peak\n+ voltage on the communications link. Valid ranges are 37 thru 100 percent.\n+ If not specified, hardware defaults will be used (91%).\n+ - ilitek,gamma-correction-neg: a set of 8 nybbles describing negative\n+ gamma correction for voltages V1 thru V8. Valid range 0..15\n+ - ilitek,gamma-correction-pos: a set of 8 nybbles describing positive\n+ gamma correction for voltages V1 thru V8. Valid range 0..15\n+ These adjust what grayscale voltage will be output for input data V1 = 0,\n+ V2 = 16, V3 = 48, V4 = 96, V5 = 160, V6 = 208, V7 = 240 and V8 = 255.\n+ The curve is shaped like this:\n+\n+ ^\n+ | V8\n+ | V7\n+ | V6\n+ | V5\n+ | V4\n+ | V3\n+ | V2\n+ | V1\n+ +----------------------------------------------------------->\n+ 0 16 48 96 160 208 240 255\n+\n+ The negative and postive gamma values adjust the V1 thru V8 up/down\n+ according to the datasheet specifications. This is a property of the\n+ physical display connected to the display controller and may vary.\n+ If defined, both arrays must be supplied in full. If the properties\n+ are not supplied, hardware defaults will be used.\n+\n+ - ilitek,entry-mode: the panel can be connected to various input streams\n+ and four of them can be selected by electronic straps on the display.\n+ However it is possible to select another mode or override the\n+ electronic default with this property. Valid values:\n+ 0: 8 bit serial RGB through\n+ 1: 8 bit serial RGB aligned\n+ 2: 8 bit serial RGB dummy 320x240\n+ 3: 8 bit serial RGB dummy 360x240\n+ 4: disabled\n+ 5: 24 bit parallel RGB through\n+ 6: 24 bit parallel RGB aligned\n+ 7: 24 bit YUV 640Y 320CbCr\n+ 8: 24 bit YUV 720Y 360CbCr\n+ 9: disabled\n+ 10: 8 bit ITU-R BT.656 720Y 360CbCr\n+ 11: 8 bit ITU-R BT.656 640Y 320CbCr\n+\n+ The following optional properties only apply to RGB and YUV input modes and\n+ can be omitted for BT.656 input modes:\n+\n+ - flip-horizontal: flip the image horizontally (right-to-left scan)\n+ - flip-vertical: flip the image vertically (down-to-up scan)\n+ - pixelclk-active: see display/panel/display-timing.txt\n+ - de-active: see display/panel/display-timing.txt\n+ - hsync-active: see display/panel/display-timing.txt\n+ - vsync-active: see display/panel/display-timing.txt\n+\n+The panel must obey the rules for a SPI slave device as specified in\n+spi/spi-bus.txt\n+\n+The device node can contain one 'port' child node with one child\n+'endpoint' node, according to the bindings defined in\n+media/video-interfaces.txt. This node should describe panel's video bus.\n+\n+Example:\n+\n+panel: display@0 {\n+\tcompatible = \"ilitek,ili9322\";\n+\treg = <0>;\n+\t/* 50 ns min period = 20 MHz */\n+\tspi-max-frequency = <20000000>;\n+\tspi-cpol; /* Clock active low */\n+\t/* Panel LM918A01-1A SY-B4-091116-E0199 */\n+\twidth-mm = <65>;\n+\theight-mm = <50>;\n+\tilitek,entry-mode = <11>;\n+\tilitek,vreg1out-microvolt = <4600>;\n+\tilitek,vcom-high-percent = <91>;\n+\tilitek,vcom-amplitude-percent = <114>;\n+\tilitek,gamma-correction-neg = <0xa>, <0x5>, <0x7>,\n+\t\t<0x7>, <0x7>, <0x5>, <0x1>, <0x6>;\n+\tilitek,gamma-correction-pos = <0x7>, <0x7>, <0x3>,\n+\t\t<0x2>, <0x3>, <0x5>, <0x7>, <0x2>;\n+\tvcc-supply = <&vdisp>;\n+\tiovcc-supply = <&vdisp>;\n+\tvci-supply = <&vdisp>;\n+\n+\tport {\n+\t\tpanel_in: endpoint {\n+\t\t\tremote-endpoint = <&display_out>;\n+\t\t};\n+\t};\n+};\n", "prefixes": [ "2/3" ] }