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GET /api/patches/800953/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 800953,
    "url": "http://patchwork.ozlabs.org/api/patches/800953/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170813013346.14002-4-npiggin@gmail.com/",
    "project": {
        "id": 2,
        "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api",
        "name": "Linux PPC development",
        "link_name": "linuxppc-dev",
        "list_id": "linuxppc-dev.lists.ozlabs.org",
        "list_email": "linuxppc-dev@lists.ozlabs.org",
        "web_url": "https://github.com/linuxppc/wiki/wiki",
        "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git",
        "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/",
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    },
    "msgid": "<20170813013346.14002-4-npiggin@gmail.com>",
    "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170813013346.14002-4-npiggin@gmail.com/",
    "date": "2017-08-13T01:33:41",
    "name": "[v2,4/9] powerpc/64s/radix: Remove bolted-SLB address limit for per-cpu stacks",
    "commit_ref": "d55071905ee1719094c66dd3c40e2a9ef5c65eaf",
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "d7336329b37245bf3b59ced01b7ca7be2a835a4b",
    "submitter": {
        "id": 69518,
        "url": "http://patchwork.ozlabs.org/api/people/69518/?format=api",
        "name": "Nicholas Piggin",
        "email": "npiggin@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170813013346.14002-4-npiggin@gmail.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/800953/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/800953/checks/",
    "tags": {},
    "related": [],
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        "X-Received": "by 10.98.252.204 with SMTP id\n\te195mr20797394pfh.265.1502588062419; \n\tSat, 12 Aug 2017 18:34:22 -0700 (PDT)",
        "From": "Nicholas Piggin <npiggin@gmail.com>",
        "To": "linuxppc-dev@lists.ozlabs.org",
        "Subject": "[PATCH v2 4/9] powerpc/64s/radix: Remove bolted-SLB address limit\n\tfor per-cpu stacks",
        "Date": "Sun, 13 Aug 2017 11:33:41 +1000",
        "Message-Id": "<20170813013346.14002-4-npiggin@gmail.com>",
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        "In-Reply-To": "<20170812113416.15978-1-npiggin@gmail.com>",
        "References": "<20170812113416.15978-1-npiggin@gmail.com>",
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        "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>",
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        "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>",
        "Cc": "kvm-ppc@vger.kernel.org, Nicholas Piggin <npiggin@gmail.com>",
        "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org",
        "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>"
    },
    "content": "Radix MMU does not take SLB or TLB interrupts when accessing kernel\nlinear address. Remove this restriction for radix mode.\n\nSigned-off-by: Nicholas Piggin <npiggin@gmail.com>\n---\n arch/powerpc/kernel/setup_64.c | 11 ++++++++---\n 1 file changed, 8 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c\nindex af23d4b576ec..7393bac3c7f4 100644\n--- a/arch/powerpc/kernel/setup_64.c\n+++ b/arch/powerpc/kernel/setup_64.c\n@@ -564,6 +564,9 @@ static __init u64 safe_stack_limit(void)\n \t/* Other BookE, we assume the first GB is bolted */\n \treturn 1ul << 30;\n #else\n+\tif (early_radix_enabled())\n+\t\treturn ULONG_MAX;\n+\n \t/* BookS, the first segment is bolted */\n \tif (mmu_has_feature(MMU_FTR_1T_SEGMENT))\n \t\treturn 1UL << SID_SHIFT_1T;\n@@ -578,7 +581,8 @@ void __init irqstack_early_init(void)\n \n \t/*\n \t * Interrupt stacks must be in the first segment since we\n-\t * cannot afford to take SLB misses on them.\n+\t * cannot afford to take SLB misses on them. They are not\n+\t * accessed in realmode.\n \t */\n \tfor_each_possible_cpu(i) {\n \t\tsoftirq_ctx[i] = (struct thread_info *)\n@@ -649,8 +653,9 @@ void __init emergency_stack_init(void)\n \t * aligned.\n \t *\n \t * Since we use these as temporary stacks during secondary CPU\n-\t * bringup, we need to get at them in real mode. This means they\n-\t * must also be within the RMO region.\n+\t * bringup, machine check, system reset, and HMI, we need to get\n+\t * at them in real mode. This means they must also be within the RMO\n+\t * region.\n \t *\n \t * The IRQ stacks allocated elsewhere in this file are zeroed and\n \t * initialized in kernel/irq.c. These are initialized here in order\n",
    "prefixes": [
        "v2",
        "4/9"
    ]
}