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GET /api/patches/800467/?format=api
{ "id": 800467, "url": "http://patchwork.ozlabs.org/api/patches/800467/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20170811081933.17474-1-aik@ozlabs.ru/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170811081933.17474-1-aik@ozlabs.ru>", "list_archive_url": null, "date": "2017-08-11T08:19:33", "name": "[kernel] PCI: Disable IOV before pcibios_sriov_disable()", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "9d85709bad9c5fc8fce9a1bd7169fc44fb55c0c0", "submitter": { "id": 7621, "url": "http://patchwork.ozlabs.org/api/people/7621/?format=api", "name": "Alexey Kardashevskiy", "email": "aik@ozlabs.ru" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20170811081933.17474-1-aik@ozlabs.ru/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/800467/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/800467/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-pci-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xTJ7b5jfxz9sDB\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 11 Aug 2017 18:28:59 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752543AbdHKI26 (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 11 Aug 2017 04:28:58 -0400", "from ozlabs.ru ([107.173.13.209]:54154 \"EHLO ozlabs.ru\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1752542AbdHKI25 (ORCPT <rfc822;linux-pci@vger.kernel.org>);\n\tFri, 11 Aug 2017 04:28:57 -0400", "from vpl1.ozlabs.ibm.com (localhost [IPv6:::1])\n\tby ozlabs.ru (Postfix) with ESMTP id 750753A60018;\n\tFri, 11 Aug 2017 04:20:36 -0400 (EDT)" ], "X-Greylist": "delayed 558 seconds by postgrey-1.27 at vger.kernel.org;\n\tFri, 11 Aug 2017 04:28:57 EDT", "From": "Alexey Kardashevskiy <aik@ozlabs.ru>", "To": "linuxppc-dev@lists.ozlabs.org", "Cc": "Alexey Kardashevskiy <aik@ozlabs.ru>, kvm@vger.kernel.org,\n\tYongji Xie <elohimes@gmail.com>, Eric Auger <eric.auger@redhat.com>,\n\tBjorn Helgaas <bhelgaas@google.com>,\n\tlinux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,\n\tshan.gavin@gmail.com, Benjamin Herrenschmidt <benh@kernel.crashing.org>,\n\tPaul Mackerras <paulus@samba.org>, Gavin Shan <gwshan@linux.vnet.ibm.com>", "Subject": "[PATCH kernel] PCI: Disable IOV before pcibios_sriov_disable()", "Date": "Fri, 11 Aug 2017 18:19:33 +1000", "Message-Id": "<20170811081933.17474-1-aik@ozlabs.ru>", "X-Mailer": "git-send-email 2.11.0", "Sender": "linux-pci-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-pci.vger.kernel.org>", "X-Mailing-List": "linux-pci@vger.kernel.org" }, "content": "From: Gavin Shan <gwshan@linux.vnet.ibm.com>\n\nThe PowerNV platform is the only user of pcibios_sriov_disable().\nThe IOV BAR could be shifted by pci_iov_update_resource(). The\nwarning message in the function is printed if the IOV capability\nis in enabled (PCI_SRIOV_CTRL_VFE && PCI_SRIOV_CTRL_MSE) state.\n\nThis is the backtrace of what is happening:\n pci_disable_sriov\n sriov_disable\n pnv_pci_sriov_disable\n pnv_pci_vf_resource_shift\n pci_update_resource\n pci_iov_update_resource\n\nThis fixes the issue by disabling IOV capability before calling\npcibios_sriov_disable(). With it, the disabling path matches\nthe enabling path: pcibios_sriov_enable() is called before the\nIOV capability is enabled.\n\nCc: shan.gavin@gmail.com\nCc: Benjamin Herrenschmidt <benh@kernel.crashing.org>\nCc: Paul Mackerras <paulus@samba.org>\nReported-by: Carol L Soto <clsoto@us.ibm.com>\nSigned-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>\nTested-by: Carol L Soto <clsoto@us.ibm.com>\nSigned-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>\n---\n\nThis is repost. Since Gavin left the team, I am trying to push it out.\nThe previos converstion is here: https://patchwork.ozlabs.org/patch/732653/\n\nTwo questions were raised then. I'll try to comment on this below.\n\n>1) \"res\" is already in the resource tree, so we shouldn't be changing\n> its start address, because that may make the tree inconsistent,\n> e.g., the resource may no longer be completely contained in its\n> parent, it may conflict with a sibling, etc.\n\nWe should not, yes. But...\n\nAt the boot time IOV BAR gets as much MMIO space as it can possibly use.\n(Embarassingly I cannot trace where this is coming from, 8GB is selected\nvia pci_assign_unassigned_root_bus_resources() path somehow).\nFor example, it is 256*32MB=8GB where 256 is maximum PEs number and 32MB\nis a PF/VF BAR size. Whatever shifting we do afterwards, the boudaries of\nthat 8GB area do not change and we test it in pnv_pci_vf_resource_shift():\n\nhttps://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/platforms/powernv/pci-ioda.c#n987\n\n> 2) If we update \"res->start\", shouldn't we update \"res->end\"\n> correspondingly?\n\nWe have to update the PF's IOV BAR address as we allocate PEs dynamically\nand we do not know in advance where our VF numbers start in that\n8GB window. So we change IOV BASR start. Changing the end may make it\nlook more like there is a free area to use but in reality it won't be\nusable as well as the area we \"release\" by shifting the start address.\n\nWe could probably move that M64 MMIO window by the same delta in\nopposite direction so the IOV BAR start address would remain the same\nbut its VF#0 would be mapped to let's say PF#5. I am just afraid there\nis an alignment requirement for these M64 window start address; and this\nwould be even more tricky to manage.\n\nWe could also create reserved areas for the amount of space \"release\" by\nmoving the start address, not sure how though.\n\nSo how do we proceed with this particular patch now? Thanks.\n---\n drivers/pci/iov.c | 7 ++++---\n 1 file changed, 4 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c\nindex 120485d6f352..ac41c8be9200 100644\n--- a/drivers/pci/iov.c\n+++ b/drivers/pci/iov.c\n@@ -331,7 +331,6 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)\n \twhile (i--)\n \t\tpci_iov_remove_virtfn(dev, i, 0);\n \n-\tpcibios_sriov_disable(dev);\n err_pcibios:\n \tiov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);\n \tpci_cfg_access_lock(dev);\n@@ -339,6 +338,8 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)\n \tssleep(1);\n \tpci_cfg_access_unlock(dev);\n \n+\tpcibios_sriov_disable(dev);\n+\n \tif (iov->link != dev->devfn)\n \t\tsysfs_remove_link(&dev->dev.kobj, \"dep_link\");\n \n@@ -357,14 +358,14 @@ static void sriov_disable(struct pci_dev *dev)\n \tfor (i = 0; i < iov->num_VFs; i++)\n \t\tpci_iov_remove_virtfn(dev, i, 0);\n \n-\tpcibios_sriov_disable(dev);\n-\n \tiov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);\n \tpci_cfg_access_lock(dev);\n \tpci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);\n \tssleep(1);\n \tpci_cfg_access_unlock(dev);\n \n+\tpcibios_sriov_disable(dev);\n+\n \tif (iov->link != dev->devfn)\n \t\tsysfs_remove_link(&dev->dev.kobj, \"dep_link\");\n \n", "prefixes": [ "kernel" ] }