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GET /api/patches/795570/?format=api
{ "id": 795570, "url": "http://patchwork.ozlabs.org/api/patches/795570/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170731060230.981-5-wenyou.yang@microchip.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170731060230.981-5-wenyou.yang@microchip.com>", "list_archive_url": null, "date": "2017-07-31T06:02:27", "name": "[U-Boot,4/7] board: sama5d3xek: Convert to support DM_VIDEO", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "7c785b8de9dfb5e61879b07e6ff48add3825b7a3", "submitter": { "id": 69532, "url": "http://patchwork.ozlabs.org/api/people/69532/?format=api", "name": "Wenyou Yang", "email": "Wenyou.Yang@microchip.com" }, "delegate": { "id": 1700, "url": "http://patchwork.ozlabs.org/api/users/1700/?format=api", "username": "ag", "first_name": "Anatolij", "last_name": "Gustschin", "email": "agust@denx.de" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170731060230.981-5-wenyou.yang@microchip.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/795570/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/795570/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xLTd339Q6z9sRW\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 31 Jul 2017 16:12:23 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 38671C22034; Mon, 31 Jul 2017 06:09:27 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 06632C21FEF;\n\tMon, 31 Jul 2017 06:08:44 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid A28F1C21DED; Mon, 31 Jul 2017 06:08:14 +0000 (UTC)", "from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.243])\n\tby lists.denx.de (Postfix) with ESMTPS id F100DC22076\n\tfor <u-boot@lists.denx.de>; Mon, 31 Jul 2017 06:08:13 +0000 (UTC)", "from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com\n\t(10.145.145.31) with Microsoft SMTP Server id 14.3.235.1;\n\tMon, 31 Jul 2017 08:08:09 +0200", "from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com\n\t(10.168.254.31) with Microsoft SMTP Server id 14.3.235.1;\n\tMon, 31 Jul 2017 14:11:01 +0800" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "From": "Wenyou Yang <wenyou.yang@microchip.com>", "To": "U-Boot Mailing List <u-boot@lists.denx.de>", "Date": "Mon, 31 Jul 2017 14:02:27 +0800", "Message-ID": "<20170731060230.981-5-wenyou.yang@microchip.com>", "X-Mailer": "git-send-email 2.13.0", "In-Reply-To": "<20170731060230.981-1-wenyou.yang@microchip.com>", "References": "<20170731060230.981-1-wenyou.yang@microchip.com>", "MIME-Version": "1.0", "Cc": "Albert Aribaud <albert.u.boot@aribaud.net>, Tom Rini <trini@konsulko.com>", "Subject": "[U-Boot] [PATCH 4/7] board: sama5d3xek: Convert to support DM_VIDEO", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Wenyou Yang <wenyou.yang@atmel.com>\n\nConvert the board to enable the driver model support for LCD/video.\n\nSigned-off-by: Wenyou Yang <wenyou.yang@microchip.com>\n---\n\n arch/arm/dts/sama5d36ek_cmp.dts | 1 +\n arch/arm/dts/sama5d3_lcd.dtsi | 21 +------\n arch/arm/dts/sama5d3xdm.dtsi | 26 +++++++++\n board/atmel/sama5d3xek/sama5d3xek.c | 93 +-----------------------------\n configs/sama5d36ek_cmp_mmc_defconfig | 3 +-\n configs/sama5d36ek_cmp_nandflash_defconfig | 3 +-\n configs/sama5d36ek_cmp_spiflash_defconfig | 3 +-\n configs/sama5d3xek_mmc_defconfig | 3 +-\n configs/sama5d3xek_nandflash_defconfig | 3 +-\n configs/sama5d3xek_spiflash_defconfig | 3 +-\n include/configs/sama5d3xek.h | 12 ----\n 11 files changed, 42 insertions(+), 129 deletions(-)", "diff": "diff --git a/arch/arm/dts/sama5d36ek_cmp.dts b/arch/arm/dts/sama5d36ek_cmp.dts\nindex be41490f63..c17bc9f0dc 100644\n--- a/arch/arm/dts/sama5d36ek_cmp.dts\n+++ b/arch/arm/dts/sama5d36ek_cmp.dts\n@@ -8,6 +8,7 @@\n /dts-v1/;\n #include \"sama5d36.dtsi\"\n #include \"sama5d3xmb_cmp.dtsi\"\n+#include \"sama5d3xdm.dtsi\"\n \n / {\n \tmodel = \"Atmel SAMA5D36-EK\";\ndiff --git a/arch/arm/dts/sama5d3_lcd.dtsi b/arch/arm/dts/sama5d3_lcd.dtsi\nindex 14d7c2bc75..10fb3a97ea 100644\n--- a/arch/arm/dts/sama5d3_lcd.dtsi\n+++ b/arch/arm/dts/sama5d3_lcd.dtsi\n@@ -14,31 +14,12 @@\n \tahb {\n \t\tapb {\n \t\t\thlcdc: hlcdc@f0030000 {\n-\t\t\t\tcompatible = \"atmel,sama5d3-hlcdc\";\n+\t\t\t\tcompatible = \"atmel,at91sam9x5-hlcdc\";\n \t\t\t\treg = <0xf0030000 0x2000>;\n \t\t\t\tinterrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;\n \t\t\t\tclocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;\n \t\t\t\tclock-names = \"periph_clk\",\"sys_clk\", \"slow_clk\";\n \t\t\t\tstatus = \"disabled\";\n-\n-\t\t\t\thlcdc-display-controller {\n-\t\t\t\t\tcompatible = \"atmel,hlcdc-display-controller\";\n-\t\t\t\t\t#address-cells = <1>;\n-\t\t\t\t\t#size-cells = <0>;\n-\n-\t\t\t\t\tport@0 {\n-\t\t\t\t\t\t#address-cells = <1>;\n-\t\t\t\t\t\t#size-cells = <0>;\n-\t\t\t\t\t\treg = <0>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\n-\t\t\t\thlcdc_pwm: hlcdc-pwm {\n-\t\t\t\t\tcompatible = \"atmel,hlcdc-pwm\";\n-\t\t\t\t\tpinctrl-names = \"default\";\n-\t\t\t\t\tpinctrl-0 = <&pinctrl_lcd_pwm>;\n-\t\t\t\t\t#pwm-cells = <3>;\n-\t\t\t\t};\n \t\t\t};\n \n \t\t\tpinctrl@fffff200 {\ndiff --git a/arch/arm/dts/sama5d3xdm.dtsi b/arch/arm/dts/sama5d3xdm.dtsi\nindex 035ab72b39..b3df9af2b4 100644\n--- a/arch/arm/dts/sama5d3xdm.dtsi\n+++ b/arch/arm/dts/sama5d3xdm.dtsi\n@@ -10,6 +10,32 @@\n / {\n \tahb {\n \t\tapb {\n+\t\t\thlcdc: hlcdc@f0030000 {\n+\t\t\t\tatmel,vl-bpix = <4>;\n+\t\t\t\tatmel,output-mode = <24>;\n+\t\t\t\tatmel,guard-time = <1>;\n+\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\tpinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888_alt>;\n+\t\t\t\tstatus = \"okay\";\n+\t\t\t\tu-boot,dm-pre-reloc;\n+\n+\t\t\t\tdisplay-timings {\n+\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t800x480 {\n+\t\t\t\t\t\tclock-frequency = <24000000>;\n+\t\t\t\t\t\thactive = <800>;\n+\t\t\t\t\t\tvactive = <480>;\n+\t\t\t\t\t\thsync-len = <5>;\n+\t\t\t\t\t\thfront-porch = <64>;\n+\t\t\t\t\t\thback-porch = <64>;\n+\t\t\t\t\t\tvfront-porch = <22>;\n+\t\t\t\t\t\tvback-porch = <21>;\n+\t\t\t\t\t\tvsync-len = <5>;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t};\n+\n \t\t\ti2c1: i2c@f0018000 {\n \t\t\t\tqt1070: keyboard@1b {\n \t\t\t\t\tcompatible = \"qt1070\";\ndiff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c\nindex c1f2769f1c..2b7a6d4ecb 100644\n--- a/board/atmel/sama5d3xek/sama5d3xek.c\n+++ b/board/atmel/sama5d3xek/sama5d3xek.c\n@@ -13,9 +13,7 @@\n #include <asm/arch/gpio.h>\n #include <asm/arch/clk.h>\n #include <debug_uart.h>\n-#include <lcd.h>\n #include <linux/ctype.h>\n-#include <atmel_hlcdc.h>\n #include <phy.h>\n #include <micrel.h>\n #include <spl.h>\n@@ -132,80 +130,6 @@ static void sama5d3xek_mci_hw_init(void)\n }\n #endif\n \n-#ifdef CONFIG_LCD\n-vidinfo_t panel_info = {\n-\t.vl_col = 800,\n-\t.vl_row = 480,\n-\t.vl_clk = 24000000,\n-\t.vl_bpix = LCD_BPP,\n-\t.vl_tft = 1,\n-\t.vl_hsync_len = 128,\n-\t.vl_left_margin = 64,\n-\t.vl_right_margin = 64,\n-\t.vl_vsync_len = 2,\n-\t.vl_upper_margin = 22,\n-\t.vl_lower_margin = 21,\n-\t.mmio = ATMEL_BASE_LCDC,\n-};\n-\n-void lcd_enable(void)\n-{\n-}\n-\n-void lcd_disable(void)\n-{\n-}\n-\n-static void sama5d3xek_lcd_hw_init(void)\n-{\n-\tgd->fb_base = CONFIG_SAMA5D3_LCD_BASE;\n-\n-\t/* The higher 8 bit of LCD is board related */\n-\tat91_pio3_set_c_periph(AT91_PIO_PORTC, 14, 0);\t/* LCDD16 */\n-\tat91_pio3_set_c_periph(AT91_PIO_PORTC, 13, 0);\t/* LCDD17 */\n-\tat91_pio3_set_c_periph(AT91_PIO_PORTC, 12, 0);\t/* LCDD18 */\n-\tat91_pio3_set_c_periph(AT91_PIO_PORTC, 11, 0);\t/* LCDD19 */\n-\tat91_pio3_set_c_periph(AT91_PIO_PORTC, 10, 0);\t/* LCDD20 */\n-\tat91_pio3_set_c_periph(AT91_PIO_PORTC, 15, 0);\t/* LCDD21 */\n-\tat91_pio3_set_c_periph(AT91_PIO_PORTE, 27, 0);\t/* LCDD22 */\n-\tat91_pio3_set_c_periph(AT91_PIO_PORTE, 28, 0);\t/* LCDD23 */\n-\n-\t/* Configure lower 16 bit of LCD and enable clock */\n-\tat91_lcd_hw_init();\n-}\n-\n-#ifdef CONFIG_LCD_INFO\n-#include <nand.h>\n-#include <version.h>\n-\n-void lcd_show_board_info(void)\n-{\n-\tulong dram_size;\n-\tuint64_t nand_size;\n-\tint i;\n-\tchar temp[32];\n-\n-\tlcd_printf(\"%s\\n\", U_BOOT_VERSION);\n-\tlcd_printf(\"(C) 2013 ATMEL Corp\\n\");\n-\tlcd_printf(\"at91@atmel.com\\n\");\n-\tlcd_printf(\"%s CPU at %s MHz\\n\", get_cpu_name(),\n-\t\t strmhz(temp, get_cpu_clk_rate()));\n-\n-\tdram_size = 0;\n-\tfor (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)\n-\t\tdram_size += gd->bd->bi_dram[i].size;\n-\n-\tnand_size = 0;\n-#ifdef CONFIG_NAND_ATMEL\n-\tfor (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)\n-\t\tnand_size += get_nand_dev_by_index(i)->size;\n-#endif\n-\tlcd_printf(\"%ld MB SDRAM, %lld MB NAND\\n\",\n-\t\t dram_size >> 20, nand_size >> 20);\n-}\n-#endif /* CONFIG_LCD_INFO */\n-#endif /* CONFIG_LCD */\n-\n #ifdef CONFIG_DEBUG_UART_BOARD_INIT\n void board_debug_uart_init(void)\n {\n@@ -240,10 +164,6 @@ int board_init(void)\n #ifdef CONFIG_GENERIC_ATMEL_MCI\n \tsama5d3xek_mci_hw_init();\n #endif\n-#ifdef CONFIG_LCD\n-\tif (has_lcdc())\n-\t\tsama5d3xek_lcd_hw_init();\n-#endif\n \treturn 0;\n }\n \n@@ -257,17 +177,8 @@ int dram_init(void)\n #ifdef CONFIG_BOARD_LATE_INIT\n int board_late_init(void)\n {\n-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG\n-\tconst int MAX_STR_LEN = 32;\n-\tchar name[MAX_STR_LEN], *p;\n-\tint i;\n-\n-\tstrncpy(name, get_cpu_name(), MAX_STR_LEN);\n-\tfor (i = 0, p = name; (*p) && (i < MAX_STR_LEN); p++, i++)\n-\t\t*p = tolower(*p);\n-\n-\tstrcat(name, \"ek.dtb\");\n-\tsetenv(\"dtb_name\", name);\n+#ifdef CONFIG_DM_VIDEO\n+\tat91_video_show_board_info();\n #endif\n \treturn 0;\n }\ndiff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig\nindex d99baad0f6..a19fc0ba73 100644\n--- a/configs/sama5d36ek_cmp_mmc_defconfig\n+++ b/configs/sama5d36ek_cmp_mmc_defconfig\n@@ -49,5 +49,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y\n CONFIG_ATMEL_USART=y\n CONFIG_DM_SPI=y\n CONFIG_ATMEL_SPI=y\n-CONFIG_LCD=y\n CONFIG_FAT_WRITE=y\n+CONFIG_DM_VIDEO=y\n+CONFIG_ATMEL_HLCD=y\ndiff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig\nindex 4307f3ac9c..06448253da 100644\n--- a/configs/sama5d36ek_cmp_nandflash_defconfig\n+++ b/configs/sama5d36ek_cmp_nandflash_defconfig\n@@ -49,5 +49,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y\n CONFIG_ATMEL_USART=y\n CONFIG_DM_SPI=y\n CONFIG_ATMEL_SPI=y\n-CONFIG_LCD=y\n+CONFIG_DM_VIDEO=y\n+CONFIG_ATMEL_HLCD=y\n CONFIG_FAT_WRITE=y\ndiff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig\nindex 53bab325b7..734379a889 100644\n--- a/configs/sama5d36ek_cmp_spiflash_defconfig\n+++ b/configs/sama5d36ek_cmp_spiflash_defconfig\n@@ -49,5 +49,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y\n CONFIG_ATMEL_USART=y\n CONFIG_DM_SPI=y\n CONFIG_ATMEL_SPI=y\n-CONFIG_LCD=y\n+CONFIG_DM_VIDEO=y\n+CONFIG_ATMEL_HLCD=y\n CONFIG_FAT_WRITE=y\ndiff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig\nindex 1836e5392f..bf620e58cd 100644\n--- a/configs/sama5d3xek_mmc_defconfig\n+++ b/configs/sama5d3xek_mmc_defconfig\n@@ -74,5 +74,6 @@ CONFIG_USB_EHCI_HCD=y\n CONFIG_USB_STORAGE=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_ATMEL_USBA=y\n-CONFIG_LCD=y\n+CONFIG_DM_VIDEO=y\n+CONFIG_ATMEL_HLCD=y\n CONFIG_FAT_WRITE=y\ndiff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig\nindex c1860bd36d..252fd54f5d 100644\n--- a/configs/sama5d3xek_nandflash_defconfig\n+++ b/configs/sama5d3xek_nandflash_defconfig\n@@ -69,5 +69,6 @@ CONFIG_USB_EHCI_HCD=y\n CONFIG_USB_STORAGE=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_ATMEL_USBA=y\n-CONFIG_LCD=y\n+CONFIG_DM_VIDEO=y\n+CONFIG_ATMEL_HLCD=y\n CONFIG_FAT_WRITE=y\ndiff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig\nindex 41bf96c036..d99d1aae9f 100644\n--- a/configs/sama5d3xek_spiflash_defconfig\n+++ b/configs/sama5d3xek_spiflash_defconfig\n@@ -70,5 +70,6 @@ CONFIG_USB_EHCI_HCD=y\n CONFIG_USB_STORAGE=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_ATMEL_USBA=y\n-CONFIG_LCD=y\n+CONFIG_DM_VIDEO=y\n+CONFIG_ATMEL_HLCD=y\n CONFIG_FAT_WRITE=y\ndiff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h\nindex a5a0f7c32f..49cb237236 100644\n--- a/include/configs/sama5d3xek.h\n+++ b/include/configs/sama5d3xek.h\n@@ -28,18 +28,6 @@\n */\n #define ATMEL_PMC_UHP\t\t\tAT91SAM926x_PMC_UHP\n \n-/* LCD */\n-#define LCD_BPP\t\t\t\tLCD_COLOR16\n-#define LCD_OUTPUT_BPP 24\n-#define CONFIG_LCD_LOGO\n-#define CONFIG_LCD_INFO\n-#define CONFIG_LCD_INFO_BELOW_LOGO\n-#define CONFIG_ATMEL_HLCD\n-#define CONFIG_ATMEL_LCD_RGB565\n-\n-/* board specific (not enough SRAM) */\n-#define CONFIG_SAMA5D3_LCD_BASE\t\t0x23E00000\n-\n /* NOR flash */\n #ifdef CONFIG_MTD_NOR_FLASH\n #define CONFIG_FLASH_CFI_DRIVER\n", "prefixes": [ "U-Boot", "4/7" ] }