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{ "id": 790821, "url": "http://patchwork.ozlabs.org/api/patches/790821/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/AM3PR04MB11856946C0C3F88260E039CF91A60@AM3PR04MB1185.eurprd04.prod.outlook.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<AM3PR04MB11856946C0C3F88260E039CF91A60@AM3PR04MB1185.eurprd04.prod.outlook.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/AM3PR04MB11856946C0C3F88260E039CF91A60@AM3PR04MB1185.eurprd04.prod.outlook.com/", "date": "2017-07-19T06:44:30", "name": "[2/3] soc/fsl/qe: only apply QE_General4 workaround on affected SoCs", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "9347ea83697d1b63546a38acd7ed6933b0abd3b1", "submitter": { "id": 68014, "url": "http://patchwork.ozlabs.org/api/people/68014/?format=api", "name": "Qiang Zhao", "email": "qiang.zhao@nxp.com" }, "delegate": { "id": 1707, "url": "http://patchwork.ozlabs.org/api/users/1707/?format=api", "username": "scottwood", "first_name": "Scott", "last_name": "Wood", "email": "scottwood@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/AM3PR04MB11856946C0C3F88260E039CF91A60@AM3PR04MB1185.eurprd04.prod.outlook.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/790821/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/790821/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xC6xV1JBxz9s8J\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 19 Jul 2017 16:46:06 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xC6xV05ttzDrVM\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 19 Jul 2017 16:46:06 +1000 (AEST)", "from EUR01-VE1-obe.outbound.protection.outlook.com\n\t(mail-ve1eur01on0078.outbound.protection.outlook.com [104.47.1.78])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xC6vm3V63zDrTn\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tWed, 19 Jul 2017 16:44:36 +1000 (AEST)", "from AM3PR04MB1185.eurprd04.prod.outlook.com (10.163.6.143) by\n\tAM3PR04MB1188.eurprd04.prod.outlook.com (10.163.6.146) with Microsoft\n\tSMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id\n\t15.1.1261.13; Wed, 19 Jul 2017 06:44:30 +0000", "from AM3PR04MB1185.eurprd04.prod.outlook.com\n\t([fe80::609e:f909:82f:6f47]) by\n\tAM3PR04MB1185.eurprd04.prod.outlook.com\n\t([fe80::609e:f909:82f:6f47%14]) with mapi id 15.01.1261.024;\n\tWed, 19 Jul 2017 06:44:30 +0000" ], "Authentication-Results": [ "ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"vnrVP5gv\";\n\tdkim-atps=neutral", "lists.ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"vnrVP5gv\";\n\tdkim-atps=neutral", "lists.ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"vnrVP5gv\"; \n\tdkim-atps=neutral", "keymile.com; dkim=none (message not signed)\n\theader.d=none; keymile.com; dmarc=none action=none header.from=nxp.com;" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=rLaiz1Nd0SK5mFfoQUi+zqf7gjhQLyH/0ma1KUIMnYo=;\n\tb=vnrVP5gv5Ns1CgEnCtVBV8iniiLzHwXpZGipp7WhoTTTZw5/YVYa3fboxdPvE1J9YDNtJtAQy1a6fqX5W3kcd8jRjWNTOOlf5sUjGAf5Sz7yJenfgF+UFIPpPknZPivuWkiEkzcVf4uZRPcrWfs/g2vPHybh7INfzD39d37xmOw=", "From": "Qiang Zhao <qiang.zhao@nxp.com>", "To": "Valentin Longchamp <valentin.longchamp@keymile.com>,\n\t\"linuxppc-dev@lists.ozlabs.org\" <linuxppc-dev@lists.ozlabs.org>", "Subject": "RE: [PATCH 2/3] soc/fsl/qe: only apply QE_General4 workaround on\n\taffected SoCs", "Thread-Topic": "[PATCH 2/3] soc/fsl/qe: only apply QE_General4 workaround on\n\taffected SoCs", "Thread-Index": "AQHSiQjMeqJfgVuksEGsKDihm6PIJ6Jboi0A", "Date": "Wed, 19 Jul 2017 06:44:30 +0000", "Message-ID": "<AM3PR04MB11856946C0C3F88260E039CF91A60@AM3PR04MB1185.eurprd04.prod.outlook.com>", "References": "<1487327387-26370-1-git-send-email-valentin.longchamp@keymile.com>\n\t<1487327387-26370-3-git-send-email-valentin.longchamp@keymile.com>", "In-Reply-To": "<1487327387-26370-3-git-send-email-valentin.longchamp@keymile.com>", "Accept-Language": "en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "authentication-results": [ "ozlabs.org; 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charset=\"us-ascii\"", "Content-Transfer-Encoding": "quoted-printable", "MIME-Version": "1.0", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-originalarrivaltime": "19 Jul 2017 06:44:30.5980\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM3PR04MB1188", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "\"oss@buserror.net\" <oss@buserror.net>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Hi Valentin,\n\nThis patch you added make the compiling issue on armv8.\nCould you send another patch to resolve it?\n\nCC drivers/soc/samsung/pm_domains.o\n CC drivers/soc/sunxi/sunxi_sram.o\n CC drivers/soc/renesas/rcar-rst.o\n CC drivers/soc/fsl/qe/qe_io.o\ndrivers/soc/fsl/qe/qe.c: In function 'qe_setbrg':\ndrivers/soc/fsl/qe/qe.c:248:2: error: implicit declaration of function 'pvr_version_is' [-Werror=implicit-function-declaration]\n if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x))\n ^\n CC drivers/soc/fsl/qe/ucc.o\n CC drivers/soc/renesas/rcar-sysc.o\n CHK kernel/config_data.h\ncc1: some warnings being treated as errors\n CC drivers/soc/tegra/fuse/fuse-tegra.o\n LD drivers/soc/rockchip/built-in.o\n CC drivers/soc/tegra/fuse/fuse-tegra30.o\nscripts/Makefile.build:302: recipe for target 'drivers/soc/fsl/qe/qe.o' failed\nmake[4]: *** [drivers/soc/fsl/qe/qe.o] Error 1\n\n-----Original Message-----\nFrom: Valentin Longchamp [mailto:valentin.longchamp@keymile.com] \nSent: Friday, February 17, 2017 6:30 PM\nTo: linuxppc-dev@lists.ozlabs.org; Qiang Zhao <qiang.zhao@nxp.com>\nCc: oss@buserror.net; Valentin Longchamp <valentin.longchamp@keymile.com>\nSubject: [PATCH 2/3] soc/fsl/qe: only apply QE_General4 workaround on affected SoCs\n\nThe QE_General4 workaround is only valid for the MPC832x and MPC836x SoCs. The other SoCs that embed a QUICC engine are not affected by this hardware bug and thus can use the computed divisors (this was successfully tested on the T1040).\n\nSimilalry to what was done in commit 8ce795cb0c6b (\"i2c: mpc: assign the correct prescaler from SVR\") in order to avoid changes in the device tree nodes of the QE (with maybe a variant of the compatible property), the PVR reg is read out to find out if the workaround must be applied or not.\n\nSigned-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>\n---\n drivers/soc/fsl/qe/qe.c | 8 ++++++--\n 1 file changed, 6 insertions(+), 2 deletions(-)\n\n \t that the BRG divisor must be even if you're not using divide-by-16\n \t mode. */\n-\tif (!div16 && (divisor & 1) && (divisor > 3))\n-\t\tdivisor++;\n+\tif (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x))\n+\t\tif (!div16 && (divisor & 1) && (divisor > 3))\n+\t\t\tdivisor++;\n \n \ttempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |\n \t\tQE_BRGC_ENABLE | div16;\n--\n1.8.3.1", "diff": "diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c index 03874df..b66157fc 100644\n--- a/drivers/soc/fsl/qe/qe.c\n+++ b/drivers/soc/fsl/qe/qe.c\n@@ -202,6 +202,9 @@ unsigned int qe_get_brg_clk(void) } EXPORT_SYMBOL(qe_get_brg_clk);\n \n+#define PVR_VER_836x\t0x8083\n+#define PVR_VER_832x\t0x8084\n+\n /* Program the BRG to the given sampling rate and multiplier\n *\n * @brg: the BRG, QE_BRG1 - QE_BRG16\n@@ -228,8 +231,9 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)\n \t/* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says\n", "prefixes": [ "2/3" ] }