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GET /api/patches/783424/?format=api
{ "id": 783424, "url": "http://patchwork.ozlabs.org/api/patches/783424/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/fc6577fcc305742e61ea24c6eb519c212717e5ec.1499078414.git.sd@queasysnail.net/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<fc6577fcc305742e61ea24c6eb519c212717e5ec.1499078414.git.sd@queasysnail.net>", "list_archive_url": null, "date": "2017-07-03T11:02:55", "name": "[net] ixgbe: fix masking of bits read from IXGBE_VXLANCTRL register", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "647b5309f67eef09cc5e4abe83ffa7bdcb0439b0", "submitter": { "id": 47767, "url": "http://patchwork.ozlabs.org/api/people/47767/?format=api", "name": "Sabrina Dubroca", "email": "sd@queasysnail.net" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/fc6577fcc305742e61ea24c6eb519c212717e5ec.1499078414.git.sd@queasysnail.net/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/783424/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/783424/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3x1PZ21Zn7z9s65\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 3 Jul 2017 21:10:33 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id E30F08880C;\n\tMon, 3 Jul 2017 11:10:30 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id B8F6RFQRGIEj; Mon, 3 Jul 2017 11:10:28 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id CDB9288809;\n\tMon, 3 Jul 2017 11:10:28 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id ABB8D1CEA16\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 3 Jul 2017 11:10:27 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id A144C8617B\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 3 Jul 2017 11:10:27 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id J8hrY9Trd2oh for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 3 Jul 2017 11:10:26 +0000 (UTC)", "from mx1.redhat.com (mx1.redhat.com [209.132.183.28])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id BF1F785C63\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 3 Jul 2017 11:10:26 +0000 (UTC)", "from smtp.corp.redhat.com\n\t(int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id C883580E7A;\n\tMon, 3 Jul 2017 11:04:01 +0000 (UTC)", "from localhost.localdomain (ovpn-116-229.ams2.redhat.com\n\t[10.36.116.229])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 90EC35D6AE;\n\tMon, 3 Jul 2017 11:04:00 +0000 (UTC)" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": [ "delayed 00:06:23 by SQLgrey-1.7.6", "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.25]); Mon, 03 Jul 2017 11:04:02 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com C883580E7A", "Authentication-Results": [ "ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none)\n\theader.from=queasysnail.net", "ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tspf=none smtp.mailfrom=sd@queasysnail.net" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 mx1.redhat.com C883580E7A", "From": "Sabrina Dubroca <sd@queasysnail.net>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Mon, 3 Jul 2017 13:02:55 +0200", "Message-Id": "<fc6577fcc305742e61ea24c6eb519c212717e5ec.1499078414.git.sd@queasysnail.net>", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.15", "Cc": "netdev@vger.kernel.org, Sabrina Dubroca <sd@queasysnail.net>", "Subject": "[Intel-wired-lan] [PATCH net] ixgbe: fix masking of bits read from\n\tIXGBE_VXLANCTRL register", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "In ixgbe_clear_udp_tunnel_port(), we read the IXGBE_VXLANCTRL register\nand then try to mask some bits out of the value, using the logical\ninstead of bitwise and operator.\n\nFixes: a21d0822ff69 (\"ixgbe: add support for geneve Rx offload\")\nSigned-off-by: Sabrina Dubroca <sd@queasysnail.net>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex d39cba214320..c3e70ec2da0f 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -4868,7 +4868,7 @@ static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)\n \t\t\t\tIXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))\n \t\treturn;\n \n-\tvxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;\n+\tvxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;\n \tIXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);\n \n \tif (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)\n", "prefixes": [ "net" ] }