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GET /api/patches/782085/?format=api
{ "id": 782085, "url": "http://patchwork.ozlabs.org/api/patches/782085/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170629071256.8159-5-oohall@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20170629071256.8159-5-oohall@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170629071256.8159-5-oohall@gmail.com/", "date": "2017-06-29T07:12:56", "name": "[4/4] powerpc/smp: Add Power9 scheduler topology", "commit_ref": "96d91431d6915073c539c8bdd439b4c863148fc1", "pull_url": null, "state": "accepted", "archived": false, "hash": "d06e2d3a2b169f21989a41f75c54b17873ed3da5", "submitter": { "id": 68108, "url": "http://patchwork.ozlabs.org/api/people/68108/?format=api", "name": "Oliver O'Halloran", "email": "oohall@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170629071256.8159-5-oohall@gmail.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/782085/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/782085/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3wyrhb3zbrz9ryv\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 29 Jun 2017 17:22:23 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3wyrhb2wNTzDr5q\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 29 Jun 2017 17:22:23 +1000 (AEST)", "from mail-pg0-x243.google.com (mail-pg0-x243.google.com\n\t[IPv6:2607:f8b0:400e:c05::243])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3wyrVB0YQNzDr51\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 29 Jun 2017 17:13:22 +1000 (AEST)", "by mail-pg0-x243.google.com with SMTP id u62so10887771pgb.0\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 29 Jun 2017 00:13:21 -0700 (PDT)", "from flat-canetoad.ozlabs.ibm.com ([122.99.82.10])\n\tby smtp.gmail.com with ESMTPSA id\n\ta29sm9821658pfg.30.2017.06.29.00.13.18\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 29 Jun 2017 00:13:19 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"bByjI4M0\"; dkim-atps=neutral", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"bByjI4M0\"; dkim-atps=neutral", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"bByjI4M0\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=/qney8xl1Hq466NhMn/h719FhiY03+jIBvW+03bwvb4=;\n\tb=bByjI4M0V1jbO/2NtW702Tv2jjkGvt6Q+283sDOsluUBeT45v+fLbKdfW4r4xMmgpT\n\tAFU9IPiNo8tarCeRq9Yx3WVX1AWYs3Mtnd9KrzVFLt4jXpYvtRyYG+okLrYE9OOiLRdf\n\t6BMS0q2CVDJk/ylW6SUMktWdiLl94nhBmho4ZZwQb2LryndtUMf/DweXOcdAdi+GsqR6\n\tKD2+OwYVuJbMrr1z+9ASshKpDjPbc4fKOy4P3hxfXA+tSoSt4A7b0PuO9F6QTUiWRfL0\n\t9jcDP/WaPiMvUIoUGR+IDGx4fQ5cCuj3xnafRS+zD7ldcD2rdXx+fHSzCXnK8OvKGDIm\n\tSGZw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=/qney8xl1Hq466NhMn/h719FhiY03+jIBvW+03bwvb4=;\n\tb=bYR7ttfUI0s7xYQ9aZNhImqntSdbciWcdZ7TL6WSWe+VrBlHN76iwLo0VVXqL8slKn\n\tk7dkjhAZni05NOjnFwTtl3DbekV2OGaWvZAmjvcNCMGW6h9oGhh9uZ/JKs819AU2wGI+\n\t2y3Qc6ek4G2QxSwqbEF4jl0CakKNE+dpgibvwZi9P5WACZbYxtpJuI5NXznw9c5PAXrb\n\tjN7qY3XLNW8kXBJS+JARc1TRGiv4DdSw8o1jNjoSqIdo6ZYQmu4CZhD7V1lqBxxafXru\n\t0waUNcs8fpad9rB2LePN5VoUfOAOmCpXlOxqNBEGg2/h7SN3WnWh7Lvuh4hV6tYn8weP\n\tOR4g==", "X-Gm-Message-State": "AKS2vOwmA2Cs202odia4EnfcRR2n0V6vsi2816y2aadySeBbnPtZ2R1Q\n\t148D/fN0/duTKy1o", "X-Received": "by 10.99.106.66 with SMTP id f63mr14224641pgc.150.1498720400216; \n\tThu, 29 Jun 2017 00:13:20 -0700 (PDT)", "From": "Oliver O'Halloran <oohall@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 4/4] powerpc/smp: Add Power9 scheduler topology", "Date": "Thu, 29 Jun 2017 17:12:56 +1000", "Message-Id": "<20170629071256.8159-5-oohall@gmail.com>", "X-Mailer": "git-send-email 2.9.4", "In-Reply-To": "<20170629071256.8159-1-oohall@gmail.com>", "References": "<20170629071256.8159-1-oohall@gmail.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "mikey@neuling.org, Oliver O'Halloran <oohall@gmail.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "In previous generations of Power processors each core had a private L2\ncache. The Power 9 processor has a slightly different design where the\nL2 cache is shared among pairs of cores rather than being completely\nprivate.\n\nMaking the scheduler aware of this cache sharing allows the scheduler to\nmake better migration decisions. For example, if two CPU heavy tasks\nshare a core then one task can be migrated to the paired core to improve\nthroughput. Under the existing three level topology the task could be\nmigrated to any core on the same chip, while with the new topology it\nwould be preferentially migrated to the paired core so it remains\ncache-hot.\n\nSigned-off-by: Oliver O'Halloran <oohall@gmail.com>\n---\n arch/powerpc/kernel/smp.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 51 insertions(+), 1 deletion(-)", "diff": "diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c\nindex 46f071cedf31..7b2ed0d6fc96 100644\n--- a/arch/powerpc/kernel/smp.c\n+++ b/arch/powerpc/kernel/smp.c\n@@ -952,6 +952,8 @@ static void add_cpu_to_masks(int cpu)\n \t\t\tset_cpus_related(cpu, i, cpu_core_mask);\n }\n \n+static bool shared_caches;\n+\n /* Activate a secondary processor. */\n void start_secondary(void *unused)\n {\n@@ -981,6 +983,13 @@ void start_secondary(void *unused)\n \t/* Update topology CPU masks */\n \tadd_cpu_to_masks(cpu);\n \n+\t/*\n+\t * Check for any shared caches. Note that this must be done on a\n+\t * per-core basis because one core in the pair might be disabled.\n+\t */\n+\tif (!cpumask_equal(cpu_l2_cache_mask(cpu), cpu_sibling_mask(cpu)))\n+\t\tshared_caches = true;\n+\n \tset_numa_node(numa_cpu_lookup_table[cpu]);\n \tset_numa_mem(local_memory_node(numa_cpu_lookup_table[cpu]));\n \n@@ -1022,6 +1031,35 @@ static struct sched_domain_topology_level powerpc_topology[] = {\n \t{ NULL, },\n };\n \n+/*\n+ * P9 has a slightly odd architecture where pairs of cores share an L2 cache.\n+ * This topology makes it *much* cheaper to migrate tasks between adjacent cores\n+ * since the migrated task remains cache hot. We want to take advantage of this\n+ * at the scheduler level so an extra topology level is required.\n+ */\n+static int powerpc_shared_cache_flags(void)\n+{\n+\treturn SD_SHARE_PKG_RESOURCES;\n+}\n+\n+/*\n+ * We can't just pass cpu_l2_cache_mask() directly because\n+ * returns a non-const pointer and the compiler barfs on that.\n+ */\n+static const struct cpumask *shared_cache_mask(int cpu)\n+{\n+\treturn cpu_l2_cache_mask(cpu);\n+}\n+\n+static struct sched_domain_topology_level power9_topology[] = {\n+#ifdef CONFIG_SCHED_SMT\n+\t{ cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },\n+#endif\n+\t{ shared_cache_mask, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE) },\n+\t{ cpu_cpu_mask, SD_INIT_NAME(DIE) },\n+\t{ NULL, },\n+};\n+\n static __init long smp_setup_cpu_workfn(void *data __always_unused)\n {\n \tsmp_ops->setup_cpu(boot_cpuid);\n@@ -1043,7 +1081,19 @@ void __init smp_cpus_done(unsigned int max_cpus)\n \n \tdump_numa_cpu_topology();\n \n-\tset_sched_topology(powerpc_topology);\n+\t/*\n+\t * If any CPU detects that it's sharing a cache with another CPU then\n+\t * use the deeper topology that is aware of this sharing.\n+\t */\n+\tif (shared_caches) {\n+\t\tpr_info(\"Using shared cache scheduler topology\\n\");\n+\t\tset_sched_topology(power9_topology);\n+\t\t/* HACK: warn if we're using this on anything by P9 */\n+\t\tWARN_ON((mfspr(SPRN_PVR) & 0xffffff00) != 0x004e0100);\n+\t} else {\n+\t\tpr_info(\"Using standard scheduler topology\\n\");\n+\t\tset_sched_topology(powerpc_topology);\n+\t}\n }\n \n #ifdef CONFIG_HOTPLUG_CPU\n", "prefixes": [ "4/4" ] }