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GET /api/patches/782083/?format=api
{ "id": 782083, "url": "http://patchwork.ozlabs.org/api/patches/782083/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170629071256.8159-3-oohall@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20170629071256.8159-3-oohall@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170629071256.8159-3-oohall@gmail.com/", "date": "2017-06-29T07:12:54", "name": "[2/4] powerpc/smp: Rework CPU topology construction", "commit_ref": "df52f6714071c49a1fb1f541d4c4ff929bd4594d", "pull_url": null, "state": "accepted", "archived": false, "hash": "3ecddf26cb9a47273bcac9b24971c6f9f88655f6", "submitter": { "id": 68108, "url": "http://patchwork.ozlabs.org/api/people/68108/?format=api", "name": "Oliver O'Halloran", "email": "oohall@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170629071256.8159-3-oohall@gmail.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/782083/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/782083/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3wyrcJ682qz9s75\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 29 Jun 2017 17:18:40 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3wyrcJ55K7zDr4r\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 29 Jun 2017 17:18:40 +1000 (AEST)", "from mail-pf0-x242.google.com (mail-pf0-x242.google.com\n\t[IPv6:2607:f8b0:400e:c00::242])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3wyrV54kCszDr4k\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 29 Jun 2017 17:13:17 +1000 (AEST)", "by mail-pf0-x242.google.com with SMTP id d5so11994832pfe.1\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 29 Jun 2017 00:13:17 -0700 (PDT)", "from flat-canetoad.ozlabs.ibm.com ([122.99.82.10])\n\tby smtp.gmail.com with ESMTPSA id\n\ta29sm9821658pfg.30.2017.06.29.00.13.13\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 29 Jun 2017 00:13:15 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"NJc+Ybaf\"; dkim-atps=neutral", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"NJc+Ybaf\"; dkim-atps=neutral", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"NJc+Ybaf\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=j3x8KLeYiLGIgQrIIdOkDYq/NG6HSoYMbfasvAcEDe8=;\n\tb=NJc+Ybaf1YgCNZvgAgJgwX0kXz++vBOYhaSO+bzN6/6egCIs3vtsu/yJqPW5RF+v3s\n\tGQ/QkHIeWfXO15vIKWYzN2KL/CDYZ2RlBniQ7UMFPeYOPxj3+FU0cLF/JAwuakU6XiT/\n\tJ1tN2UaNiHpHH+R9BaPGxrVY1Aq3gVpPVjJ9UFvr7H5v1lSdeNKl1A3xZJe5cEnzgND/\n\tgP463GlhJkgGtzcnqTfIQsQqhij2LYoLlsbry7KgaW9rAiCEPSt4Ew9JFVZd015AgAWH\n\tJJduPDgFXk2XGeiIXBbSdtoTRN4/qHPm8KhH/q+pAg9njySj7EIqQ+MpTcSo4x17z0k1\n\tanWA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=j3x8KLeYiLGIgQrIIdOkDYq/NG6HSoYMbfasvAcEDe8=;\n\tb=FMTyX1XQEPuM9LANN62/wbw6ST1+6+IxCbIcXaChotrpV0X5q7qtgUUaO69ZFrv9n2\n\t1PqbKs9HdJICiK/l2sfAjl4v6ugi4lC4jP9rBkrhk42TAZSOD7Ia3N5tW2V2LB/lc1xv\n\tx8/+EZm4dqXZ1GE+apn3WpL+5HyWbwqwPC7+/x1nU9oRxiX69yonTzDRE728dvW+wOSz\n\toXWRRr0hjAhkg2tR9yRkK9q9MG+dhlLZ3Xp6y7ihIJb97l+SALm4WHzMXXtw3M4chTLH\n\tqm9uffIESnXrrqIVlt4y6vEqBV236x8LaY8f61OY9ipIAqgML3pklfgHWJ5dGfOufmdO\n\ttpiw==", "X-Gm-Message-State": "AKS2vOziIs6FBXYJupEjOs6z4FCPjvVe44DnC79f99CfBGcbCj0Gn4e3\n\tSoP0qUxJ7+U4HZIF", "X-Received": "by 10.84.169.4 with SMTP id g4mr16546737plb.272.1498720395847;\n\tThu, 29 Jun 2017 00:13:15 -0700 (PDT)", "From": "Oliver O'Halloran <oohall@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 2/4] powerpc/smp: Rework CPU topology construction", "Date": "Thu, 29 Jun 2017 17:12:54 +1000", "Message-Id": "<20170629071256.8159-3-oohall@gmail.com>", "X-Mailer": "git-send-email 2.9.4", "In-Reply-To": "<20170629071256.8159-1-oohall@gmail.com>", "References": "<20170629071256.8159-1-oohall@gmail.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "mikey@neuling.org, Oliver O'Halloran <oohall@gmail.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "The CPU scheduler topology is constructed from a number of per-cpu\ncpumasks which describe which sets of logical CPUs are related in some\nfashion. Current code that handles constructing these masks when CPUs\nare hot(un)plugged can be simplified a bit by exploiting the fact that\nthe scheduler requires higher levels of the toplogy (e.g package level\ngroupings) to be supersets of the lower levels (e.g. threas in a core).\nThis patch reworks the cpumask construction to be simpler and easier to\nextend with extra topology levels.\n\nSigned-off-by: Oliver O'Halloran <oohall@gmail.com>\n---\n arch/powerpc/kernel/smp.c | 148 +++++++++++++++++++++++++---------------------\n 1 file changed, 82 insertions(+), 66 deletions(-)", "diff": "diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c\nindex 40f1f268be83..4c50f5fe5366 100644\n--- a/arch/powerpc/kernel/smp.c\n+++ b/arch/powerpc/kernel/smp.c\n@@ -569,6 +569,24 @@ static void smp_store_cpu_info(int id)\n #endif\n }\n \n+/*\n+ * Relationships between CPUs are maintained in a set of per-cpu cpumasks so\n+ * rather than just passing around the cpumask we pass around a function that\n+ * returns the that cpumask for the given CPU.\n+ */\n+static void set_cpus_related(int i, int j, struct cpumask *(*get_cpumask)(int))\n+{\n+\tcpumask_set_cpu(i, get_cpumask(j));\n+\tcpumask_set_cpu(j, get_cpumask(i));\n+}\n+\n+static void set_cpus_unrelated(int i, int j,\n+\t\tstruct cpumask *(*get_cpumask)(int))\n+{\n+\tcpumask_clear_cpu(i, get_cpumask(j));\n+\tcpumask_clear_cpu(j, get_cpumask(i));\n+}\n+\n void __init smp_prepare_cpus(unsigned int max_cpus)\n {\n \tunsigned int cpu;\n@@ -600,6 +618,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)\n \t\t}\n \t}\n \n+\t/* Init the cpumasks so the boot CPU is related to itself */\n \tcpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));\n \tcpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));\n \n@@ -827,24 +846,6 @@ int cpu_first_thread_of_core(int core)\n }\n EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);\n \n-static void traverse_siblings_chip_id(int cpu, bool add, int chipid)\n-{\n-\tconst struct cpumask *mask = add ? cpu_online_mask : cpu_present_mask;\n-\tint i;\n-\n-\tfor_each_cpu(i, mask) {\n-\t\tif (cpu_to_chip_id(i) == chipid) {\n-\t\t\tif (add) {\n-\t\t\t\tcpumask_set_cpu(cpu, cpu_core_mask(i));\n-\t\t\t\tcpumask_set_cpu(i, cpu_core_mask(cpu));\n-\t\t\t} else {\n-\t\t\t\tcpumask_clear_cpu(cpu, cpu_core_mask(i));\n-\t\t\t\tcpumask_clear_cpu(i, cpu_core_mask(cpu));\n-\t\t\t}\n-\t\t}\n-\t}\n-}\n-\n /* Must be called when no change can occur to cpu_present_mask,\n * i.e. during cpu online or offline.\n */\n@@ -867,46 +868,83 @@ static struct device_node *cpu_to_l2cache(int cpu)\n \treturn cache;\n }\n \n-static void traverse_core_siblings(int cpu, bool add)\n+static bool update_mask_by_l2(int cpu, struct cpumask *(*mask_fn)(int))\n {\n \tstruct device_node *l2_cache, *np;\n-\tconst struct cpumask *mask;\n-\tint chip_id;\n \tint i;\n \n-\t/* threads that share a chip-id are considered siblings */\n-\tchip_id = cpu_to_chip_id(cpu);\n-\n-\tif (chip_id >= 0) {\n-\t\ttraverse_siblings_chip_id(cpu, add, chip_id);\n-\t\treturn;\n-\t}\n-\n \tl2_cache = cpu_to_l2cache(cpu);\n-\tmask = add ? cpu_online_mask : cpu_present_mask;\n-\tfor_each_cpu(i, mask) {\n+\tif (!l2_cache)\n+\t\treturn false;\n+\n+\tfor_each_cpu(i, cpu_online_mask) {\n+\t\t/*\n+\t\t * when updating the marks the current CPU has not been marked\n+\t\t * online, but we need to update the cache masks\n+\t\t */\n \t\tnp = cpu_to_l2cache(i);\n \t\tif (!np)\n \t\t\tcontinue;\n-\t\tif (np == l2_cache) {\n-\t\t\tif (add) {\n-\t\t\t\tcpumask_set_cpu(cpu, cpu_core_mask(i));\n-\t\t\t\tcpumask_set_cpu(i, cpu_core_mask(cpu));\n-\t\t\t} else {\n-\t\t\t\tcpumask_clear_cpu(cpu, cpu_core_mask(i));\n-\t\t\t\tcpumask_clear_cpu(i, cpu_core_mask(cpu));\n-\t\t\t}\n-\t\t}\n+\n+\t\tif (np == l2_cache)\n+\t\t\tset_cpus_related(cpu, i, mask_fn);\n+\n \t\tof_node_put(np);\n \t}\n \tof_node_put(l2_cache);\n+\n+\treturn true;\n+}\n+\n+static void remove_cpu_from_masks(int cpu)\n+{\n+\tint i;\n+\n+\t/* NB: cpu_core_mask is a superset of the others */\n+\tfor_each_cpu(i, cpu_core_mask(cpu)) {\n+\t\tset_cpus_unrelated(cpu, i, cpu_core_mask);\n+\t\tset_cpus_unrelated(cpu, i, cpu_sibling_mask);\n+\t}\n+}\n+\n+static void add_cpu_to_masks(int cpu)\n+{\n+\tint first_thread = cpu_first_thread_sibling(cpu);\n+\tint chipid = cpu_to_chip_id(cpu);\n+\tint i;\n+\n+\t/*\n+\t * This CPU will not be in the online mask yet so we need to manually\n+\t * add it to it's own thread sibling mask.\n+\t */\n+\tcpumask_set_cpu(cpu, cpu_sibling_mask(cpu));\n+\n+\tfor (i = first_thread; i < first_thread + threads_per_core; i++)\n+\t\tif (cpu_online(i))\n+\t\t\tset_cpus_related(i, cpu, cpu_sibling_mask);\n+\n+\t/*\n+\t * Copy the thread sibling into core sibling mask, and\n+\t * add CPUs that share a chip or an L2 to the core sibling\n+\t * mask.\n+\t */\n+\tfor_each_cpu(i, cpu_sibling_mask(cpu))\n+\t\tset_cpus_related(cpu, i, cpu_core_mask);\n+\n+\tif (chipid == -1) {\n+\t\tupdate_mask_by_l2(cpu, cpu_core_mask);\n+\t\treturn;\n+\t}\n+\n+\tfor_each_cpu(i, cpu_online_mask)\n+\t\tif (cpu_to_chip_id(i) == chipid)\n+\t\t\tset_cpus_related(cpu, i, cpu_core_mask);\n }\n \n /* Activate a secondary processor. */\n void start_secondary(void *unused)\n {\n \tunsigned int cpu = smp_processor_id();\n-\tint i, base;\n \n \tmmgrab(&init_mm);\n \tcurrent->active_mm = &init_mm;\n@@ -929,22 +967,8 @@ void start_secondary(void *unused)\n \n \tvdso_getcpu_init();\n #endif\n-\t/* Update sibling maps */\n-\tbase = cpu_first_thread_sibling(cpu);\n-\tfor (i = 0; i < threads_per_core; i++) {\n-\t\tif (cpu_is_offline(base + i) && (cpu != base + i))\n-\t\t\tcontinue;\n-\t\tcpumask_set_cpu(cpu, cpu_sibling_mask(base + i));\n-\t\tcpumask_set_cpu(base + i, cpu_sibling_mask(cpu));\n-\n-\t\t/* cpu_core_map should be a superset of\n-\t\t * cpu_sibling_map even if we don't have cache\n-\t\t * information, so update the former here, too.\n-\t\t */\n-\t\tcpumask_set_cpu(cpu, cpu_core_mask(base + i));\n-\t\tcpumask_set_cpu(base + i, cpu_core_mask(cpu));\n-\t}\n-\ttraverse_core_siblings(cpu, true);\n+\t/* Update topology CPU masks */\n+\tadd_cpu_to_masks(cpu);\n \n \tset_numa_node(numa_cpu_lookup_table[cpu]);\n \tset_numa_mem(local_memory_node(numa_cpu_lookup_table[cpu]));\n@@ -1015,7 +1039,6 @@ void __init smp_cpus_done(unsigned int max_cpus)\n int __cpu_disable(void)\n {\n \tint cpu = smp_processor_id();\n-\tint base, i;\n \tint err;\n \n \tif (!smp_ops->cpu_disable)\n@@ -1026,14 +1049,7 @@ int __cpu_disable(void)\n \t\treturn err;\n \n \t/* Update sibling maps */\n-\tbase = cpu_first_thread_sibling(cpu);\n-\tfor (i = 0; i < threads_per_core && base + i < nr_cpu_ids; i++) {\n-\t\tcpumask_clear_cpu(cpu, cpu_sibling_mask(base + i));\n-\t\tcpumask_clear_cpu(base + i, cpu_sibling_mask(cpu));\n-\t\tcpumask_clear_cpu(cpu, cpu_core_mask(base + i));\n-\t\tcpumask_clear_cpu(base + i, cpu_core_mask(cpu));\n-\t}\n-\ttraverse_core_siblings(cpu, false);\n+\tremove_cpu_from_masks(cpu);\n \n \treturn 0;\n }\n", "prefixes": [ "2/4" ] }