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GET /api/patches/780092/?format=api
{ "id": 780092, "url": "http://patchwork.ozlabs.org/api/patches/780092/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170623082451.32671-5-alice.michael@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170623082451.32671-5-alice.michael@intel.com>", "list_archive_url": null, "date": "2017-06-23T08:24:46", "name": "[next,S74-V2,05/10] i40e: separate hw_features from runtime changing flags", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "2de2069823b500ef3e2e31521ff3a6d8e66d274d", "submitter": { "id": 71123, "url": "http://patchwork.ozlabs.org/api/people/71123/?format=api", "name": "Michael, Alice", "email": "alice.michael@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170623082451.32671-5-alice.michael@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/780092/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/780092/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3wvP650bksz9sNW\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 24 Jun 2017 02:29:01 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 9C26B878FA;\n\tFri, 23 Jun 2017 16:28:59 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id r44_kJbNMVTQ; Fri, 23 Jun 2017 16:28:57 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id B6649879F4;\n\tFri, 23 Jun 2017 16:28:57 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 0F8A01C26F5\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 23 Jun 2017 16:28:56 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 0A40C88DFC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 23 Jun 2017 16:28:56 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Mi4DVb9CxVpq for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 23 Jun 2017 16:28:54 +0000 (UTC)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id 4547488CBB\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 23 Jun 2017 16:28:54 +0000 (UTC)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga105.jf.intel.com with ESMTP; 23 Jun 2017 09:28:54 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.16.121])\n\tby fmsmga001.fm.intel.com with ESMTP; 23 Jun 2017 09:28:53 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos; i=\"5.39,379,1493708400\"; d=\"scan'208\";\n\ta=\"1163958856\"", "From": "Alice Michael <alice.michael@intel.com>", "To": "alice.michael@intel.com,\n\tintel-wired-lan@lists.osuosl.org", "Date": "Fri, 23 Jun 2017 04:24:46 -0400", "Message-Id": "<20170623082451.32671-5-alice.michael@intel.com>", "X-Mailer": "git-send-email 2.9.3", "In-Reply-To": "<20170623082451.32671-1-alice.michael@intel.com>", "References": "<20170623082451.32671-1-alice.michael@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S74-V2 05/10] i40e: separate\n\thw_features from runtime changing flags", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Jacob Keller <jacob.e.keller@intel.com>\n\nThe number of flags found in pf->flags has grown quite large, and there\nare a lot of different types of flags. Most of the flags are simply\nhardware features which are enabled on some firmware or some MAC types.\nOther flags are dynamic run-time flags which enable or disable certain\nfeatures of the driver.\n\nSeparate these two types of flags into pf->hw_features and pf->flags.\nThe hw_features list will contain a set of features which are enabled at\ninit time. This will not contain toggles or otherwise dynamically\nchanging features. These flags should not need atomic protections, as\nthey will be set once during init and then be essentially read only.\n\nEverything else will remain in the flags variable. These flags may be\nmodified at any time during run time. A future patch may wish to convert\nthese flags into set_bit/clear_bit/test_bit or similar approach to\nensure atomic correctness.\n\nThe I40E_FLAG_MFP_ENABLED flag may be a good fit for hw_features but\ncurrently is used by ethtool in the private flags settings, and thus has\nbeen left as part of flags.\n\nAdditionally, I40E_FLAG_DCB_CAPABLE may be a good fit for the\nhw_features but this patch has not tried to untangle it yet.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e.h | 43 +++++++------\n drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 34 +++++-----\n drivers/net/ethernet/intel/i40e/i40e_main.c | 72 +++++++++++-----------\n drivers/net/ethernet/intel/i40e/i40e_ptp.c | 6 +-\n drivers/net/ethernet/intel/i40e/i40e_txrx.h | 2 +-\n drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c | 8 +--\n drivers/net/ethernet/intel/i40evf/i40e_txrx.h | 4 --\n drivers/net/ethernet/intel/i40evf/i40evf.h | 2 -\n drivers/net/ethernet/intel/i40evf/i40evf_main.c | 2 +-\n 9 files changed, 85 insertions(+), 88 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h\nindex d616f69..f07217b 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e.h\n@@ -75,11 +75,11 @@\n #define I40E_MIN_VSI_ALLOC\t\t83 /* LAN, ATR, FCOE, 64 VF */\n /* max 16 qps */\n #define i40e_default_queues_per_vmdq(pf) \\\n-\t\t(((pf)->flags & I40E_FLAG_RSS_AQ_CAPABLE) ? 4 : 1)\n+\t\t(((pf)->hw_features & I40E_HW_RSS_AQ_CAPABLE) ? 4 : 1)\n #define I40E_DEFAULT_QUEUES_PER_VF\t4\n #define I40E_DEFAULT_QUEUES_PER_TC\t1 /* should be a power of 2 */\n #define i40e_pf_get_max_q_per_tc(pf) \\\n-\t\t(((pf)->flags & I40E_FLAG_128_QP_RSS_CAPABLE) ? 128 : 64)\n+\t\t(((pf)->hw_features & I40E_HW_128_QP_RSS_CAPABLE) ? 128 : 64)\n #define I40E_FDIR_RING\t\t\t0\n #define I40E_FDIR_RING_COUNT\t\t32\n #define I40E_MAX_AQ_BUF_SIZE\t\t4096\n@@ -401,6 +401,27 @@ struct i40e_pf {\n \tstruct timer_list service_timer;\n \tstruct work_struct service_task;\n \n+\tu64 hw_features;\n+#define I40E_HW_RSS_AQ_CAPABLE\t\t\tBIT_ULL(0)\n+#define I40E_HW_128_QP_RSS_CAPABLE\t\tBIT_ULL(1)\n+#define I40E_HW_ATR_EVICT_CAPABLE\t\tBIT_ULL(2)\n+#define I40E_HW_WB_ON_ITR_CAPABLE\t\tBIT_ULL(3)\n+#define I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE\tBIT_ULL(4)\n+#define I40E_HW_NO_PCI_LINK_CHECK\t\tBIT_ULL(5)\n+#define I40E_HW_100M_SGMII_CAPABLE\t\tBIT_ULL(6)\n+#define I40E_HW_NO_DCB_SUPPORT\t\t\tBIT_ULL(7)\n+#define I40E_HW_USE_SET_LLDP_MIB\t\tBIT_ULL(8)\n+#define I40E_HW_GENEVE_OFFLOAD_CAPABLE\t\tBIT_ULL(9)\n+#define I40E_HW_PTP_L4_CAPABLE\t\t\tBIT_ULL(10)\n+#define I40E_HW_WOL_MC_MAGIC_PKT_WAKE\t\tBIT_ULL(11)\n+#define I40E_HW_MPLS_HDR_OFFLOAD_CAPABLE\tBIT_ULL(12)\n+#define I40E_HW_HAVE_CRT_RETIMER\t\tBIT_ULL(13)\n+#define I40E_HW_OUTER_UDP_CSUM_CAPABLE\t\tBIT_ULL(14)\n+#define I40E_HW_PHY_CONTROLS_LEDS\t\tBIT_ULL(15)\n+#define I40E_HW_STOP_FW_LLDP\t\t\tBIT_ULL(16)\n+#define I40E_HW_PORT_ID_VALID\t\t\tBIT_ULL(17)\n+#define I40E_HW_RESTART_AUTONEG\t\t\tBIT_ULL(18)\n+\n \tu64 flags;\n #define I40E_FLAG_RX_CSUM_ENABLED\t\tBIT_ULL(1)\n #define I40E_FLAG_MSI_ENABLED\t\t\tBIT_ULL(2)\n@@ -420,33 +441,15 @@ struct i40e_pf {\n #define I40E_FLAG_PTP\t\t\t\tBIT_ULL(25)\n #define I40E_FLAG_MFP_ENABLED\t\t\tBIT_ULL(26)\n #define I40E_FLAG_UDP_FILTER_SYNC\t\tBIT_ULL(27)\n-#define I40E_FLAG_PORT_ID_VALID\t\t\tBIT_ULL(28)\n #define I40E_FLAG_DCB_CAPABLE\t\t\tBIT_ULL(29)\n-#define I40E_FLAG_RSS_AQ_CAPABLE\t\tBIT_ULL(31)\n-#define I40E_FLAG_HW_ATR_EVICT_CAPABLE\t\tBIT_ULL(32)\n-#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE\tBIT_ULL(33)\n-#define I40E_FLAG_128_QP_RSS_CAPABLE\t\tBIT_ULL(34)\n-#define I40E_FLAG_WB_ON_ITR_CAPABLE\t\tBIT_ULL(35)\n #define I40E_FLAG_VEB_STATS_ENABLED\t\tBIT_ULL(37)\n-#define I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE\tBIT_ULL(38)\n #define I40E_FLAG_LINK_POLLING_ENABLED\t\tBIT_ULL(39)\n #define I40E_FLAG_VEB_MODE_ENABLED\t\tBIT_ULL(40)\n-#define I40E_FLAG_GENEVE_OFFLOAD_CAPABLE\tBIT_ULL(41)\n-#define I40E_FLAG_NO_PCI_LINK_CHECK\t\tBIT_ULL(42)\n-#define I40E_FLAG_100M_SGMII_CAPABLE\t\tBIT_ULL(43)\n-#define I40E_FLAG_RESTART_AUTONEG\t\tBIT_ULL(44)\n-#define I40E_FLAG_NO_DCB_SUPPORT\t\tBIT_ULL(45)\n-#define I40E_FLAG_USE_SET_LLDP_MIB\t\tBIT_ULL(46)\n-#define I40E_FLAG_STOP_FW_LLDP\t\t\tBIT_ULL(47)\n-#define I40E_FLAG_PHY_CONTROLS_LEDS\t\tBIT_ULL(48)\n #define I40E_FLAG_PF_MAC\t\t\tBIT_ULL(50)\n #define I40E_FLAG_TRUE_PROMISC_SUPPORT\t\tBIT_ULL(51)\n-#define I40E_FLAG_HAVE_CRT_RETIMER\t\tBIT_ULL(52)\n-#define I40E_FLAG_PTP_L4_CAPABLE\t\tBIT_ULL(53)\n #define I40E_FLAG_CLIENT_RESET\t\t\tBIT_ULL(54)\n #define I40E_FLAG_TEMP_LINK_POLLING\t\tBIT_ULL(55)\n #define I40E_FLAG_CLIENT_L2_CHANGE\t\tBIT_ULL(56)\n-#define I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE\t\tBIT_ULL(57)\n #define I40E_FLAG_LEGACY_RX\t\t\tBIT_ULL(58)\n \n \tstruct i40e_client_instance *cinst;\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\nindex 1d29152..c76549e 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n@@ -271,7 +271,7 @@ static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported,\n \t\t*advertising |= ADVERTISED_Autoneg;\n \t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)\n \t\t\t*advertising |= ADVERTISED_1000baseT_Full;\n-\t\tif (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) {\n+\t\tif (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {\n \t\t\t*supported |= SUPPORTED_100baseT_Full;\n \t\t\t*advertising |= ADVERTISED_100baseT_Full;\n \t\t}\n@@ -340,12 +340,12 @@ static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported,\n \t\t\t*advertising |= ADVERTISED_20000baseKR2_Full;\n \t}\n \tif (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) {\n-\t\tif (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))\n+\t\tif (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))\n \t\t\t*supported |= SUPPORTED_10000baseKR_Full |\n \t\t\t\t SUPPORTED_Autoneg;\n \t\t*advertising |= ADVERTISED_Autoneg;\n \t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)\n-\t\t\tif (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))\n+\t\t\tif (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))\n \t\t\t\t*advertising |= ADVERTISED_10000baseKR_Full;\n \t}\n \tif (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {\n@@ -356,12 +356,12 @@ static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported,\n \t\t\t*advertising |= ADVERTISED_10000baseKX4_Full;\n \t}\n \tif (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) {\n-\t\tif (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))\n+\t\tif (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))\n \t\t\t*supported |= SUPPORTED_1000baseKX_Full |\n \t\t\t\t SUPPORTED_Autoneg;\n \t\t*advertising |= ADVERTISED_Autoneg;\n \t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)\n-\t\t\tif (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))\n+\t\t\tif (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))\n \t\t\t\t*advertising |= ADVERTISED_1000baseKX_Full;\n \t}\n \tif (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||\n@@ -474,7 +474,7 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,\n \t\t\t SUPPORTED_1000baseT_Full;\n \t\tif (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)\n \t\t\tadvertising |= ADVERTISED_1000baseT_Full;\n-\t\tif (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) {\n+\t\tif (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {\n \t\t\tsupported |= SUPPORTED_100baseT_Full;\n \t\t\tif (hw_link_info->requested_speeds &\n \t\t\t I40E_LINK_SPEED_100MB)\n@@ -1765,7 +1765,7 @@ static int i40e_get_ts_info(struct net_device *dev,\n \t\t\t BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |\n \t\t\t BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);\n \n-\tif (pf->flags & I40E_FLAG_PTP_L4_CAPABLE)\n+\tif (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)\n \t\tinfo->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |\n \t\t\t\t BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |\n \t\t\t\t BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |\n@@ -2005,7 +2005,7 @@ static int i40e_set_phys_id(struct net_device *netdev,\n \n \tswitch (state) {\n \tcase ETHTOOL_ID_ACTIVE:\n-\t\tif (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) {\n+\t\tif (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {\n \t\t\tpf->led_status = i40e_led_get(hw);\n \t\t} else {\n \t\t\ti40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL);\n@@ -2015,19 +2015,19 @@ static int i40e_set_phys_id(struct net_device *netdev,\n \t\t}\n \t\treturn blink_freq;\n \tcase ETHTOOL_ID_ON:\n-\t\tif (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS))\n+\t\tif (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))\n \t\t\ti40e_led_set(hw, 0xf, false);\n \t\telse\n \t\t\tret = i40e_led_set_phy(hw, true, pf->led_status, 0);\n \t\tbreak;\n \tcase ETHTOOL_ID_OFF:\n-\t\tif (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS))\n+\t\tif (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))\n \t\t\ti40e_led_set(hw, 0x0, false);\n \t\telse\n \t\t\tret = i40e_led_set_phy(hw, false, pf->led_status, 0);\n \t\tbreak;\n \tcase ETHTOOL_ID_INACTIVE:\n-\t\tif (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) {\n+\t\tif (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {\n \t\t\ti40e_led_set(hw, pf->led_status, false);\n \t\t} else {\n \t\t\tret = i40e_led_set_phy(hw, false, pf->led_status,\n@@ -2727,22 +2727,22 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)\n \tswitch (nfc->flow_type) {\n \tcase TCP_V4_FLOW:\n \t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;\n-\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\tif (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n \t\t\thena |=\n \t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);\n \t\tbreak;\n \tcase TCP_V6_FLOW:\n \t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;\n-\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\tif (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n \t\t\thena |=\n \t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);\n-\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\tif (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n \t\t\thena |=\n \t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);\n \t\tbreak;\n \tcase UDP_V4_FLOW:\n \t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;\n-\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\tif (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n \t\t\thena |=\n \t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |\n \t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);\n@@ -2751,7 +2751,7 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)\n \t\tbreak;\n \tcase UDP_V6_FLOW:\n \t\tflow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;\n-\t\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n+\t\tif (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)\n \t\t\thena |=\n \t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |\n \t\t\t BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);\n@@ -4122,7 +4122,7 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags)\n \t}\n \n \t/* Only allow ATR evict on hardware that is capable of handling it */\n-\tif (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE)\n+\tif (!(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))\n \t\tpf->flags &= ~I40E_FLAG_HW_ATR_EVICT_ENABLED;\n \n \tif (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex 798564c..1acb9fc 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -5351,7 +5351,7 @@ static int i40e_init_pf_dcb(struct i40e_pf *pf)\n \tint err = 0;\n \n \t/* Do not enable DCB for SW1 and SW2 images even if the FW is capable */\n-\tif (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)\n+\tif (pf->hw_features & I40E_HW_NO_DCB_SUPPORT)\n \t\tgoto out;\n \n \t/* Get the initial DCB configuration */\n@@ -7332,7 +7332,7 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)\n \t\twr32(hw, I40E_REG_MSS, val);\n \t}\n \n-\tif (pf->flags & I40E_FLAG_RESTART_AUTONEG) {\n+\tif (pf->hw_features & I40E_HW_RESTART_AUTONEG) {\n \t\tmsleep(75);\n \t\tret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);\n \t\tif (ret)\n@@ -7970,7 +7970,7 @@ static int i40e_alloc_rings(struct i40e_vsi *vsi)\n \t\tring->count = vsi->num_desc;\n \t\tring->size = 0;\n \t\tring->dcb_tc = 0;\n-\t\tif (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)\n+\t\tif (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)\n \t\t\tring->flags = I40E_TXR_FLAGS_WB_ON_ITR;\n \t\tring->tx_itr_setting = pf->tx_itr_default;\n \t\tvsi->tx_rings[i] = ring++;\n@@ -7987,7 +7987,7 @@ static int i40e_alloc_rings(struct i40e_vsi *vsi)\n \t\tring->count = vsi->num_desc;\n \t\tring->size = 0;\n \t\tring->dcb_tc = 0;\n-\t\tif (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)\n+\t\tif (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)\n \t\t\tring->flags = I40E_TXR_FLAGS_WB_ON_ITR;\n \t\tset_ring_xdp(ring);\n \t\tring->tx_itr_setting = pf->tx_itr_default;\n@@ -8523,7 +8523,7 @@ static int i40e_vsi_config_rss(struct i40e_vsi *vsi)\n \tu8 *lut;\n \tint ret;\n \n-\tif (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))\n+\tif (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))\n \t\treturn 0;\n \n \tif (!vsi->rss_size)\n@@ -8653,7 +8653,7 @@ int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)\n {\n \tstruct i40e_pf *pf = vsi->back;\n \n-\tif (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)\n+\tif (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)\n \t\treturn i40e_config_rss_aq(vsi, seed, lut, lut_size);\n \telse\n \t\treturn i40e_config_rss_reg(vsi, seed, lut, lut_size);\n@@ -8672,7 +8672,7 @@ int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)\n {\n \tstruct i40e_pf *pf = vsi->back;\n \n-\tif (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)\n+\tif (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)\n \t\treturn i40e_get_rss_aq(vsi, seed, lut, lut_size);\n \telse\n \t\treturn i40e_get_rss_reg(vsi, seed, lut, lut_size);\n@@ -9001,47 +9001,47 @@ static int i40e_sw_init(struct i40e_pf *pf)\n \t}\n \n \tif (pf->hw.mac.type == I40E_MAC_X722) {\n-\t\tpf->flags |= I40E_FLAG_RSS_AQ_CAPABLE\n-\t\t\t | I40E_FLAG_128_QP_RSS_CAPABLE\n-\t\t\t | I40E_FLAG_HW_ATR_EVICT_CAPABLE\n-\t\t\t | I40E_FLAG_OUTER_UDP_CSUM_CAPABLE\n-\t\t\t | I40E_FLAG_WB_ON_ITR_CAPABLE\n-\t\t\t | I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE\n-\t\t\t | I40E_FLAG_NO_PCI_LINK_CHECK\n-\t\t\t | I40E_FLAG_USE_SET_LLDP_MIB\n-\t\t\t | I40E_FLAG_GENEVE_OFFLOAD_CAPABLE\n-\t\t\t | I40E_FLAG_PTP_L4_CAPABLE\n-\t\t\t | I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE;\n+\t\tpf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |\n+\t\t\t\t I40E_HW_128_QP_RSS_CAPABLE |\n+\t\t\t\t I40E_HW_ATR_EVICT_CAPABLE |\n+\t\t\t\t I40E_HW_WB_ON_ITR_CAPABLE |\n+\t\t\t\t I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |\n+\t\t\t\t I40E_HW_NO_PCI_LINK_CHECK |\n+\t\t\t\t I40E_HW_USE_SET_LLDP_MIB |\n+\t\t\t\t I40E_HW_GENEVE_OFFLOAD_CAPABLE |\n+\t\t\t\t I40E_HW_PTP_L4_CAPABLE |\n+\t\t\t\t I40E_HW_WOL_MC_MAGIC_PKT_WAKE |\n+\t\t\t\t I40E_HW_OUTER_UDP_CSUM_CAPABLE);\n \t} else if ((pf->hw.aq.api_maj_ver > 1) ||\n \t\t ((pf->hw.aq.api_maj_ver == 1) &&\n \t\t (pf->hw.aq.api_min_ver > 4))) {\n \t\t/* Supported in FW API version higher than 1.4 */\n-\t\tpf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;\n+\t\tpf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;\n \t}\n \n \t/* Enable HW ATR eviction if possible */\n-\tif (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE)\n+\tif (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)\n \t\tpf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;\n \n \tif ((pf->hw.mac.type == I40E_MAC_XL710) &&\n \t (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||\n \t (pf->hw.aq.fw_maj_ver < 4))) {\n-\t\tpf->flags |= I40E_FLAG_RESTART_AUTONEG;\n+\t\tpf->hw_features |= I40E_HW_RESTART_AUTONEG;\n \t\t/* No DCB support for FW < v4.33 */\n-\t\tpf->flags |= I40E_FLAG_NO_DCB_SUPPORT;\n+\t\tpf->hw_features |= I40E_HW_NO_DCB_SUPPORT;\n \t}\n \n \t/* Disable FW LLDP if FW < v4.3 */\n \tif ((pf->hw.mac.type == I40E_MAC_XL710) &&\n \t (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||\n \t (pf->hw.aq.fw_maj_ver < 4)))\n-\t\tpf->flags |= I40E_FLAG_STOP_FW_LLDP;\n+\t\tpf->hw_features |= I40E_HW_STOP_FW_LLDP;\n \n \t/* Use the FW Set LLDP MIB API if FW > v4.40 */\n \tif ((pf->hw.mac.type == I40E_MAC_XL710) &&\n \t (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||\n \t (pf->hw.aq.fw_maj_ver >= 5)))\n-\t\tpf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;\n+\t\tpf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;\n \n \tif (pf->hw.func_caps.vmdq) {\n \t\tpf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;\n@@ -9244,7 +9244,7 @@ static void i40e_udp_tunnel_add(struct net_device *netdev,\n \t\tpf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;\n \t\tbreak;\n \tcase UDP_TUNNEL_TYPE_GENEVE:\n-\t\tif (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))\n+\t\tif (!(pf->hw_features & I40E_HW_GENEVE_OFFLOAD_CAPABLE))\n \t\t\treturn;\n \t\tpf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;\n \t\tbreak;\n@@ -9311,7 +9311,7 @@ static int i40e_get_phys_port_id(struct net_device *netdev,\n \tstruct i40e_pf *pf = np->vsi->back;\n \tstruct i40e_hw *hw = &pf->hw;\n \n-\tif (!(pf->flags & I40E_FLAG_PORT_ID_VALID))\n+\tif (!(pf->hw_features & I40E_HW_PORT_ID_VALID))\n \t\treturn -EOPNOTSUPP;\n \n \tppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));\n@@ -9688,7 +9688,7 @@ static int i40e_config_netdev(struct i40e_vsi *vsi)\n \t\t\t NETIF_F_RXCSUM\t\t|\n \t\t\t 0;\n \n-\tif (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))\n+\tif (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))\n \t\tnetdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;\n \n \tnetdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;\n@@ -10446,7 +10446,7 @@ struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,\n \t\tbreak;\n \t}\n \n-\tif ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&\n+\tif ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&\n \t (vsi->type == I40E_VSI_VMDQ2)) {\n \t\tret = i40e_vsi_config_rss(vsi);\n \t}\n@@ -11455,7 +11455,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t * Ignore error return codes because if it was already disabled via\n \t * hardware settings this will fail\n \t */\n-\tif (pf->flags & I40E_FLAG_STOP_FW_LLDP) {\n+\tif (pf->hw_features & I40E_HW_STOP_FW_LLDP) {\n \t\tdev_info(&pdev->dev, \"Stopping firmware LLDP agent.\\n\");\n \t\ti40e_aq_stop_lldp(hw, true, NULL);\n \t}\n@@ -11472,7 +11472,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \tether_addr_copy(hw->mac.perm_addr, hw->mac.addr);\n \ti40e_get_port_mac_addr(hw, hw->mac.port_addr);\n \tif (is_valid_ether_addr(hw->mac.port_addr))\n-\t\tpf->flags |= I40E_FLAG_PORT_ID_VALID;\n+\t\tpf->hw_features |= I40E_HW_PORT_ID_VALID;\n \n \tpci_set_drvdata(pdev, pf);\n \tpci_save_state(pdev);\n@@ -11588,7 +11588,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t\twr32(hw, I40E_REG_MSS, val);\n \t}\n \n-\tif (pf->flags & I40E_FLAG_RESTART_AUTONEG) {\n+\tif (pf->hw_features & I40E_HW_RESTART_AUTONEG) {\n \t\tmsleep(75);\n \t\terr = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);\n \t\tif (err)\n@@ -11675,7 +11675,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t * and will report PCI Gen 1 x 1 by default so don't bother\n \t * checking them.\n \t */\n-\tif (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {\n+\tif (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {\n \t\tchar speed[PCI_SPEED_SIZE] = \"Unknown\";\n \t\tchar width[PCI_WIDTH_SIZE] = \"Unknown\";\n \n@@ -11746,9 +11746,9 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \n \tif ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||\n \t\t(pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))\n-\t\tpf->flags |= I40E_FLAG_PHY_CONTROLS_LEDS;\n+\t\tpf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;\n \tif (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)\n-\t\tpf->flags |= I40E_FLAG_HAVE_CRT_RETIMER;\n+\t\tpf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;\n \t/* print a string summarizing features */\n \ti40e_print_features(pf);\n \n@@ -12060,7 +12060,7 @@ static void i40e_shutdown(struct pci_dev *pdev)\n \t */\n \ti40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);\n \n-\tif (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))\n+\tif (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))\n \t\ti40e_enable_mc_magic_wake(pf);\n \n \ti40e_prep_for_reset(pf, false);\n@@ -12092,7 +12092,7 @@ static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)\n \tset_bit(__I40E_SUSPENDED, pf->state);\n \tset_bit(__I40E_DOWN, pf->state);\n \n-\tif (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))\n+\tif (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))\n \t\ti40e_enable_mc_magic_wake(pf);\n \n \ti40e_prep_for_reset(pf, false);\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c\nindex 0129ed3..d8456c3 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c\n@@ -569,7 +569,7 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,\n \tcase HWTSTAMP_FILTER_PTP_V1_L4_SYNC:\n \tcase HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:\n \tcase HWTSTAMP_FILTER_PTP_V1_L4_EVENT:\n-\t\tif (!(pf->flags & I40E_FLAG_PTP_L4_CAPABLE))\n+\t\tif (!(pf->hw_features & I40E_HW_PTP_L4_CAPABLE))\n \t\t\treturn -ERANGE;\n \t\tpf->ptp_rx = true;\n \t\ttsyntype = I40E_PRTTSYN_CTL1_V1MESSTYPE0_MASK |\n@@ -583,7 +583,7 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,\n \tcase HWTSTAMP_FILTER_PTP_V2_L4_SYNC:\n \tcase HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:\n \tcase HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:\n-\t\tif (!(pf->flags & I40E_FLAG_PTP_L4_CAPABLE))\n+\t\tif (!(pf->hw_features & I40E_HW_PTP_L4_CAPABLE))\n \t\t\treturn -ERANGE;\n \t\t/* fall through */\n \tcase HWTSTAMP_FILTER_PTP_V2_L2_EVENT:\n@@ -592,7 +592,7 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,\n \t\tpf->ptp_rx = true;\n \t\ttsyntype = I40E_PRTTSYN_CTL1_V2MESSTYPE0_MASK |\n \t\t\t I40E_PRTTSYN_CTL1_TSYNTYPE_V2;\n-\t\tif (pf->flags & I40E_FLAG_PTP_L4_CAPABLE) {\n+\t\tif (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) {\n \t\t\ttsyntype |= I40E_PRTTSYN_CTL1_UDP_ENA_MASK;\n \t\t\tconfig->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;\n \t\t} else {\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h\nindex a39892d..f0a0eab 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h\n@@ -112,7 +112,7 @@ enum i40e_dyn_idx_t {\n \tBIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))\n \n #define i40e_pf_get_default_rss_hena(pf) \\\n-\t(((pf)->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) ? \\\n+\t(((pf)->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) ? \\\n \t I40E_DEFAULT_RSS_HENA_EXPANDED : I40E_DEFAULT_RSS_HENA)\n \n /* Supported Rx Buffer Sizes (a multiple of 128) */\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c\nindex 2e261bb..c47215f 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c\n@@ -1542,14 +1542,14 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)\n \tif (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {\n \t\tvfres->vf_offload_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;\n \t} else {\n-\t\tif ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&\n+\t\tif ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&\n \t\t (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))\n \t\t\tvfres->vf_offload_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;\n \t\telse\n \t\t\tvfres->vf_offload_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;\n \t}\n \n-\tif (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {\n+\tif (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {\n \t\tif (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)\n \t\t\tvfres->vf_offload_flags |=\n \t\t\t\tVIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;\n@@ -1558,7 +1558,7 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)\n \tif (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)\n \t\tvfres->vf_offload_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;\n \n-\tif ((pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE) &&\n+\tif ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&\n \t (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))\n \t\tvfres->vf_offload_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;\n \n@@ -1573,7 +1573,7 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)\n \t\tvfres->vf_offload_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;\n \t}\n \n-\tif (pf->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) {\n+\tif (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {\n \t\tif (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)\n \t\t\tvfres->vf_offload_flags |=\n \t\t\t\t\tVIRTCHNL_VF_OFFLOAD_WB_ON_ITR;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.h b/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\nindex 472f606..4896840 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\n@@ -98,10 +98,6 @@ enum i40e_dyn_idx_t {\n \tBIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \\\n \tBIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))\n \n-#define i40e_pf_get_default_rss_hena(pf) \\\n-\t(((pf)->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) ? \\\n-\t I40E_DEFAULT_RSS_HENA_EXPANDED : I40E_DEFAULT_RSS_HENA)\n-\n /* Supported Rx Buffer Sizes (a multiple of 128) */\n #define I40E_RXBUFFER_256 256\n #define I40E_RXBUFFER_1536 1536 /* 128B aligned standard Ethernet frame */\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40evf.h b/drivers/net/ethernet/intel/i40evf/i40evf.h\nindex 52cf38f..7f90536 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40evf.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40evf.h\n@@ -238,8 +238,6 @@ struct i40evf_adapter {\n /* duplicates for common code */\n #define I40E_FLAG_DCB_ENABLED\t\t\t0\n #define I40E_FLAG_RX_CSUM_ENABLED\t\tI40EVF_FLAG_RX_CSUM_ENABLED\n-#define I40E_FLAG_WB_ON_ITR_CAPABLE\t\tI40EVF_FLAG_WB_ON_ITR_CAPABLE\n-#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE\tI40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE\n #define I40E_FLAG_LEGACY_RX\t\t\tI40EVF_FLAG_LEGACY_RX\n \t/* flags for admin queue service task */\n \tu32 aq_required;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40evf_main.c b/drivers/net/ethernet/intel/i40evf/i40evf_main.c\nindex b4566c6..58be106 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40evf_main.c\n+++ b/drivers/net/ethernet/intel/i40evf/i40evf_main.c\n@@ -1242,7 +1242,7 @@ static int i40evf_alloc_queues(struct i40evf_adapter *adapter)\n \t\ttx_ring->dev = &adapter->pdev->dev;\n \t\ttx_ring->count = adapter->tx_desc_count;\n \t\ttx_ring->tx_itr_setting = (I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF);\n-\t\tif (adapter->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)\n+\t\tif (adapter->flags & I40EVF_FLAG_WB_ON_ITR_CAPABLE)\n \t\t\ttx_ring->flags |= I40E_TXR_FLAGS_WB_ON_ITR;\n \n \t\trx_ring = &adapter->rx_rings[i];\n", "prefixes": [ "next", "S74-V2", "05/10" ] }