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GET /api/patches/779719/?format=api
{ "id": 779719, "url": "http://patchwork.ozlabs.org/api/patches/779719/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1498145734-7358-1-git-send-email-paul.greenwalt@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1498145734-7358-1-git-send-email-paul.greenwalt@intel.com>", "list_archive_url": null, "date": "2017-06-22T15:35:34", "name": "ixgbe: Add DMA Coalescing support", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "98a7a00ca0832aa80062d907dc2309f5e3da1816", "submitter": { "id": 71166, "url": "http://patchwork.ozlabs.org/api/people/71166/?format=api", "name": "Paul Greenwalt", "email": "paul.greenwalt@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1498145734-7358-1-git-send-email-paul.greenwalt@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/779719/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/779719/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3wtxXB6v83z9s82\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 23 Jun 2017 08:46:33 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id EA1F426665;\n\tThu, 22 Jun 2017 22:46:31 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 8MBWMguAv5BS; Thu, 22 Jun 2017 22:46:30 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 2804B2312C;\n\tThu, 22 Jun 2017 22:46:30 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id CF2421C0FD1\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 22 Jun 2017 22:46:28 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id C6B2084E95\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 22 Jun 2017 22:46:28 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id GHOFUsX4xJVS for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 22 Jun 2017 22:46:27 +0000 (UTC)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id 1477784DBB\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 22 Jun 2017 22:46:27 +0000 (UTC)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga105.fm.intel.com with ESMTP; 22 Jun 2017 15:46:26 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.152.55])\n\tby orsmga003.jf.intel.com with ESMTP; 22 Jun 2017 15:46:20 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.39,374,1493708400\"; d=\"scan'208\";a=\"984166763\"", "From": "Paul Greenwalt <paul.greenwalt@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 22 Jun 2017 11:35:34 -0400", "Message-Id": "<1498145734-7358-1-git-send-email-paul.greenwalt@intel.com>", "X-Mailer": "git-send-email 2.7.4", "Subject": "[Intel-wired-lan] [PATCH] ixgbe: Add DMA Coalescing support", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Add DMA Coalescing (DMAC) support for X550, X550em_a, and X550em_x devices.\nDMAC can reduce total power consumption by allowing the chipset and/or CPU\nto spend more time in low-power states. DMAC is disabled by default, and\ncan be enabled/disabled by the ethtool coalesce dmac parameter. The dmac\nparameter configures the watchdog timer interval in usecs. Setting dmac\nto 0 disables DMAC, and support values range is 41 - 100000 usecs.\n\nSigned-off-by: Paul Greenwalt <paul.greenwalt@intel.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe.h | 10 +++\n drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 24 +++++-\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 23 +++++\n drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 37 +++++++-\n drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 102 +++++++++++++++++++++++\n include/uapi/linux/ethtool.h | 2 +\n 6 files changed, 196 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\nindex 2e9df66..05e3b28 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n@@ -507,6 +507,11 @@ struct hwmon_buff {\n #define IXGBE_20K_ITR\t\t200\n #define IXGBE_12K_ITR\t\t336\n \n+/* DMA coalecing watchdog timer interval in usecs */\n+#define IXGBE_DMACWT_DISABLE\t0\n+#define IXGBE_DMACWT_MIN\t41\n+#define IXGBE_DMACWT_MAX\t10000\n+\n /* ixgbe_test_staterr - tests bits in Rx descriptor status and error fields */\n static inline __le32 ixgbe_test_staterr(union ixgbe_adv_rx_desc *rx_desc,\n \t\t\t\t\tconst u32 stat_err_bits)\n@@ -942,6 +947,11 @@ int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type);\n int ixgbe_fcoe_get_hbainfo(struct net_device *netdev,\n \t\t\t struct netdev_fcoe_hbainfo *info);\n u8 ixgbe_fcoe_get_tc(struct ixgbe_adapter *adapter);\n+#else\n+static inline u8 ixgbe_fcoe_get_tc(struct ixgbe_adapter *adapter)\n+{\n+\treturn 0;\n+}\n #endif /* IXGBE_FCOE */\n #ifdef CONFIG_DEBUG_FS\n void ixgbe_dbg_adapter_init(struct ixgbe_adapter *adapter);\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c\nindex e10a4d6..18f5576 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c\n@@ -2289,6 +2289,8 @@ static int ixgbe_get_coalesce(struct net_device *netdev,\n {\n \tstruct ixgbe_adapter *adapter = netdev_priv(netdev);\n \n+\tec->dmac = adapter->hw.mac.dmac_config.watchdog_timer;\n+\n \t/* only valid if in constant ITR mode */\n \tif (adapter->rx_itr_setting <= 1)\n \t\tec->rx_coalesce_usecs = adapter->rx_itr_setting;\n@@ -2342,10 +2344,12 @@ static int ixgbe_set_coalesce(struct net_device *netdev,\n \t\t\t struct ethtool_coalesce *ec)\n {\n \tstruct ixgbe_adapter *adapter = netdev_priv(netdev);\n+\tstruct ixgbe_hw *hw = &adapter->hw;\n \tstruct ixgbe_q_vector *q_vector;\n-\tint i;\n \tu16 tx_itr_param, rx_itr_param, tx_itr_prev;\n \tbool need_reset = false;\n+\tu16 dmac_prev;\n+\tint i;\n \n \tif (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) {\n \t\t/* reject Tx specific changes in case of mixed RxTx vectors */\n@@ -2396,6 +2400,24 @@ static int ixgbe_set_coalesce(struct net_device *netdev,\n \t\t\tneed_reset = true;\n \t}\n \n+\tif (ec->dmac != IXGBE_DMACWT_DISABLE &&\n+\t (ec->dmac < IXGBE_DMACWT_MIN || ec->dmac > IXGBE_DMACWT_MAX))\n+\t\treturn -EINVAL;\n+\n+\tif (hw->mac.ops.dmac_config) {\n+\t\tdmac_prev = hw->mac.dmac_config.watchdog_timer;\n+\t\thw->mac.dmac_config.watchdog_timer = ec->dmac;\n+\n+\t\t/* Disable DMAC if interrupt throttling is disabled */\n+\t\tif (hw->mac.dmac_config.watchdog_timer &&\n+\t\t (!adapter->rx_itr_setting && !adapter->tx_itr_setting)) {\n+\t\t\thw->mac.dmac_config.watchdog_timer = 0;\n+\t\t\thw->mac.ops.dmac_config(&adapter->hw);\n+\t\t} else if (hw->mac.dmac_config.watchdog_timer != dmac_prev) {\n+\t\t\thw->mac.ops.dmac_config(&adapter->hw);\n+\t\t}\n+\t}\n+\n \t/* check the old value and enable RSC if necessary */\n \tneed_reset |= ixgbe_update_rsc(adapter);\n \ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex 706995f..2df8000 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -5656,6 +5656,12 @@ void ixgbe_reset(struct ixgbe_adapter *adapter)\n \tif (hw->mac.san_mac_rar_index)\n \t\thw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));\n \n+\t/* Clear saved DMA coalescing values except for watchdog_timer */\n+\thw->mac.dmac_config.fcoe_en = false;\n+\thw->mac.dmac_config.link_speed = 0;\n+\thw->mac.dmac_config.fcoe_tc = 0;\n+\thw->mac.dmac_config.num_tcs = 0;\n+\n \tif (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))\n \t\tixgbe_ptp_reset(adapter);\n \n@@ -7107,6 +7113,23 @@ static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)\n \n \tadapter->link_up = link_up;\n \tadapter->link_speed = link_speed;\n+\n+\tif (hw->mac.ops.dmac_config && hw->mac.dmac_config.watchdog_timer) {\n+\t\tu8 num_tcs = netdev_get_num_tc(adapter->netdev);\n+\t\tu8 fcoe_tc = ixgbe_fcoe_get_tc(adapter);\n+\t\tbool fcoe_en = !!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED);\n+\n+\t\tif (hw->mac.dmac_config.link_speed != link_speed ||\n+\t\t hw->mac.dmac_config.fcoe_tc != fcoe_tc ||\n+\t\t hw->mac.dmac_config.fcoe_en != fcoe_en ||\n+\t\t hw->mac.dmac_config.num_tcs != num_tcs) {\n+\t\t\thw->mac.dmac_config.link_speed = link_speed;\n+\t\t\thw->mac.dmac_config.num_tcs = num_tcs;\n+\t\t\thw->mac.dmac_config.fcoe_en = fcoe_en;\n+\t\t\thw->mac.dmac_config.fcoe_tc = fcoe_tc;\n+\t\t\thw->mac.ops.dmac_config(hw);\n+\t\t}\n+\t}\n }\n \n static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\nindex 4808978..f094865 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n@@ -326,6 +326,7 @@ struct ixgbe_thermal_sensor_data {\n #define IXGBE_RXCTRL 0x03000\n #define IXGBE_DROPEN 0x03D04\n #define IXGBE_RXPBSIZE_SHIFT 10\n+#define IXGBE_RXPBSIZE_MASK\t0x000FFC00\n \n /* Receive Registers */\n #define IXGBE_RXCSUM 0x05000\n@@ -573,6 +574,40 @@ struct ixgbe_thermal_sensor_data {\n #define IXGBE_TDPT2TCCR(_i) (0x0CD20 + ((_i) * 4)) /* 8 of these (0-7) */\n #define IXGBE_TDPT2TCSR(_i) (0x0CD40 + ((_i) * 4)) /* 8 of these (0-7) */\n \n+/* DMA Coalescing configuration */\n+struct ixgbe_dmac_config {\n+\tu16\twatchdog_timer; /* usec units */\n+\tbool\tfcoe_en;\n+\tu32\tlink_speed;\n+\tu8\tfcoe_tc;\n+\tu8\tnum_tcs;\n+};\n+\n+/* DMA Coalescing threshold Rx PB TC[n] value in Kilobyte by link speed.\n+ * DMACRXT = 10Gbps = 10,000 bits / usec = 1250 bytes / usec 70 * 1250 ==\n+ * 87500 bytes [85KB]\n+ */\n+#define IXGBE_DMACRXT_10G\t\t0x55\n+#define IXGBE_DMACRXT_1G\t\t0x09\n+#define IXGBE_DMACRXT_100M\t\t0x01\n+\n+/* DMA Coalescing registers */\n+#define IXGBE_DMCMNGTH\t\t\t0x15F20 /* Management Threshold */\n+#define IXGBE_DMACR\t\t\t0x02400 /* Control register */\n+#define IXGBE_DMCTH(_i)\t\t\t(0x03300 + ((_i) * 4)) /* 8 of these */\n+#define IXGBE_DMCTLX\t\t\t0x02404 /* Time to Lx request */\n+/* DMA Coalescing register fields */\n+#define IXGBE_DMCMNGTH_DMCMNGTH_MASK\t0x000FFFF0 /* Mng Threshold mask */\n+#define IXGBE_DMCMNGTH_DMCMNGTH_SHIFT\t4 /* Management Threshold shift */\n+#define IXGBE_DMACR_DMACWT_MASK\t\t0x0000FFFF /* Watchdog Timer mask */\n+#define IXGBE_DMACR_HIGH_PRI_TC_MASK\t0x00FF0000\n+#define IXGBE_DMACR_HIGH_PRI_TC_SHIFT\t16\n+#define IXGBE_DMACR_EN_MNG_IND\t\t0x10000000 /* Enable Mng Indications */\n+#define IXGBE_DMACR_LX_COAL_IND\t\t0x40000000 /* Lx Coalescing indicate */\n+#define IXGBE_DMACR_DMAC_EN\t\t0x80000000 /* DMA Coalescing Enable */\n+#define IXGBE_DMCTH_DMACRXT_MASK\t0x000001FF /* Receive Threshold mask */\n+#define IXGBE_DMCTLX_TTLX_MASK\t\t0x00000FFF /* Time to Lx request mask */\n+\n /* Security Control Registers */\n #define IXGBE_SECTXCTRL 0x08800\n #define IXGBE_SECTXSTAT 0x08804\n@@ -3460,7 +3495,6 @@ struct ixgbe_mac_operations {\n \n \t/* DMA Coalescing */\n \ts32 (*dmac_config)(struct ixgbe_hw *hw);\n-\ts32 (*dmac_update_tcs)(struct ixgbe_hw *hw);\n \ts32 (*dmac_config_tcs)(struct ixgbe_hw *hw);\n \ts32 (*read_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32 *);\n \ts32 (*write_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32);\n@@ -3553,6 +3587,7 @@ struct ixgbe_mac_info {\n \tu8 flags;\n \tu8\t\t\t\tsan_mac_rar_index;\n \tstruct ixgbe_thermal_sensor_data thermal_sensor_data;\n+\tstruct ixgbe_dmac_config\tdmac_config;\n \tbool\t\t\t\tset_lben;\n \tu8\t\t\t\tled_link_act;\n };\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\nindex ea483f8..357805a 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n@@ -639,6 +639,106 @@ static s32 ixgbe_fc_autoneg_fw(struct ixgbe_hw *hw)\n \treturn ixgbe_setup_fw_link(hw);\n }\n \n+/**\n+ * ixgbe_dmac_config_tcs_X550\n+ * @hw: pointer to hardware structure\n+ *\n+ * Configure DMA coalescing threshold per TC. The dmac enable bit must\n+ * be cleared before configuring.\n+ **/\n+static s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw)\n+{\n+\tu32 tc, reg, pb_headroom, rx_pb_size, maxframe_size_kb;\n+\n+\t/* Configure DMA coalescing enabled */\n+\tswitch (hw->mac.dmac_config.link_speed) {\n+\tcase IXGBE_LINK_SPEED_10_FULL:\n+\tcase IXGBE_LINK_SPEED_100_FULL:\n+\t\tpb_headroom = IXGBE_DMACRXT_100M;\n+\t\tbreak;\n+\tcase IXGBE_LINK_SPEED_1GB_FULL:\n+\t\tpb_headroom = IXGBE_DMACRXT_1G;\n+\t\tbreak;\n+\tdefault:\n+\t\tpb_headroom = IXGBE_DMACRXT_10G;\n+\t\tbreak;\n+\t}\n+\n+\tmaxframe_size_kb = ((IXGBE_READ_REG(hw, IXGBE_MAXFRS) >>\n+\t\t\t IXGBE_MHADD_MFS_SHIFT) / 1024);\n+\n+\t/* Set the per Rx packet buffer receive threshold */\n+\tfor (tc = 0; tc < MAX_TRAFFIC_CLASS; tc++) {\n+\t\treg = IXGBE_READ_REG(hw, IXGBE_DMCTH(tc));\n+\t\treg &= ~IXGBE_DMCTH_DMACRXT_MASK;\n+\n+\t\tif (tc < hw->mac.dmac_config.num_tcs) {\n+\t\t\t/* Get Rx PB size */\n+\t\t\trx_pb_size = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(tc));\n+\t\t\trx_pb_size = (rx_pb_size & IXGBE_RXPBSIZE_MASK) >>\n+\t\t\t\tIXGBE_RXPBSIZE_SHIFT;\n+\n+\t\t\t/* Calculate receive buffer threshold in kilobytes */\n+\t\t\tif (rx_pb_size > pb_headroom)\n+\t\t\t\trx_pb_size = rx_pb_size - pb_headroom;\n+\t\t\telse\n+\t\t\t\trx_pb_size = 0;\n+\n+\t\t\t/* Minimum of MFS shall be set for DMCTH */\n+\t\t\treg |= (rx_pb_size > maxframe_size_kb) ?\n+\t\t\t\trx_pb_size : maxframe_size_kb;\n+\t\t}\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_DMCTH(tc), reg);\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n+ * ixgbe_dmac_config_X550\n+ * @hw: pointer to hardware structure\n+ *\n+ * Configure DMA coalescing. If enabling dmac, dmac is activated.\n+ * When disabling dmac, dmac enable dmac bit is cleared.\n+ **/\n+static s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw)\n+{\n+\tu32 reg, high_pri_tc;\n+\n+\t/* Disable DMA coalescing before configuring */\n+\treg = IXGBE_READ_REG(hw, IXGBE_DMACR);\n+\treg &= ~IXGBE_DMACR_DMAC_EN;\n+\tIXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);\n+\n+\t/* Disable DMA Coalescing if the watchdog timer is 0 */\n+\tif (!hw->mac.dmac_config.watchdog_timer)\n+\t\tgoto out;\n+\n+\tixgbe_dmac_config_tcs_X550(hw);\n+\n+\t/* Configure DMA Coalescing Control Register */\n+\treg = IXGBE_READ_REG(hw, IXGBE_DMACR);\n+\n+\t/* Set the watchdog timer in units of 40.96 usec */\n+\treg &= ~IXGBE_DMACR_DMACWT_MASK;\n+\treg |= (hw->mac.dmac_config.watchdog_timer * 100) / 4096;\n+\n+\treg &= ~IXGBE_DMACR_HIGH_PRI_TC_MASK;\n+\t/* If fcoe is enabled, set high priority traffic class */\n+\tif (hw->mac.dmac_config.fcoe_en) {\n+\t\thigh_pri_tc = 1 << hw->mac.dmac_config.fcoe_tc;\n+\t\treg |= ((high_pri_tc << IXGBE_DMACR_HIGH_PRI_TC_SHIFT) &\n+\t\t\tIXGBE_DMACR_HIGH_PRI_TC_MASK);\n+\t}\n+\treg |= IXGBE_DMACR_EN_MNG_IND;\n+\n+\t/* Enable DMA coalescing after configuration */\n+\treg |= IXGBE_DMACR_DMAC_EN;\n+\tIXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);\n+\n+out:\n+\treturn 0;\n+}\n+\n /** ixgbe_init_eeprom_params_X550 - Initialize EEPROM params\n * @hw: pointer to hardware structure\n *\n@@ -3955,6 +4055,8 @@ static s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n \t.disable_mdd = &ixgbe_disable_mdd_X550, \\\n \t.mdd_event = &ixgbe_mdd_event_X550, \\\n \t.restore_mdd_vf = &ixgbe_restore_mdd_vf_X550, \\\n+\t.dmac_config\t\t\t= &ixgbe_dmac_config_X550, \\\n+\t.dmac_config_tcs\t\t= &ixgbe_dmac_config_tcs_X550, \\\n \n static const struct ixgbe_mac_operations mac_ops_X550 = {\n \tX550_COMMON_MAC\ndiff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h\nindex 7d4a594..0083f4d 100644\n--- a/include/uapi/linux/ethtool.h\n+++ b/include/uapi/linux/ethtool.h\n@@ -402,6 +402,7 @@ struct ethtool_modinfo {\n *\ta TX interrupt, when the packet rate is above @pkt_rate_high.\n * @rate_sample_interval: How often to do adaptive coalescing packet rate\n *\tsampling, measured in seconds. Must not be zero.\n+ * @dmac: How many usecs to store packets before moving to host memory.\n *\n * Each pair of (usecs, max_frames) fields specifies that interrupts\n * should be coalesced until\n@@ -452,6 +453,7 @@ struct ethtool_coalesce {\n \t__u32\ttx_coalesce_usecs_high;\n \t__u32\ttx_max_coalesced_frames_high;\n \t__u32\trate_sample_interval;\n+\t__u32\tdmac;\n };\n \n /**\n", "prefixes": [] }