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GET /api/patches/778609/?format=api
{ "id": 778609, "url": "http://patchwork.ozlabs.org/api/patches/778609/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1498015323-13048-2-git-send-email-eric.gao@rock-chips.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1498015323-13048-2-git-send-email-eric.gao@rock-chips.com>", "list_archive_url": null, "date": "2017-06-21T03:22:01", "name": "[U-Boot,v3,1/3] rockchip: video: mipi: Add rk3288 soc specific driver for mipi dsi", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "e569176146dc76dbe8a3aa9a1053057a4cee1a0e", "submitter": { "id": 71343, "url": "http://patchwork.ozlabs.org/api/people/71343/?format=api", "name": null, "email": "eric.gao@rock-chips.com" }, "delegate": { "id": 1700, "url": "http://patchwork.ozlabs.org/api/users/1700/?format=api", "username": "ag", "first_name": "Anatolij", "last_name": "Gustschin", "email": "agust@denx.de" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1498015323-13048-2-git-send-email-eric.gao@rock-chips.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/778609/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/778609/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3wsqp43qxQz9ryQ\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 21 Jun 2017 13:24:44 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 3DF44C21C78; Wed, 21 Jun 2017 03:23:00 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 5E736C21C62;\n\tWed, 21 Jun 2017 03:22:57 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid F1AABC21C7D; Wed, 21 Jun 2017 03:22:28 +0000 (UTC)", "from regular1.263xmail.com (regular1.263xmail.com [211.150.99.138])\n\tby lists.denx.de (Postfix) with ESMTPS id 1794EC21C5E\n\tfor <u-boot@lists.denx.de>; Wed, 21 Jun 2017 03:22:22 +0000 (UTC)", "from eric.gao?rock-chips.com (unknown [192.168.165.141])\n\tby regular1.263xmail.com (Postfix) with ESMTP id 673D17A2B;\n\tWed, 21 Jun 2017 11:22:17 +0800 (CST)", "from localhost (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id 96356452;\n\tWed, 21 Jun 2017 11:22:12 +0800 (CST)", "from localhost (unknown [103.29.142.67])\n\tby smtp.263.net (Postfix) whith ESMTP id 26313XUSVPR;\n\tWed, 21 Jun 2017 11:22:16 +0800 (CST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H2 autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "X-263anti-spam": "", "X-MAIL-GRAY": "0", "X-MAIL-DELIVERY": "1", "X-ABS-CHECKED": "4", "X-RL-SENDER": "eric.gao@rock-chips.com", "X-FST-TO": "sjg@chromium.org", "X-SENDER-IP": "103.29.142.67", "X-LOGIN-NAME": "eric.gao@rock-chips.com", "X-UNIQUE-TAG": "<526f288ecb52955c9fd2fdbd1d287f61>", "X-ATTACHMENT-NUM": "0", "X-SENDER": "eric.gao@rock-chips.com", "X-DNS-TYPE": "0", "From": "Eric Gao <eric.gao@rock-chips.com>", "To": "sjg@chromium.org", "Date": "Wed, 21 Jun 2017 11:22:01 +0800", "Message-Id": "<1498015323-13048-2-git-send-email-eric.gao@rock-chips.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1498015323-13048-1-git-send-email-eric.gao@rock-chips.com>", "References": "<1498015323-13048-1-git-send-email-eric.gao@rock-chips.com>", "Cc": "u-boot@lists.denx.de, eric.gao@rock-chips.com", "Subject": "[U-Boot] [PATCH v3 1/3] rockchip: video: mipi: Add rk3288 soc\n\tspecific driver for mipi dsi", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Add rk3288 soc specific driver for mipi dsi.\n\nSigned-off-by: Eric Gao <eric.gao@rock-chips.com>\nReviewed-by: Simon Glass <sjg@chromium.org>\n\n---\n\nChanges in v2:\n-Cancel the force convert for dev_read_addr return value type.\n-Change regs type from \"void __iomem\" to \"uintptr_t\".\n\nChanges in v1:\n-Change function name from rk_display_enable to rk_mipi_enable.\n-Use IS_ERR to judge the return status.\n-Use dev_read_addr to replace devfdt_get_addr.\n\n drivers/video/rockchip/rk3288_mipi.c | 191 +++++++++++++++++++++++++++++++++++\n drivers/video/rockchip/rk_mipi.h | 2 +-\n 2 files changed, 192 insertions(+), 1 deletion(-)\n create mode 100644 drivers/video/rockchip/rk3288_mipi.c", "diff": "diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c\nnew file mode 100644\nindex 0000000..953b47f\n--- /dev/null\n+++ b/drivers/video/rockchip/rk3288_mipi.c\n@@ -0,0 +1,191 @@\n+/*\n+ * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd\n+ * Author: Eric Gao <eric.gao@rock-chips.com>\n+ *\n+ * SPDX-License-Identifier: GPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <clk.h>\n+#include <display.h>\n+#include <dm.h>\n+#include <fdtdec.h>\n+#include <panel.h>\n+#include <regmap.h>\n+#include \"rk_mipi.h\"\n+#include <syscon.h>\n+#include <asm/gpio.h>\n+#include <asm/hardware.h>\n+#include <asm/io.h>\n+#include <dm/uclass-internal.h>\n+#include <linux/kernel.h>\n+#include <asm/arch/clock.h>\n+#include <asm/arch/cru_rk3288.h>\n+#include <asm/arch/grf_rk3288.h>\n+#include <asm/arch/rockchip_mipi_dsi.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+#define MHz 1000000\n+\n+/* Select mipi dsi source, big or little vop */\n+static int rk_mipi_dsi_source_select(struct udevice *dev)\n+{\n+\tstruct rk_mipi_priv *priv = dev_get_priv(dev);\n+\tstruct rk3288_grf *grf = priv->grf;\n+\tstruct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev);\n+\n+\t/* Select the video source */\n+\tswitch (disp_uc_plat->source_id) {\n+\tcase VOP_B:\n+\t\trk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK,\n+\t\t\t RK3288_DSI0_LCDC_SEL_BIG\n+\t\t\t << RK3288_DSI0_LCDC_SEL_SHIFT);\n+\t\tbreak;\n+\tcase VOP_L:\n+\t\trk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK,\n+\t\t\t RK3288_DSI0_LCDC_SEL_LIT\n+\t\t\t << RK3288_DSI0_LCDC_SEL_SHIFT);\n+\t\tbreak;\n+\tdefault:\n+\t\tdebug(\"%s: Invalid VOP id\\n\", __func__);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Setup mipi dphy working mode */\n+static void rk_mipi_dphy_mode_set(struct udevice *dev)\n+{\n+\tstruct rk_mipi_priv *priv = dev_get_priv(dev);\n+\tstruct rk3288_grf *grf = priv->grf;\n+\tint val;\n+\n+\t/* Set Controller as TX mode */\n+\tval = RK3288_DPHY_TX0_RXMODE_DIS << RK3288_DPHY_TX0_RXMODE_SHIFT;\n+\trk_clrsetreg(&grf->soc_con8, RK3288_DPHY_TX0_RXMODE_MASK, val);\n+\n+\t/* Exit tx stop mode */\n+\tval |= RK3288_DPHY_TX0_TXSTOPMODE_EN\n+\t\t\t<< RK3288_DPHY_TX0_TXSTOPMODE_SHIFT;\n+\trk_clrsetreg(&grf->soc_con8,\n+\t\t RK3288_DPHY_TX0_TXSTOPMODE_MASK, val);\n+\n+\t/* Disable turnequest */\n+\tval |= RK3288_DPHY_TX0_TURNREQUEST_EN\n+\t\t<< RK3288_DPHY_TX0_TURNREQUEST_SHIFT;\n+\trk_clrsetreg(&grf->soc_con8,\n+\t\t RK3288_DPHY_TX0_TURNREQUEST_MASK, val);\n+}\n+\n+/*\n+ * This function is called by rk_display_init() using rk_mipi_dsi_enable() and\n+ * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,\n+ * enable backlight.\n+ */\n+static int rk_mipi_enable(struct udevice *dev, int panel_bpp,\n+\t\t\t const struct display_timing *timing)\n+{\n+\tint ret;\n+\tstruct rk_mipi_priv *priv = dev_get_priv(dev);\n+\n+\t/* Fill the mipi controller parameter */\n+\tpriv->ref_clk = 24 * MHz;\n+\tpriv->sys_clk = priv->ref_clk;\n+\tpriv->pix_clk = timing->pixelclock.typ;\n+\tpriv->phy_clk = priv->pix_clk * 6;\n+\tpriv->txbyte_clk = priv->phy_clk / 8;\n+\tpriv->txesc_clk = 20 * MHz;\n+\n+\t/* Select vop port, big or little */\n+\trk_mipi_dsi_source_select(dev);\n+\n+\t/* Set mipi dphy work mode */\n+\trk_mipi_dphy_mode_set(dev);\n+\n+\t/* Config and enable mipi dsi according to timing */\n+\tret = rk_mipi_dsi_enable(dev, timing);\n+\tif (ret) {\n+\t\tdebug(\"%s: rk_mipi_dsi_enable() failed (err=%d)\\n\",\n+\t\t __func__, ret);\n+\t\treturn ret;\n+\t}\n+\n+\t/* Config and enable mipi phy */\n+\tret = rk_mipi_phy_enable(dev);\n+\tif (ret) {\n+\t\tdebug(\"%s: rk_mipi_phy_enable() failed (err=%d)\\n\",\n+\t\t __func__, ret);\n+\t\treturn ret;\n+\t}\n+\n+\t/* Enable backlight */\n+\tret = panel_enable_backlight(priv->panel);\n+\tif (ret) {\n+\t\tdebug(\"%s: panel_enable_backlight() failed (err=%d)\\n\",\n+\t\t __func__, ret);\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int rk_mipi_ofdata_to_platdata(struct udevice *dev)\n+{\n+\tstruct rk_mipi_priv *priv = dev_get_priv(dev);\n+\n+\tpriv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n+\tif (IS_ERR(priv->grf)) {\n+\t\tdebug(\"%s: Get syscon grf failed (ret=%p)\\n\",\n+\t\t __func__, priv->grf);\n+\t\treturn -ENXIO;\n+\t}\n+\tpriv->regs = dev_read_addr(dev);\n+\tif (priv->regs == FDT_ADDR_T_NONE) {\n+\t\tdebug(\"%s: Get MIPI dsi address failed (ret=%lu)\\n\", __func__,\n+\t\t priv->regs);\n+\t\treturn -ENXIO;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/*\n+ * Probe function: check panel existence and readingit's timing. Then config\n+ * mipi dsi controller and enable it according to the timing parameter.\n+ */\n+static int rk_mipi_probe(struct udevice *dev)\n+{\n+\tint ret;\n+\tstruct rk_mipi_priv *priv = dev_get_priv(dev);\n+\n+\tret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, \"rockchip,panel\",\n+\t\t\t\t\t &priv->panel);\n+\tif (ret) {\n+\t\tdebug(\"%s: Can not find panel (err=%d)\\n\", __func__, ret);\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static const struct dm_display_ops rk_mipi_dsi_ops = {\n+\t.read_timing = rk_mipi_read_timing,\n+\t.enable = rk_mipi_enable,\n+};\n+\n+static const struct udevice_id rk_mipi_dsi_ids[] = {\n+\t{ .compatible = \"rockchip,rk3288_mipi_dsi\" },\n+\t{ }\n+};\n+\n+U_BOOT_DRIVER(rk_mipi_dsi) = {\n+\t.name\t= \"rk_mipi_dsi\",\n+\t.id\t= UCLASS_DISPLAY,\n+\t.of_match = rk_mipi_dsi_ids,\n+\t.ofdata_to_platdata = rk_mipi_ofdata_to_platdata,\n+\t.probe\t= rk_mipi_probe,\n+\t.ops\t= &rk_mipi_dsi_ops,\n+\t.priv_auto_alloc_size = sizeof(struct rk_mipi_priv),\n+};\ndiff --git a/drivers/video/rockchip/rk_mipi.h b/drivers/video/rockchip/rk_mipi.h\nindex 906aaaa..de6ac52 100644\n--- a/drivers/video/rockchip/rk_mipi.h\n+++ b/drivers/video/rockchip/rk_mipi.h\n@@ -8,7 +8,7 @@\n #define __RK_MIPI_H\n \n struct rk_mipi_priv {\n-\tvoid __iomem *regs;\n+\tuintptr_t regs;\n \tvoid *grf;\n \tstruct udevice *panel;\n \tstruct mipi_dsi *dsi;\n", "prefixes": [ "U-Boot", "v3", "1/3" ] }