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GET /api/patches/772619/?format=api
{ "id": 772619, "url": "http://patchwork.ozlabs.org/api/patches/772619/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170607094313.32060-13-alice.michael@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170607094313.32060-13-alice.michael@intel.com>", "list_archive_url": null, "date": "2017-06-07T09:43:13", "name": "[next,S72-V3,13/13] i40e: don't hold RTNL lock for the entire reset", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "33f69769ebb56494922ccb6491cc75e68de6421f", "submitter": { "id": 71123, "url": "http://patchwork.ozlabs.org/api/people/71123/?format=api", "name": "Michael, Alice", "email": "alice.michael@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170607094313.32060-13-alice.michael@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/772619/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/772619/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3wjbbP5zCWz9sDG\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 8 Jun 2017 03:46:57 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 4983687ADF;\n\tWed, 7 Jun 2017 17:46:56 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id DPDBKyCBQwrA; Wed, 7 Jun 2017 17:46:54 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 087C787A05;\n\tWed, 7 Jun 2017 17:46:54 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 6271E1C3EBB\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 7 Jun 2017 17:46:45 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 5CA3D89379\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 7 Jun 2017 17:46:45 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id w97bM7LhobeY for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 7 Jun 2017 17:46:44 +0000 (UTC)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id 97B4C89492\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 7 Jun 2017 17:46:44 +0000 (UTC)", "from orsmga004.jf.intel.com ([10.7.209.38])\n\tby orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t07 Jun 2017 10:46:41 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.16.121])\n\tby orsmga004.jf.intel.com with ESMTP; 07 Jun 2017 10:46:41 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.39,311,1493708400\"; d=\"scan'208\";a=\"95650704\"", "From": "Alice Michael <alice.michael@intel.com>", "To": "alice.michael@intel.com,\n\tintel-wired-lan@lists.osuosl.org", "Date": "Wed, 7 Jun 2017 05:43:13 -0400", "Message-Id": "<20170607094313.32060-13-alice.michael@intel.com>", "X-Mailer": "git-send-email 2.9.3", "In-Reply-To": "<20170607094313.32060-1-alice.michael@intel.com>", "References": "<20170607094313.32060-1-alice.michael@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S72-V3 13/13] i40e: don't hold RTNL\n\tlock for the entire reset", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Jacob Keller <jacob.e.keller@intel.com>\n\nWe recently refactored i40e_do_reset() and its friends to be able to\nhold the RTNL lock only for the portions that actually need to be\nprotected. However, a separate refactoring added several new callers of\nthese functions during the PCIe error recovery and suspend/resume\ncycles.\n\nWhen merging the changes together, it was not noticed that we could\nreduce the RTNL scope by letting the reset function handle the lock\nitself, as previously it was not possible.\n\nFix this by replacing these call sites to indicate that the reset\nfunction should handle its own lock. This enables multiple PFs to reset\nor resume simultaneously without serializing the resets via the RTNL\nlock. The end result is that on systems with lots of PFs and VFs the\nresets don't stall waiting for each other to finish.\n\nIt is probable that we can also do the same for i40e_do_reset_safe, but\nthis author did not research that change carefully enough to be\nconfident.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e_main.c | 27 +++++++--------------------\n 1 file changed, 7 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex 6db448e..67b4e09 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -6565,9 +6565,7 @@ static void i40e_reset_subtask(struct i40e_pf *pf)\n \tif (reset_flags &&\n \t !test_bit(__I40E_DOWN, pf->state) &&\n \t !test_bit(__I40E_CONFIG_BUSY, pf->state)) {\n-\t\trtnl_lock();\n-\t\ti40e_do_reset(pf, reset_flags, true);\n-\t\trtnl_unlock();\n+\t\ti40e_do_reset(pf, reset_flags, false);\n \t}\n }\n \n@@ -11905,11 +11903,8 @@ static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,\n \t}\n \n \t/* shutdown all operations */\n-\tif (!test_bit(__I40E_SUSPENDED, pf->state)) {\n-\t\trtnl_lock();\n-\t\ti40e_prep_for_reset(pf, true);\n-\t\trtnl_unlock();\n-\t}\n+\tif (!test_bit(__I40E_SUSPENDED, pf->state))\n+\t\ti40e_prep_for_reset(pf, false);\n \n \t/* Request a slot reset */\n \treturn PCI_ERS_RESULT_NEED_RESET;\n@@ -11975,9 +11970,7 @@ static void i40e_pci_error_resume(struct pci_dev *pdev)\n \tif (test_bit(__I40E_SUSPENDED, pf->state))\n \t\treturn;\n \n-\trtnl_lock();\n-\ti40e_handle_reset_warning(pf, true);\n-\trtnl_unlock();\n+\ti40e_handle_reset_warning(pf, false);\n }\n \n /**\n@@ -12057,9 +12050,7 @@ static void i40e_shutdown(struct pci_dev *pdev)\n \tif (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))\n \t\ti40e_enable_mc_magic_wake(pf);\n \n-\trtnl_lock();\n-\ti40e_prep_for_reset(pf, true);\n-\trtnl_unlock();\n+\ti40e_prep_for_reset(pf, false);\n \n \twr32(hw, I40E_PFPM_APM,\n \t (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));\n@@ -12091,9 +12082,7 @@ static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)\n \tif (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))\n \t\ti40e_enable_mc_magic_wake(pf);\n \n-\trtnl_lock();\n-\ti40e_prep_for_reset(pf, true);\n-\trtnl_unlock();\n+\ti40e_prep_for_reset(pf, false);\n \n \twr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));\n \twr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));\n@@ -12139,9 +12128,7 @@ static int i40e_resume(struct pci_dev *pdev)\n \t/* handling the reset will rebuild the device state */\n \tif (test_and_clear_bit(__I40E_SUSPENDED, pf->state)) {\n \t\tclear_bit(__I40E_DOWN, pf->state);\n-\t\trtnl_lock();\n-\t\ti40e_reset_and_rebuild(pf, false, true);\n-\t\trtnl_unlock();\n+\t\ti40e_reset_and_rebuild(pf, false, false);\n \t}\n \n \treturn 0;\n", "prefixes": [ "next", "S72-V3", "13/13" ] }