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GET /api/patches/765806/?format=api
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{
    "id": 765806,
    "url": "http://patchwork.ozlabs.org/api/patches/765806/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1495526310-5543-6-git-send-email-jteki@openedev.com/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
        "list_email": "u-boot@lists.denx.de",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1495526310-5543-6-git-send-email-jteki@openedev.com>",
    "list_archive_url": null,
    "date": "2017-05-23T07:58:18",
    "name": "[U-Boot,v7,05/17] ARM: dts: i.MX6: Add imx6qp.dtsi",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": false,
    "hash": "2f18df7161e3a76ad50950f9b458e8992d531277",
    "submitter": {
        "id": 20045,
        "url": "http://patchwork.ozlabs.org/api/people/20045/?format=api",
        "name": "Jagan Teki",
        "email": "jagannadh.teki@gmail.com"
    },
    "delegate": {
        "id": 1693,
        "url": "http://patchwork.ozlabs.org/api/users/1693/?format=api",
        "username": "sbabic",
        "first_name": "Stefano",
        "last_name": "Babic",
        "email": "sbabic@denx.de"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1495526310-5543-6-git-send-email-jteki@openedev.com/mbox/",
    "series": [],
    "comments": "http://patchwork.ozlabs.org/api/patches/765806/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/765806/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "X-Received": "by 10.99.103.4 with SMTP id b4mr29677337pgc.84.1495526465909;\n\tTue, 23 May 2017 01:01:05 -0700 (PDT)",
        "From": "Jagan Teki <jagannadh.teki@gmail.com>",
        "X-Google-Original-From": "Jagan Teki <jteki@openedev.com>",
        "To": "Stefano Babic <sbabic@denx.de>",
        "Date": "Tue, 23 May 2017 13:28:18 +0530",
        "Message-Id": "<1495526310-5543-6-git-send-email-jteki@openedev.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1495526310-5543-1-git-send-email-jteki@openedev.com>",
        "References": "<1495526310-5543-1-git-send-email-jteki@openedev.com>",
        "Cc": "Fabio Estevam <fabio.estevam@nxp.com>, u-boot@lists.denx.de",
        "Subject": "[U-Boot] [PATCH v7 05/17] ARM: dts: i.MX6: Add imx6qp.dtsi",
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        "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>"
    },
    "content": "From: Jagan Teki <jagan@amarulasolutions.com>\n\nRetrive imx6qp.dtsi from Linux with last commit\n\"ARM: dts: imx6qp: add PRG nodes and hook up to IPUs\"\n(sha1: 54458dac349f72dd9a4fd816619bde0bab40841d)\n\nSync with Linux commit 4879b7ae(\"Merge tag 'dmaengine-4.12-rc1'\").\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n arch/arm/dts/imx6qp.dtsi | 149 +++++++++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 149 insertions(+)\n create mode 100644 arch/arm/dts/imx6qp.dtsi",
    "diff": "diff --git a/arch/arm/dts/imx6qp.dtsi b/arch/arm/dts/imx6qp.dtsi\nnew file mode 100644\nindex 0000000..59453f2\n--- /dev/null\n+++ b/arch/arm/dts/imx6qp.dtsi\n@@ -0,0 +1,149 @@\n+/*\n+ * Copyright 2016 Freescale Semiconductor, Inc.\n+ *\n+ * This file is dual-licensed: you can use it either under the terms\n+ * of the GPL or the X11 license, at your option. Note that this dual\n+ * licensing only applies to this file, and not this project as a\n+ * whole.\n+ *\n+ *  a) This file is free software; you can redistribute it and/or\n+ *     modify it under the terms of the GNU General Public License as\n+ *     published by the Free Software Foundation; either version 2 of the\n+ *     License, or (at your option) any later version.\n+ *\n+ *     This file is distributed in the hope that it will be useful,\n+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n+ *     GNU General Public License for more details.\n+ *\n+ * Or, alternatively,\n+ *\n+ *  b) Permission is hereby granted, free of charge, to any person\n+ *     obtaining a copy of this software and associated documentation\n+ *     files (the \"Software\"), to deal in the Software without\n+ *     restriction, including without limitation the rights to use,\n+ *     copy, modify, merge, publish, distribute, sublicense, and/or\n+ *     sell copies of the Software, and to permit persons to whom the\n+ *     Software is furnished to do so, subject to the following\n+ *     conditions:\n+ *\n+ *     The above copyright notice and this permission notice shall be\n+ *     included in all copies or substantial portions of the Software.\n+ *\n+ *     THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND,\n+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES\n+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND\n+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT\n+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,\n+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR\n+ *     OTHER DEALINGS IN THE SOFTWARE.\n+ */\n+\n+#include \"imx6q.dtsi\"\n+\n+/ {\n+\tsoc {\n+\t\tocram2: sram@00940000 {\n+\t\t\tcompatible = \"mmio-sram\";\n+\t\t\treg = <0x00940000 0x20000>;\n+\t\t\tclocks = <&clks IMX6QDL_CLK_OCRAM>;\n+\t\t};\n+\n+\t\tocram3: sram@00960000 {\n+\t\t\tcompatible = \"mmio-sram\";\n+\t\t\treg = <0x00960000 0x20000>;\n+\t\t\tclocks = <&clks IMX6QDL_CLK_OCRAM>;\n+\t\t};\n+\n+\t\taips-bus@02100000 {\n+\t\t\tpre1: pre@21c8000 {\n+\t\t\t\tcompatible = \"fsl,imx6qp-pre\";\n+\t\t\t\treg = <0x021c8000 0x1000>;\n+\t\t\t\tinterrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;\n+\t\t\t\tclocks = <&clks IMX6QDL_CLK_PRE0>;\n+\t\t\t\tclock-names = \"axi\";\n+\t\t\t\tfsl,iram = <&ocram2>;\n+\t\t\t};\n+\n+\t\t\tpre2: pre@21c9000 {\n+\t\t\t\tcompatible = \"fsl,imx6qp-pre\";\n+\t\t\t\treg = <0x021c9000 0x1000>;\n+\t\t\t\tinterrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;\n+\t\t\t\tclocks = <&clks IMX6QDL_CLK_PRE1>;\n+\t\t\t\tclock-names = \"axi\";\n+\t\t\t\tfsl,iram = <&ocram2>;\n+\t\t\t};\n+\n+\t\t\tpre3: pre@21ca000 {\n+\t\t\t\tcompatible = \"fsl,imx6qp-pre\";\n+\t\t\t\treg = <0x021ca000 0x1000>;\n+\t\t\t\tinterrupts = <GIC_SPI 98 IRQ_TYPE_EDGE_RISING>;\n+\t\t\t\tclocks = <&clks IMX6QDL_CLK_PRE2>;\n+\t\t\t\tclock-names = \"axi\";\n+\t\t\t\tfsl,iram = <&ocram3>;\n+\t\t\t};\n+\n+\t\t\tpre4: pre@21cb000 {\n+\t\t\t\tcompatible = \"fsl,imx6qp-pre\";\n+\t\t\t\treg = <0x021cb000 0x1000>;\n+\t\t\t\tinterrupts = <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>;\n+\t\t\t\tclocks = <&clks IMX6QDL_CLK_PRE3>;\n+\t\t\t\tclock-names = \"axi\";\n+\t\t\t\tfsl,iram = <&ocram3>;\n+\t\t\t};\n+\n+\t\t\tprg1: prg@21cc000 {\n+\t\t\t\tcompatible = \"fsl,imx6qp-prg\";\n+\t\t\t\treg = <0x021cc000 0x1000>;\n+\t\t\t\tclocks = <&clks IMX6QDL_CLK_PRG0_APB>,\n+\t\t\t\t\t <&clks IMX6QDL_CLK_PRG0_AXI>;\n+\t\t\t\tclock-names = \"ipg\", \"axi\";\n+\t\t\t\tfsl,pres = <&pre1>, <&pre2>, <&pre3>;\n+\t\t\t};\n+\n+\t\t\tprg2: prg@21cd000 {\n+\t\t\t\tcompatible = \"fsl,imx6qp-prg\";\n+\t\t\t\treg = <0x021cd000 0x1000>;\n+\t\t\t\tclocks = <&clks IMX6QDL_CLK_PRG1_APB>,\n+\t\t\t\t\t <&clks IMX6QDL_CLK_PRG1_AXI>;\n+\t\t\t\tclock-names = \"ipg\", \"axi\";\n+\t\t\t\tfsl,pres = <&pre4>, <&pre2>, <&pre3>;\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&fec {\n+\t/delete-property/interrupts-extended;\n+\tinterrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t     <0 119 IRQ_TYPE_LEVEL_HIGH>;\n+};\n+\n+&ipu1 {\n+\tcompatible = \"fsl,imx6qp-ipu\", \"fsl,imx6q-ipu\";\n+\tfsl,prg = <&prg1>;\n+};\n+\n+&ipu2 {\n+\tcompatible = \"fsl,imx6qp-ipu\", \"fsl,imx6q-ipu\";\n+\tfsl,prg = <&prg2>;\n+};\n+\n+&ldb {\n+\tclocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,\n+\t\t <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,\n+\t\t <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,\n+\t\t <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>;\n+\tclock-names = \"di0_pll\", \"di1_pll\",\n+\t\t      \"di0_sel\", \"di1_sel\", \"di2_sel\", \"di3_sel\",\n+\t\t      \"di0\", \"di1\";\n+};\n+\n+&mmdc0 {\n+\tcompatible = \"fsl,imx6qp-mmdc\", \"fsl,imx6q-mmdc\";\n+};\n+\n+&pcie {\n+\tcompatible = \"fsl,imx6qp-pcie\", \"snps,dw-pcie\";\n+};\n",
    "prefixes": [
        "U-Boot",
        "v7",
        "05/17"
    ]
}