Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/765804/?format=api
{ "id": 765804, "url": "http://patchwork.ozlabs.org/api/patches/765804/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1495526310-5543-3-git-send-email-jteki@openedev.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1495526310-5543-3-git-send-email-jteki@openedev.com>", "list_archive_url": null, "date": "2017-05-23T07:58:15", "name": "[U-Boot,v7,02/17] ARM: dts: i.MX6: Add imx6qdl-sabresd.dtsi", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "b08af63e752a8c343a97d4cad5a411bc43bf5481", "submitter": { "id": 20045, "url": "http://patchwork.ozlabs.org/api/people/20045/?format=api", "name": "Jagan Teki", "email": "jagannadh.teki@gmail.com" }, "delegate": { "id": 1693, "url": "http://patchwork.ozlabs.org/api/users/1693/?format=api", "username": "sbabic", "first_name": "Stefano", "last_name": "Babic", "email": "sbabic@denx.de" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1495526310-5543-3-git-send-email-jteki@openedev.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/765804/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/765804/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3wX7Kr38Hcz9rxj\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 23 May 2017 18:02:24 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 19D46C21D05; Tue, 23 May 2017 08:01:35 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id F08D0C21C29;\n\tTue, 23 May 2017 08:01:07 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 085AFC21CB3; Tue, 23 May 2017 08:01:02 +0000 (UTC)", "from mail-pf0-f196.google.com (mail-pf0-f196.google.com\n\t[209.85.192.196])\n\tby lists.denx.de (Postfix) with ESMTPS id 673F3C21C68\n\tfor <u-boot@lists.denx.de>; Tue, 23 May 2017 08:00:56 +0000 (UTC)", "by mail-pf0-f196.google.com with SMTP id w69so25818293pfk.1\n\tfor <u-boot@lists.denx.de>; Tue, 23 May 2017 01:00:56 -0700 (PDT)", "from localhost.localdomain ([117.247.27.81])\n\tby smtp.gmail.com with ESMTPSA id l7sm14796pgn.10.2017.05.23.01.00.51\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 23 May 2017 01:00:53 -0700 (PDT)" ], "Authentication-Results": "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"WxOW0yoY\"; dkim-atps=neutral", "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=jMS/o30t25s19xg3mvTLAvsd0TxkMW9OVmUKMLTXX3I=;\n\tb=WxOW0yoYXi96yiYUqk13zIiL4AfS+RudO1kv0sm3fnMn7Ob4SWHgxcencYlz/RNszz\n\tRiUSDyTMEqmsg+T6xQ+GtHtHf4AHBneTyuHjPazAJ1o7RTzWpIS78yu2/Zmbg9XH0o6X\n\tM9Nixlu5K6q//Be3pQy7D/GY9lfzcYzs5saXMQIzPh1E3pPtW6ILMpQMn/ViuiVHFvAI\n\tZs1VtE4hBMY2I9q3bToiMHEPi7dKuc9o34DbvkyVldWNzDYGakAjD5b8QRhfREAX44rY\n\twUQmnZ1nlHBV+oqaA/cFY63mjEPgIK3RZ/Svy1VOFJ5VvdSC1U5ZUUd8S8GT0bJjxThL\n\tbE2A==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=jMS/o30t25s19xg3mvTLAvsd0TxkMW9OVmUKMLTXX3I=;\n\tb=kY26kEIjGoJtIVKCupMroKsnpHsipSU/oLwAwOth57f9hyvdbXJrU2zrAt2R0y6GLB\n\tJYaofk3yK7oibkNbDGoM5BEoP9ilItOHEx/4Oeb6oPta07CvHphxXL5JZzUfYYirHJDl\n\t6yfukeVox86LFrxnjVIMeIafDmx4dJcmVmetFURv7WrcoiNcEqDZwzsYYapCXzDBxij0\n\t9IZMkdxmpBNuNT5G6/5aDYEgA5OQjdkmfZFO/0EEJkjx/GyvcFSfU3jQWizhsENYShX+\n\tntzGm9VHOn9s95IqdVIPHqn/gQc9SSXQsDFNPMKYHzOFiUtljEz56ccO5aOjmNBC4bsP\n\tfntQ==", "X-Gm-Message-State": "AODbwcCjmSmLglZELxRyv/VUTfn/Q/Xa3Gp6/DDd6o30BiciAxqkYoKX\n\t4g6BqWmkwcrCtu4d", "X-Received": "by 10.98.200.23 with SMTP id z23mr30723184pff.18.1495526454903; \n\tTue, 23 May 2017 01:00:54 -0700 (PDT)", "From": "Jagan Teki <jagannadh.teki@gmail.com>", "X-Google-Original-From": "Jagan Teki <jteki@openedev.com>", "To": "Stefano Babic <sbabic@denx.de>", "Date": "Tue, 23 May 2017 13:28:15 +0530", "Message-Id": "<1495526310-5543-3-git-send-email-jteki@openedev.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1495526310-5543-1-git-send-email-jteki@openedev.com>", "References": "<1495526310-5543-1-git-send-email-jteki@openedev.com>", "Cc": "Fabio Estevam <fabio.estevam@nxp.com>, u-boot@lists.denx.de", "Subject": "[U-Boot] [PATCH v7 02/17] ARM: dts: i.MX6: Add imx6qdl-sabresd.dtsi", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Jagan Teki <jagan@amarulasolutions.com>\n\nRetrive imx6qdl-sabresd.dtsi from Linux with last commit\n\"ARM: dts: imx6qdl-sabresd: Set LDO regulator supply\"\n(sha1: c23568dbbda110a5c79c6537cc81ed7af5444b64)\n\nSync with Linux commit 4879b7ae(\"Merge tag 'dmaengine-4.12-rc1'\").\n\nSigned-off-by: Jagan Teki <jagan@amarulasolutions.com>\n---\n arch/arm/dts/imx6qdl-sabresd.dtsi | 626 ++++++++++++++++++++++++++++++++++++++\n 1 file changed, 626 insertions(+)\n create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi", "diff": "diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi\nnew file mode 100644\nindex 0000000..58055ce\n--- /dev/null\n+++ b/arch/arm/dts/imx6qdl-sabresd.dtsi\n@@ -0,0 +1,626 @@\n+/*\n+ * Copyright 2012 Freescale Semiconductor, Inc.\n+ * Copyright 2011 Linaro Ltd.\n+ *\n+ * The code contained herein is licensed under the GNU General Public\n+ * License. You may obtain a copy of the GNU General Public License\n+ * Version 2 or later at the following locations:\n+ *\n+ * http://www.opensource.org/licenses/gpl-license.html\n+ * http://www.gnu.org/copyleft/gpl.html\n+ */\n+\n+#include <dt-bindings/gpio/gpio.h>\n+#include <dt-bindings/input/input.h>\n+\n+/ {\n+\tchosen {\n+\t\tstdout-path = &uart1;\n+\t};\n+\n+\tmemory {\n+\t\treg = <0x10000000 0x40000000>;\n+\t};\n+\n+\tregulators {\n+\t\tcompatible = \"simple-bus\";\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\treg_usb_otg_vbus: regulator@0 {\n+\t\t\tcompatible = \"regulator-fixed\";\n+\t\t\treg = <0>;\n+\t\t\tregulator-name = \"usb_otg_vbus\";\n+\t\t\tregulator-min-microvolt = <5000000>;\n+\t\t\tregulator-max-microvolt = <5000000>;\n+\t\t\tgpio = <&gpio3 22 0>;\n+\t\t\tenable-active-high;\n+\t\t\tvin-supply = <&swbst_reg>;\n+\t\t};\n+\n+\t\treg_usb_h1_vbus: regulator@1 {\n+\t\t\tcompatible = \"regulator-fixed\";\n+\t\t\treg = <1>;\n+\t\t\tregulator-name = \"usb_h1_vbus\";\n+\t\t\tregulator-min-microvolt = <5000000>;\n+\t\t\tregulator-max-microvolt = <5000000>;\n+\t\t\tgpio = <&gpio1 29 0>;\n+\t\t\tenable-active-high;\n+\t\t\tvin-supply = <&swbst_reg>;\n+\t\t};\n+\n+\t\treg_audio: regulator@2 {\n+\t\t\tcompatible = \"regulator-fixed\";\n+\t\t\treg = <2>;\n+\t\t\tregulator-name = \"wm8962-supply\";\n+\t\t\tgpio = <&gpio4 10 0>;\n+\t\t\tenable-active-high;\n+\t\t};\n+\n+\t\treg_pcie: regulator@3 {\n+\t\t\tcompatible = \"regulator-fixed\";\n+\t\t\treg = <3>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&pinctrl_pcie_reg>;\n+\t\t\tregulator-name = \"MPCIE_3V3\";\n+\t\t\tregulator-min-microvolt = <3300000>;\n+\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\tgpio = <&gpio3 19 0>;\n+\t\t\tregulator-always-on;\n+\t\t\tenable-active-high;\n+\t\t};\n+\t};\n+\n+\tgpio-keys {\n+\t\tcompatible = \"gpio-keys\";\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&pinctrl_gpio_keys>;\n+\n+\t\tpower {\n+\t\t\tlabel = \"Power Button\";\n+\t\t\tgpios = <&gpio3 29 GPIO_ACTIVE_LOW>;\n+\t\t\twakeup-source;\n+\t\t\tlinux,code = <KEY_POWER>;\n+\t\t};\n+\n+\t\tvolume-up {\n+\t\t\tlabel = \"Volume Up\";\n+\t\t\tgpios = <&gpio1 4 GPIO_ACTIVE_LOW>;\n+\t\t\twakeup-source;\n+\t\t\tlinux,code = <KEY_VOLUMEUP>;\n+\t\t};\n+\n+\t\tvolume-down {\n+\t\t\tlabel = \"Volume Down\";\n+\t\t\tgpios = <&gpio1 5 GPIO_ACTIVE_LOW>;\n+\t\t\twakeup-source;\n+\t\t\tlinux,code = <KEY_VOLUMEDOWN>;\n+\t\t};\n+\t};\n+\n+\tsound {\n+\t\tcompatible = \"fsl,imx6q-sabresd-wm8962\",\n+\t\t\t \"fsl,imx-audio-wm8962\";\n+\t\tmodel = \"wm8962-audio\";\n+\t\tssi-controller = <&ssi2>;\n+\t\taudio-codec = <&codec>;\n+\t\taudio-routing =\n+\t\t\t\"Headphone Jack\", \"HPOUTL\",\n+\t\t\t\"Headphone Jack\", \"HPOUTR\",\n+\t\t\t\"Ext Spk\", \"SPKOUTL\",\n+\t\t\t\"Ext Spk\", \"SPKOUTR\",\n+\t\t\t\"AMIC\", \"MICBIAS\",\n+\t\t\t\"IN3R\", \"AMIC\";\n+\t\tmux-int-port = <2>;\n+\t\tmux-ext-port = <3>;\n+\t};\n+\n+\tbacklight_lvds: backlight-lvds {\n+\t\tcompatible = \"pwm-backlight\";\n+\t\tpwms = <&pwm1 0 5000000>;\n+\t\tbrightness-levels = <0 4 8 16 32 64 128 255>;\n+\t\tdefault-brightness-level = <7>;\n+\t\tstatus = \"okay\";\n+\t};\n+\n+\tleds {\n+\t\tcompatible = \"gpio-leds\";\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&pinctrl_gpio_leds>;\n+\n+\t\tred {\n+\t\t\tgpios = <&gpio1 2 0>;\n+\t\t\tdefault-state = \"on\";\n+\t\t};\n+\t};\n+\n+\tpanel {\n+\t\tcompatible = \"hannstar,hsd100pxn1\";\n+\t\tbacklight = <&backlight_lvds>;\n+\n+\t\tport {\n+\t\t\tpanel_in: endpoint {\n+\t\t\t\tremote-endpoint = <&lvds0_out>;\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&audmux {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_audmux>;\n+\tstatus = \"okay\";\n+};\n+\n+&clks {\n+\tassigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,\n+\t\t\t <&clks IMX6QDL_CLK_LDB_DI1_SEL>;\n+\tassigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,\n+\t\t\t\t <&clks IMX6QDL_CLK_PLL3_USB_OTG>;\n+};\n+\n+&ecspi1 {\n+\tcs-gpios = <&gpio4 9 0>;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_ecspi1>;\n+\tstatus = \"okay\";\n+\n+\tflash: m25p80@0 {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tcompatible = \"st,m25p32\", \"jedec,spi-nor\";\n+\t\tspi-max-frequency = <20000000>;\n+\t\treg = <0>;\n+\t};\n+};\n+\n+&fec {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_enet>;\n+\tphy-mode = \"rgmii\";\n+\tphy-reset-gpios = <&gpio1 25 0>;\n+\tstatus = \"okay\";\n+};\n+\n+&hdmi {\n+\tddc-i2c-bus = <&i2c2>;\n+\tstatus = \"okay\";\n+};\n+\n+&i2c1 {\n+\tclock-frequency = <100000>;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_i2c1>;\n+\tstatus = \"okay\";\n+\n+\tcodec: wm8962@1a {\n+\t\tcompatible = \"wlf,wm8962\";\n+\t\treg = <0x1a>;\n+\t\tclocks = <&clks IMX6QDL_CLK_CKO>;\n+\t\tDCVDD-supply = <®_audio>;\n+\t\tDBVDD-supply = <®_audio>;\n+\t\tAVDD-supply = <®_audio>;\n+\t\tCPVDD-supply = <®_audio>;\n+\t\tMICVDD-supply = <®_audio>;\n+\t\tPLLVDD-supply = <®_audio>;\n+\t\tSPKVDD1-supply = <®_audio>;\n+\t\tSPKVDD2-supply = <®_audio>;\n+\t\tgpio-cfg = <\n+\t\t\t0x0000 /* 0:Default */\n+\t\t\t0x0000 /* 1:Default */\n+\t\t\t0x0013 /* 2:FN_DMICCLK */\n+\t\t\t0x0000 /* 3:Default */\n+\t\t\t0x8014 /* 4:FN_DMICCDAT */\n+\t\t\t0x0000 /* 5:Default */\n+\t\t>;\n+ };\n+};\n+\n+&i2c2 {\n+\tclock-frequency = <100000>;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_i2c2>;\n+\tstatus = \"okay\";\n+\n+\tpmic: pfuze100@08 {\n+\t\tcompatible = \"fsl,pfuze100\";\n+\t\treg = <0x08>;\n+\n+\t\tregulators {\n+\t\t\tsw1a_reg: sw1ab {\n+\t\t\t\tregulator-min-microvolt = <300000>;\n+\t\t\t\tregulator-max-microvolt = <1875000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-ramp-delay = <6250>;\n+\t\t\t};\n+\n+\t\t\tsw1c_reg: sw1c {\n+\t\t\t\tregulator-min-microvolt = <300000>;\n+\t\t\t\tregulator-max-microvolt = <1875000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-ramp-delay = <6250>;\n+\t\t\t};\n+\n+\t\t\tsw2_reg: sw2 {\n+\t\t\t\tregulator-min-microvolt = <800000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t\tregulator-ramp-delay = <6250>;\n+\t\t\t};\n+\n+\t\t\tsw3a_reg: sw3a {\n+\t\t\t\tregulator-min-microvolt = <400000>;\n+\t\t\t\tregulator-max-microvolt = <1975000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tsw3b_reg: sw3b {\n+\t\t\t\tregulator-min-microvolt = <400000>;\n+\t\t\t\tregulator-max-microvolt = <1975000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tsw4_reg: sw4 {\n+\t\t\t\tregulator-min-microvolt = <800000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t};\n+\n+\t\t\tswbst_reg: swbst {\n+\t\t\t\tregulator-min-microvolt = <5000000>;\n+\t\t\t\tregulator-max-microvolt = <5150000>;\n+\t\t\t};\n+\n+\t\t\tsnvs_reg: vsnvs {\n+\t\t\t\tregulator-min-microvolt = <1000000>;\n+\t\t\t\tregulator-max-microvolt = <3000000>;\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvref_reg: vrefddr {\n+\t\t\t\tregulator-boot-on;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvgen1_reg: vgen1 {\n+\t\t\t\tregulator-min-microvolt = <800000>;\n+\t\t\t\tregulator-max-microvolt = <1550000>;\n+\t\t\t};\n+\n+\t\t\tvgen2_reg: vgen2 {\n+\t\t\t\tregulator-min-microvolt = <800000>;\n+\t\t\t\tregulator-max-microvolt = <1550000>;\n+\t\t\t};\n+\n+\t\t\tvgen3_reg: vgen3 {\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t};\n+\n+\t\t\tvgen4_reg: vgen4 {\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvgen5_reg: vgen5 {\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\n+\t\t\tvgen6_reg: vgen6 {\n+\t\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\t\tregulator-max-microvolt = <3300000>;\n+\t\t\t\tregulator-always-on;\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&i2c3 {\n+\tclock-frequency = <100000>;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_i2c3>;\n+\tstatus = \"okay\";\n+\n+\tegalax_ts@04 {\n+\t\tcompatible = \"eeti,egalax_ts\";\n+\t\treg = <0x04>;\n+\t\tinterrupt-parent = <&gpio6>;\n+\t\tinterrupts = <7 2>;\n+\t\twakeup-gpios = <&gpio6 7 0>;\n+\t};\n+};\n+\n+&iomuxc {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_hog>;\n+\n+\timx6qdl-sabresd {\n+\t\tpinctrl_hog: hoggrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0\n+\t\t\t\tMX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_audmux: audmuxgrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_CSI0_DAT7__AUD3_RXD\t\t0x130b0\n+\t\t\t\tMX6QDL_PAD_CSI0_DAT4__AUD3_TXC\t\t0x130b0\n+\t\t\t\tMX6QDL_PAD_CSI0_DAT5__AUD3_TXD\t\t0x110b0\n+\t\t\t\tMX6QDL_PAD_CSI0_DAT6__AUD3_TXFS\t\t0x130b0\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_ecspi1: ecspi1grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_KEY_COL1__ECSPI1_MISO\t0x100b1\n+\t\t\t\tMX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI\t0x100b1\n+\t\t\t\tMX6QDL_PAD_KEY_COL0__ECSPI1_SCLK\t0x100b1\n+\t\t\t\tMX6QDL_PAD_KEY_ROW1__GPIO4_IO09\t\t0x1b0b0\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_enet: enetgrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_ENET_MDIO__ENET_MDIO\t\t0x1b0b0\n+\t\t\t\tMX6QDL_PAD_ENET_MDC__ENET_MDC\t\t0x1b0b0\n+\t\t\t\tMX6QDL_PAD_RGMII_TXC__RGMII_TXC\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_TD0__RGMII_TD0\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_TD1__RGMII_TD1\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_TD2__RGMII_TD2\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_TD3__RGMII_TD3\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL\t0x1b030\n+\t\t\t\tMX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK\t0x1b0b0\n+\t\t\t\tMX6QDL_PAD_RGMII_RXC__RGMII_RXC\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_RD0__RGMII_RD0\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_RD1__RGMII_RD1\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_RD2__RGMII_RD2\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_RD3__RGMII_RD3\t\t0x1b030\n+\t\t\t\tMX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL\t0x1b030\n+\t\t\t\tMX6QDL_PAD_GPIO_16__ENET_REF_CLK\t0x4001b0a8\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_gpio_keys: gpio_keysgrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0\n+\t\t\t\tMX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_i2c1: i2c1grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_CSI0_DAT8__I2C1_SDA\t\t0x4001b8b1\n+\t\t\t\tMX6QDL_PAD_CSI0_DAT9__I2C1_SCL\t\t0x4001b8b1\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_i2c2: i2c2grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_KEY_COL3__I2C2_SCL\t\t0x4001b8b1\n+\t\t\t\tMX6QDL_PAD_KEY_ROW3__I2C2_SDA\t\t0x4001b8b1\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_i2c3: i2c3grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_GPIO_3__I2C3_SCL\t\t0x4001b8b1\n+\t\t\t\tMX6QDL_PAD_GPIO_6__I2C3_SDA\t\t0x4001b8b1\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_pcie: pciegrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_GPIO_17__GPIO7_IO12\t0x1b0b0\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_pcie_reg: pciereggrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_EIM_D19__GPIO3_IO19\t0x1b0b0\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_pwm1: pwm1grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_SD1_DAT3__PWM1_OUT\t\t0x1b0b1\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_uart1: uart1grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA\t0x1b0b1\n+\t\t\t\tMX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA\t0x1b0b1\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_usbotg: usbotggrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_ENET_RX_ER__USB_OTG_ID\t0x17059\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_usdhc2: usdhc2grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_SD2_CMD__SD2_CMD\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD2_CLK__SD2_CLK\t\t0x10059\n+\t\t\t\tMX6QDL_PAD_SD2_DAT0__SD2_DATA0\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD2_DAT1__SD2_DATA1\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD2_DAT2__SD2_DATA2\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD2_DAT3__SD2_DATA3\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_NANDF_D4__SD2_DATA4\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_NANDF_D5__SD2_DATA5\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_NANDF_D6__SD2_DATA6\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_NANDF_D7__SD2_DATA7\t\t0x17059\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_usdhc3: usdhc3grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_SD3_CMD__SD3_CMD\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD3_CLK__SD3_CLK\t\t0x10059\n+\t\t\t\tMX6QDL_PAD_SD3_DAT0__SD3_DATA0\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD3_DAT1__SD3_DATA1\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD3_DAT2__SD3_DATA2\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD3_DAT3__SD3_DATA3\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD3_DAT4__SD3_DATA4\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD3_DAT5__SD3_DATA5\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD3_DAT6__SD3_DATA6\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD3_DAT7__SD3_DATA7\t\t0x17059\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_usdhc4: usdhc4grp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_SD4_CMD__SD4_CMD\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD4_CLK__SD4_CLK\t\t0x10059\n+\t\t\t\tMX6QDL_PAD_SD4_DAT0__SD4_DATA0\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD4_DAT1__SD4_DATA1\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD4_DAT2__SD4_DATA2\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD4_DAT3__SD4_DATA3\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD4_DAT4__SD4_DATA4\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD4_DAT5__SD4_DATA5\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD4_DAT6__SD4_DATA6\t\t0x17059\n+\t\t\t\tMX6QDL_PAD_SD4_DAT7__SD4_DATA7\t\t0x17059\n+\t\t\t>;\n+\t\t};\n+\n+\t\tpinctrl_wdog: wdoggrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_GPIO_1__WDOG2_B\t\t0x1b0b0\n+\t\t\t>;\n+\t\t};\n+\t};\n+\n+\tgpio_leds {\n+\t\tpinctrl_gpio_leds: gpioledsgrp {\n+\t\t\tfsl,pins = <\n+\t\t\t\tMX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0\n+\t\t\t>;\n+\t\t};\n+\t};\n+};\n+\n+&ldb {\n+\tstatus = \"okay\";\n+\n+\tlvds-channel@1 {\n+\t\tfsl,data-mapping = \"spwg\";\n+\t\tfsl,data-width = <18>;\n+\t\tstatus = \"okay\";\n+\n+\t\tport@4 {\n+\t\t\treg = <4>;\n+\n+\t\t\tlvds0_out: endpoint {\n+\t\t\t\tremote-endpoint = <&panel_in>;\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&pcie {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_pcie>;\n+\treset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;\n+\tstatus = \"okay\";\n+};\n+\n+&pwm1 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_pwm1>;\n+\tstatus = \"okay\";\n+};\n+\n+®_arm {\n+ vin-supply = <&sw1a_reg>;\n+};\n+\n+®_pu {\n+ vin-supply = <&sw1c_reg>;\n+};\n+\n+®_soc {\n+ vin-supply = <&sw1c_reg>;\n+};\n+\n+&snvs_poweroff {\n+\tstatus = \"okay\";\n+};\n+\n+&ssi2 {\n+\tstatus = \"okay\";\n+};\n+\n+&uart1 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_uart1>;\n+\tstatus = \"okay\";\n+};\n+\n+&usbh1 {\n+\tvbus-supply = <®_usb_h1_vbus>;\n+\tstatus = \"okay\";\n+};\n+\n+&usbotg {\n+\tvbus-supply = <®_usb_otg_vbus>;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_usbotg>;\n+\tdisable-over-current;\n+\tstatus = \"okay\";\n+};\n+\n+&usdhc2 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_usdhc2>;\n+\tbus-width = <8>;\n+\tcd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;\n+\twp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;\n+\tstatus = \"okay\";\n+};\n+\n+&usdhc3 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_usdhc3>;\n+\tbus-width = <8>;\n+\tcd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;\n+\twp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;\n+\tstatus = \"okay\";\n+};\n+\n+&usdhc4 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_usdhc4>;\n+\tbus-width = <8>;\n+\tnon-removable;\n+\tno-1-8-v;\n+\tstatus = \"okay\";\n+};\n+\n+&wdog1 {\n+\tstatus = \"disabled\";\n+};\n+\n+&wdog2 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_wdog>;\n+\tfsl,ext-reset-output;\n+\tstatus = \"okay\";\n+};\n", "prefixes": [ "U-Boot", "v7", "02/17" ] }