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GET /api/patches/750538/?format=api
{ "id": 750538, "url": "http://patchwork.ozlabs.org/api/patches/750538/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170413084555.6962-2-alice.michael@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170413084555.6962-2-alice.michael@intel.com>", "list_archive_url": null, "date": "2017-04-13T08:45:45", "name": "[next,S70,02/12] i40e: DCR 287 new AQ commands", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "23d4b8f1efcb25faa6ca3bdd18803fafc0796989", "submitter": { "id": 71123, "url": "http://patchwork.ozlabs.org/api/people/71123/?format=api", "name": "Michael, Alice", "email": "alice.michael@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170413084555.6962-2-alice.michael@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/750538/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/750538/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3w3mvd0Jgcz9sDG\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 14 Apr 2017 02:48:45 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 384628A693;\n\tThu, 13 Apr 2017 16:48:42 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id HB0+l1UAP2xJ; Thu, 13 Apr 2017 16:48:36 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 6B3CE8A685;\n\tThu, 13 Apr 2017 16:48:36 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id D392F1C275D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 13 Apr 2017 16:48:31 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id CB80889BDE\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 13 Apr 2017 16:48:31 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id VChJxNcNEmc4 for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 13 Apr 2017 16:48:29 +0000 (UTC)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id CA43A89BEC\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 13 Apr 2017 16:48:29 +0000 (UTC)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t13 Apr 2017 09:48:28 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.16.121])\n\tby orsmga002.jf.intel.com with ESMTP; 13 Apr 2017 09:48:28 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.37,195,1488873600\"; d=\"scan'208\";a=\"73711312\"", "From": "Alice Michael <alice.michael@intel.com>", "To": "alice.michael@intel.com,\n\tintel-wired-lan@lists.osuosl.org", "Date": "Thu, 13 Apr 2017 04:45:45 -0400", "Message-Id": "<20170413084555.6962-2-alice.michael@intel.com>", "X-Mailer": "git-send-email 2.9.3", "In-Reply-To": "<20170413084555.6962-1-alice.michael@intel.com>", "References": "<20170413084555.6962-1-alice.michael@intel.com>", "Cc": "Jingjing Wu <jingjing.wu@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S70 02/12] i40e: DCR 287 new AQ\n\tcommands", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Jingjing Wu <jingjing.wu@intel.com>\n\nAdd admin queue functions for Pipeline Personalization Profile AQ\ncommands defined in DCR 287:\n - Write Recipe Command buffer (Opcode: 0x0270)\n - Get Applied Profiles list (Opcode: 0x0271)\n\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\nChange-ID: I558b4145364140f624013af48d4bbf79d21ebb0d\n---\n drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h | 34 ++++\n drivers/net/ethernet/intel/i40e/i40e_common.c | 212 +++++++++++++++++++++\n drivers/net/ethernet/intel/i40e/i40e_prototype.h | 17 ++\n drivers/net/ethernet/intel/i40e/i40e_type.h | 80 ++++++++\n .../net/ethernet/intel/i40evf/i40e_adminq_cmd.h | 34 ++++\n drivers/net/ethernet/intel/i40evf/i40e_common.c | 212 +++++++++++++++++++++\n drivers/net/ethernet/intel/i40evf/i40e_prototype.h | 17 ++\n drivers/net/ethernet/intel/i40evf/i40e_type.h | 80 ++++++++\n 8 files changed, 686 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\nindex 251074c..5eb0411 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n@@ -190,6 +190,10 @@ enum i40e_admin_queue_opc {\n \ti40e_aqc_opc_add_mirror_rule\t= 0x0260,\n \ti40e_aqc_opc_delete_mirror_rule\t= 0x0261,\n \n+\t/* Pipeline Personalization Profile */\n+\ti40e_aqc_opc_write_personalization_profile\t= 0x0270,\n+\ti40e_aqc_opc_get_personalization_profile_list\t= 0x0271,\n+\n \t/* DCB commands */\n \ti40e_aqc_opc_dcb_ignore_pfc\t= 0x0301,\n \ti40e_aqc_opc_dcb_updated\t= 0x0302,\n@@ -1431,6 +1435,36 @@ struct i40e_aqc_add_delete_mirror_rule_completion {\n \n I40E_CHECK_CMD_LENGTH(i40e_aqc_add_delete_mirror_rule_completion);\n \n+/* Pipeline Personalization Profile */\n+struct i40e_aqc_write_personalization_profile {\n+\tu8 flags;\n+\tu8 reserved[3];\n+\t__le32 profile_track_id;\n+\t__le32 addr_high;\n+\t__le32 addr_low;\n+};\n+\n+I40E_CHECK_CMD_LENGTH(i40e_aqc_write_personalization_profile);\n+\n+struct i40e_aqc_write_ppp_resp {\n+\t__le32 error_offset;\n+\t__le32 error_info;\n+\t__le32 addr_high;\n+\t__le32 addr_low;\n+};\n+\n+struct i40e_aqc_get_applied_profiles {\n+\tu8 flags;\n+#define I40E_AQC_GET_PPP_GET_CONF\t0x1\n+#define I40E_AQC_GET_PPP_GET_RDPU_CONF\t0x2\n+\tu8 rsv[3];\n+\t__le32 reserved;\n+\t__le32 addr_high;\n+\t__le32 addr_low;\n+};\n+\n+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_applied_profiles);\n+\n /* DCB 0x03xx*/\n \n /* PFC Ignore (direct 0x0301)\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c\nindex f9db95a..72d1793 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_common.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c\n@@ -5042,3 +5042,215 @@ void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)\n \tif (status || use_register)\n \t\twr32(hw, reg_addr, reg_val);\n }\n+\n+/**\n+ * i40e_aq_write_ppp - Write pipeline personalization profile (ppp)\n+ * @hw: pointer to the hw struct\n+ * @buff: command buffer (size in bytes = buff_size)\n+ * @buff_size: buffer size in bytes\n+ * @track_id: package tracking id\n+ * @error_offset: returns error offset\n+ * @error_info: returns error information\n+ * @cmd_details: pointer to command details structure or NULL\n+ **/\n+enum\n+i40e_status_code i40e_aq_write_ppp(struct i40e_hw *hw, void *buff,\n+\t\t\t\t u16 buff_size, u32 track_id,\n+\t\t\t\t u32 *error_offset, u32 *error_info,\n+\t\t\t\t struct i40e_asq_cmd_details *cmd_details)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_write_personalization_profile *cmd =\n+\t\t(struct i40e_aqc_write_personalization_profile *)\n+\t\t&desc.params.raw;\n+\tstruct i40e_aqc_write_ppp_resp *resp;\n+\ti40e_status status;\n+\n+\ti40e_fill_default_direct_cmd_desc(&desc,\n+\t\t\t\t\t i40e_aqc_opc_write_personalization_profile);\n+\n+\tdesc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD);\n+\tif (buff_size > I40E_AQ_LARGE_BUF)\n+\t\tdesc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);\n+\n+\tdesc.datalen = cpu_to_le16(buff_size);\n+\n+\tcmd->profile_track_id = cpu_to_le32(track_id);\n+\n+\tstatus = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);\n+\tif (!status) {\n+\t\tresp = (struct i40e_aqc_write_ppp_resp *)&desc.params.raw;\n+\t\tif (error_offset)\n+\t\t\t*error_offset = le32_to_cpu(resp->error_offset);\n+\t\tif (error_info)\n+\t\t\t*error_info = le32_to_cpu(resp->error_info);\n+\t}\n+\n+\treturn status;\n+}\n+\n+/**\n+ * i40e_aq_get_ppp_list - Read pipeline personalization profile (ppp)\n+ * @hw: pointer to the hw struct\n+ * @buff: command buffer (size in bytes = buff_size)\n+ * @buff_size: buffer size in bytes\n+ * @cmd_details: pointer to command details structure or NULL\n+ **/\n+enum\n+i40e_status_code i40e_aq_get_ppp_list(struct i40e_hw *hw, void *buff,\n+\t\t\t\t u16 buff_size, u8 flags,\n+\t\t\t\t struct i40e_asq_cmd_details *cmd_details)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_get_applied_profiles *cmd =\n+\t\t(struct i40e_aqc_get_applied_profiles *)&desc.params.raw;\n+\ti40e_status status;\n+\n+\ti40e_fill_default_direct_cmd_desc(&desc,\n+\t\t\t\t\t i40e_aqc_opc_get_personalization_profile_list);\n+\n+\tdesc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);\n+\tif (buff_size > I40E_AQ_LARGE_BUF)\n+\t\tdesc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);\n+\tdesc.datalen = cpu_to_le16(buff_size);\n+\n+\tcmd->flags = flags;\n+\n+\tstatus = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * i40e_find_segment_in_package\n+ * @segment_type: the segment type to search for (i.e., SEGMENT_TYPE_I40E)\n+ * @pkg_hdr: pointer to the package header to be searched\n+ *\n+ * This function searches a package file for a particular segment type. On\n+ * success it returns a pointer to the segment header, otherwise it will\n+ * return NULL.\n+ **/\n+struct i40e_generic_seg_header *\n+i40e_find_segment_in_package(u32 segment_type,\n+\t\t\t struct i40e_package_header *pkg_hdr)\n+{\n+\tstruct i40e_generic_seg_header *segment;\n+\tu32 i;\n+\n+\t/* Search all package segments for the requested segment type */\n+\tfor (i = 0; i < pkg_hdr->segment_count; i++) {\n+\t\tsegment =\n+\t\t\t(struct i40e_generic_seg_header *)((u8 *)pkg_hdr +\n+\t\t\t pkg_hdr->segment_offset[i]);\n+\n+\t\tif (segment->type == segment_type)\n+\t\t\treturn segment;\n+\t}\n+\n+\treturn NULL;\n+}\n+\n+/**\n+ * i40e_write_profile\n+ * @hw: pointer to the hardware structure\n+ * @profile: pointer to the profile segment of the package to be downloaded\n+ * @track_id: package tracking id\n+ *\n+ * Handles the download of a complete package.\n+ */\n+enum i40e_status_code\n+i40e_write_profile(struct i40e_hw *hw, struct i40e_profile_segment *profile,\n+\t\t u32 track_id)\n+{\n+\ti40e_status status = 0;\n+\tstruct i40e_section_table *sec_tbl;\n+\tstruct i40e_profile_section_header *sec = NULL;\n+\tu32 dev_cnt;\n+\tu32 vendor_dev_id;\n+\tu32 *nvm;\n+\tu32 section_size = 0;\n+\tu32 offset = 0, info = 0;\n+\tu32 i;\n+\n+\tif (!track_id) {\n+\t\ti40e_debug(hw, I40E_DEBUG_PACKAGE, \"Track_id can't be 0.\");\n+\t\treturn I40E_NOT_SUPPORTED;\n+\t}\n+\n+\tdev_cnt = profile->device_table_count;\n+\n+\tfor (i = 0; i < dev_cnt; i++) {\n+\t\tvendor_dev_id = profile->device_table[i].vendor_dev_id;\n+\t\tif ((vendor_dev_id >> 16) == PCI_VENDOR_ID_INTEL)\n+\t\t\tif (hw->device_id == (vendor_dev_id & 0xFFFF))\n+\t\t\t\tbreak;\n+\t}\n+\tif (i == dev_cnt) {\n+\t\ti40e_debug(hw, I40E_DEBUG_PACKAGE, \"Device doesn't support PPP\");\n+\t\treturn I40E_ERR_DEVICE_NOT_SUPPORTED;\n+\t}\n+\n+\tnvm = (u32 *)&profile->device_table[dev_cnt];\n+\tsec_tbl = (struct i40e_section_table *)&nvm[nvm[0] + 1];\n+\n+\tfor (i = 0; i < sec_tbl->section_count; i++) {\n+\t\tsec = (struct i40e_profile_section_header *)((u8 *)profile +\n+\t\t\t\t\t sec_tbl->section_offset[i]);\n+\n+\t\t/* Skip 'AQ', 'note' and 'name' sections */\n+\t\tif (sec->section.type != SECTION_TYPE_MMIO)\n+\t\t\tcontinue;\n+\n+\t\tsection_size = sec->section.size +\n+\t\t\tsizeof(struct i40e_profile_section_header);\n+\n+\t\t/* Write profile */\n+\t\tstatus = i40e_aq_write_ppp(hw, (void *)sec, (u16)section_size,\n+\t\t\t\t\t track_id, &offset, &info, NULL);\n+\t\tif (status) {\n+\t\t\ti40e_debug(hw, I40E_DEBUG_PACKAGE,\n+\t\t\t\t \"Failed to write profile: offset %d, info %d\",\n+\t\t\t\t offset, info);\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\treturn status;\n+}\n+\n+/**\n+ * i40e_add_pinfo_to_list\n+ * @hw: pointer to the hardware structure\n+ * @profile: pointer to the profile segment of the package\n+ * @profile_info_sec: buffer for information section\n+ * @track_id: package tracking id\n+ *\n+ * Register a profile to the list of loaded profiles.\n+ */\n+enum i40e_status_code\n+i40e_add_pinfo_to_list(struct i40e_hw *hw,\n+\t\t struct i40e_profile_segment *profile,\n+\t\t u8 *profile_info_sec, u32 track_id)\n+{\n+\ti40e_status status = 0;\n+\tstruct i40e_profile_section_header *sec = NULL;\n+\tstruct i40e_profile_info *pinfo;\n+\tu32 offset = 0, info = 0;\n+\n+\tsec = (struct i40e_profile_section_header *)profile_info_sec;\n+\tsec->tbl_size = 1;\n+\tsec->data_end = sizeof(struct i40e_profile_section_header) +\n+\t\t\tsizeof(struct i40e_profile_info);\n+\tsec->section.type = SECTION_TYPE_INFO;\n+\tsec->section.offset = sizeof(struct i40e_profile_section_header);\n+\tsec->section.size = sizeof(struct i40e_profile_info);\n+\tpinfo = (struct i40e_profile_info *)(profile_info_sec +\n+\t\t\t\t\t sec->section.offset);\n+\tpinfo->track_id = track_id;\n+\tpinfo->version = profile->version;\n+\tpinfo->op = I40E_PPP_ADD_TRACKID;\n+\tmemcpy(pinfo->name, profile->name, I40E_PPP_NAME_SIZE);\n+\n+\tstatus = i40e_aq_write_ppp(hw, (void *)sec, sec->data_end,\n+\t\t\t\t track_id, &offset, &info, NULL);\n+\treturn status;\n+}\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h\nindex dfc5e59..611bbc7 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h\n@@ -377,4 +377,21 @@ i40e_status i40e_write_phy_register(struct i40e_hw *hw, u8 page, u16 reg,\n u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num);\n i40e_status i40e_blink_phy_link_led(struct i40e_hw *hw,\n \t\t\t\t u32 time, u32 interval);\n+i40e_status i40e_aq_write_ppp(struct i40e_hw *hw, void *buff,\n+\t\t\t u16 buff_size, u32 track_id,\n+\t\t\t\tu32 *error_offset, u32 *error_info,\n+\t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n+i40e_status i40e_aq_get_ppp_list(struct i40e_hw *hw, void *buff,\n+\t\t\t\t u16 buff_size, u8 flags,\n+\t\t\t\t struct i40e_asq_cmd_details *cmd_details);\n+struct i40e_generic_seg_header *\n+i40e_find_segment_in_package(u32 segment_type,\n+\t\t\t struct i40e_package_header *pkg_header);\n+enum i40e_status_code\n+i40e_write_profile(struct i40e_hw *hw, struct i40e_profile_segment *i40e_seg,\n+\t\t u32 track_id);\n+enum i40e_status_code\n+i40e_add_pinfo_to_list(struct i40e_hw *hw,\n+\t\t struct i40e_profile_segment *profile,\n+\t\t u8 *profile_info_sec, u32 track_id);\n #endif /* _I40E_PROTOTYPE_H_ */\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h\nindex 08364a4..f235899 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_type.h\n@@ -78,6 +78,7 @@ enum i40e_debug_mask {\n \tI40E_DEBUG_DCB\t\t\t= 0x00000400,\n \tI40E_DEBUG_DIAG\t\t\t= 0x00000800,\n \tI40E_DEBUG_FD\t\t\t= 0x00001000,\n+\tI40E_DEBUG_PACKAGE\t\t= 0x00002000,\n \tI40E_DEBUG_IWARP\t\t= 0x00F00000,\n \tI40E_DEBUG_AQ_MESSAGE\t\t= 0x01000000,\n \tI40E_DEBUG_AQ_DESCRIPTOR\t= 0x02000000,\n@@ -1465,4 +1466,83 @@ struct i40e_lldp_variables {\n #define I40E_FLEX_56_MASK\t\t(0x1ULL << I40E_FLEX_56_SHIFT)\n #define I40E_FLEX_57_SHIFT\t\t6\n #define I40E_FLEX_57_MASK\t\t(0x1ULL << I40E_FLEX_57_SHIFT)\n+\n+/* Version format for PPP */\n+struct i40e_ppp_version {\n+\tu8 major;\n+\tu8 minor;\n+\tu8 update;\n+\tu8 draft;\n+};\n+\n+#define I40E_PPP_NAME_SIZE\t32\n+\n+/* Package header */\n+struct i40e_package_header {\n+\tstruct i40e_ppp_version version;\n+\tu32 segment_count;\n+\tu32 segment_offset[1];\n+};\n+\n+/* Generic segment header */\n+struct i40e_generic_seg_header {\n+#define SEGMENT_TYPE_METADATA\t0x00000001\n+#define SEGMENT_TYPE_NOTES\t0x00000002\n+#define SEGMENT_TYPE_I40E\t0x00000011\n+#define SEGMENT_TYPE_X722\t0x00000012\n+\tu32 type;\n+\tstruct i40e_ppp_version version;\n+\tu32 size;\n+\tchar name[I40E_PPP_NAME_SIZE];\n+};\n+\n+struct i40e_metadata_segment {\n+\tstruct i40e_generic_seg_header header;\n+\tstruct i40e_ppp_version version;\n+\tu32 track_id;\n+\tchar name[I40E_PPP_NAME_SIZE];\n+};\n+\n+struct i40e_device_id_entry {\n+\tu32 vendor_dev_id;\n+\tu32 sub_vendor_dev_id;\n+};\n+\n+struct i40e_profile_segment {\n+\tstruct i40e_generic_seg_header header;\n+\tstruct i40e_ppp_version version;\n+\tchar name[I40E_PPP_NAME_SIZE];\n+\tu32 device_table_count;\n+\tstruct i40e_device_id_entry device_table[1];\n+};\n+\n+struct i40e_section_table {\n+\tu32 section_count;\n+\tu32 section_offset[1];\n+};\n+\n+struct i40e_profile_section_header {\n+\tu16 tbl_size;\n+\tu16 data_end;\n+\tstruct {\n+#define SECTION_TYPE_INFO\t0x00000010\n+#define SECTION_TYPE_MMIO\t0x00000800\n+#define SECTION_TYPE_AQ\t\t0x00000801\n+#define SECTION_TYPE_NOTE\t0x80000000\n+#define SECTION_TYPE_NAME\t0x80000001\n+\t\tu32 type;\n+\t\tu32 offset;\n+\t\tu32 size;\n+\t} section;\n+};\n+\n+struct i40e_profile_info {\n+\tu32 track_id;\n+\tstruct i40e_ppp_version version;\n+\tu8 op;\n+#define I40E_PPP_ADD_TRACKID\t\t0x01\n+#define I40E_PPP_REMOVE_TRACKID\t0x02\n+\tu8 reserved[7];\n+\tu8 name[I40E_PPP_NAME_SIZE];\n+};\n #endif /* _I40E_TYPE_H_ */\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\nindex c28cb8f..91d8786 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n@@ -190,6 +190,10 @@ enum i40e_admin_queue_opc {\n \ti40e_aqc_opc_add_mirror_rule\t= 0x0260,\n \ti40e_aqc_opc_delete_mirror_rule\t= 0x0261,\n \n+\t/* Pipeline Personalization Profile */\n+\ti40e_aqc_opc_write_personalization_profile\t= 0x0270,\n+\ti40e_aqc_opc_get_personalization_profile_list\t= 0x0271,\n+\n \t/* DCB commands */\n \ti40e_aqc_opc_dcb_ignore_pfc\t= 0x0301,\n \ti40e_aqc_opc_dcb_updated\t= 0x0302,\n@@ -1426,6 +1430,36 @@ struct i40e_aqc_add_delete_mirror_rule_completion {\n \n I40E_CHECK_CMD_LENGTH(i40e_aqc_add_delete_mirror_rule_completion);\n \n+/* Pipeline Personalization Profile */\n+struct i40e_aqc_write_personalization_profile {\n+\tu8 flags;\n+\tu8 reserved[3];\n+\t__le32 profile_track_id;\n+\t__le32 addr_high;\n+\t__le32 addr_low;\n+};\n+\n+I40E_CHECK_CMD_LENGTH(i40e_aqc_write_personalization_profile);\n+\n+struct i40e_aqc_write_ppp_resp {\n+\t__le32 error_offset;\n+\t__le32 error_info;\n+\t__le32 addr_high;\n+\t__le32 addr_low;\n+};\n+\n+struct i40e_aqc_get_applied_profiles {\n+\tu8 flags;\n+#define I40E_AQC_GET_PPP_GET_CONF\t0x1\n+#define I40E_AQC_GET_PPP_GET_RDPU_CONF\t0x2\n+\tu8 rsv[3];\n+\t__le32 reserved;\n+\t__le32 addr_high;\n+\t__le32 addr_low;\n+};\n+\n+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_applied_profiles);\n+\n /* DCB 0x03xx*/\n \n /* PFC Ignore (direct 0x0301)\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_common.c b/drivers/net/ethernet/intel/i40evf/i40e_common.c\nindex 626fbf1..606f5f1 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_common.c\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_common.c\n@@ -1131,3 +1131,215 @@ i40e_status i40e_vf_reset(struct i40e_hw *hw)\n \treturn i40e_aq_send_msg_to_pf(hw, I40E_VIRTCHNL_OP_RESET_VF,\n \t\t\t\t 0, NULL, 0, NULL);\n }\n+\n+/**\n+ * i40evf_aq_write_ppp - Write pipeline personalization profile (ppp)\n+ * @hw: pointer to the hw struct\n+ * @buff: command buffer (size in bytes = buff_size)\n+ * @buff_size: buffer size in bytes\n+ * @track_id: package tracking id\n+ * @error_offset: returns error offset\n+ * @error_info: returns error information\n+ * @cmd_details: pointer to command details structure or NULL\n+ **/\n+enum\n+i40e_status_code i40evf_aq_write_ppp(struct i40e_hw *hw, void *buff,\n+\t\t\t\t u16 buff_size, u32 track_id,\n+\t\t\t\t u32 *error_offset, u32 *error_info,\n+\t\t\t\t struct i40e_asq_cmd_details *cmd_details)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_write_personalization_profile *cmd =\n+\t\t(struct i40e_aqc_write_personalization_profile *)\n+\t\t&desc.params.raw;\n+\tstruct i40e_aqc_write_ppp_resp *resp;\n+\ti40e_status status;\n+\n+\ti40evf_fill_default_direct_cmd_desc(&desc,\n+\t\t\t\t\t i40e_aqc_opc_write_personalization_profile);\n+\n+\tdesc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD);\n+\tif (buff_size > I40E_AQ_LARGE_BUF)\n+\t\tdesc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);\n+\n+\tdesc.datalen = cpu_to_le16(buff_size);\n+\n+\tcmd->profile_track_id = cpu_to_le32(track_id);\n+\n+\tstatus = i40evf_asq_send_command(hw, &desc, buff, buff_size, cmd_details);\n+\tif (!status) {\n+\t\tresp = (struct i40e_aqc_write_ppp_resp *)&desc.params.raw;\n+\t\tif (error_offset)\n+\t\t\t*error_offset = le32_to_cpu(resp->error_offset);\n+\t\tif (error_info)\n+\t\t\t*error_info = le32_to_cpu(resp->error_info);\n+\t}\n+\n+\treturn status;\n+}\n+\n+/**\n+ * i40evf_aq_get_ppp_list - Read pipeline personalization profile (ppp)\n+ * @hw: pointer to the hw struct\n+ * @buff: command buffer (size in bytes = buff_size)\n+ * @buff_size: buffer size in bytes\n+ * @cmd_details: pointer to command details structure or NULL\n+ **/\n+enum\n+i40e_status_code i40evf_aq_get_ppp_list(struct i40e_hw *hw, void *buff,\n+\t\t\t\t\tu16 buff_size, u8 flags,\n+\t\t\t\t struct i40e_asq_cmd_details *cmd_details)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_get_applied_profiles *cmd =\n+\t\t(struct i40e_aqc_get_applied_profiles *)&desc.params.raw;\n+\ti40e_status status;\n+\n+\ti40evf_fill_default_direct_cmd_desc(&desc,\n+\t\t\t\t\t i40e_aqc_opc_get_personalization_profile_list);\n+\n+\tdesc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);\n+\tif (buff_size > I40E_AQ_LARGE_BUF)\n+\t\tdesc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);\n+\tdesc.datalen = cpu_to_le16(buff_size);\n+\n+\tcmd->flags = flags;\n+\n+\tstatus = i40evf_asq_send_command(hw, &desc, buff, buff_size, cmd_details);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * i40evf_find_segment_in_package\n+ * @segment_type: the segment type to search for (i.e., SEGMENT_TYPE_I40E)\n+ * @pkg_hdr: pointer to the package header to be searched\n+ *\n+ * This function searches a package file for a particular segment type. On\n+ * success it returns a pointer to the segment header, otherwise it will\n+ * return NULL.\n+ **/\n+struct i40e_generic_seg_header *\n+i40evf_find_segment_in_package(u32 segment_type,\n+\t\t\t struct i40e_package_header *pkg_hdr)\n+{\n+\tstruct i40e_generic_seg_header *segment;\n+\tu32 i;\n+\n+\t/* Search all package segments for the requested segment type */\n+\tfor (i = 0; i < pkg_hdr->segment_count; i++) {\n+\t\tsegment =\n+\t\t\t(struct i40e_generic_seg_header *)((u8 *)pkg_hdr +\n+\t\t\t pkg_hdr->segment_offset[i]);\n+\n+\t\tif (segment->type == segment_type)\n+\t\t\treturn segment;\n+\t}\n+\n+\treturn NULL;\n+}\n+\n+/**\n+ * i40evf_write_profile\n+ * @hw: pointer to the hardware structure\n+ * @profile: pointer to the profile segment of the package to be downloaded\n+ * @track_id: package tracking id\n+ *\n+ * Handles the download of a complete package.\n+ */\n+enum i40e_status_code\n+i40evf_write_profile(struct i40e_hw *hw, struct i40e_profile_segment *profile,\n+\t\t u32 track_id)\n+{\n+\ti40e_status status = 0;\n+\tstruct i40e_section_table *sec_tbl;\n+\tstruct i40e_profile_section_header *sec = NULL;\n+\tu32 dev_cnt;\n+\tu32 vendor_dev_id;\n+\tu32 *nvm;\n+\tu32 section_size = 0;\n+\tu32 offset = 0, info = 0;\n+\tu32 i;\n+\n+\tif (!track_id) {\n+\t\ti40e_debug(hw, I40E_DEBUG_PACKAGE, \"Track_id can't be 0.\");\n+\t\treturn I40E_NOT_SUPPORTED;\n+\t}\n+\n+\tdev_cnt = profile->device_table_count;\n+\n+\tfor (i = 0; i < dev_cnt; i++) {\n+\t\tvendor_dev_id = profile->device_table[i].vendor_dev_id;\n+\t\tif ((vendor_dev_id >> 16) == PCI_VENDOR_ID_INTEL)\n+\t\t\tif (hw->device_id == (vendor_dev_id & 0xFFFF))\n+\t\t\t\tbreak;\n+\t}\n+\tif (i == dev_cnt) {\n+\t\ti40e_debug(hw, I40E_DEBUG_PACKAGE, \"Device doesn't support PPP\");\n+\t\treturn I40E_ERR_DEVICE_NOT_SUPPORTED;\n+\t}\n+\n+\tnvm = (u32 *)&profile->device_table[dev_cnt];\n+\tsec_tbl = (struct i40e_section_table *)&nvm[nvm[0] + 1];\n+\n+\tfor (i = 0; i < sec_tbl->section_count; i++) {\n+\t\tsec = (struct i40e_profile_section_header *)((u8 *)profile +\n+\t\t\t\t\t sec_tbl->section_offset[i]);\n+\n+\t\t/* Skip 'AQ', 'note' and 'name' sections */\n+\t\tif (sec->section.type != SECTION_TYPE_MMIO)\n+\t\t\tcontinue;\n+\n+\t\tsection_size = sec->section.size +\n+\t\t\tsizeof(struct i40e_profile_section_header);\n+\n+\t\t/* Write profile */\n+\t\tstatus = i40evf_aq_write_ppp(hw, (void *)sec, (u16)section_size,\n+\t\t\t\t\t track_id, &offset, &info, NULL);\n+\t\tif (status) {\n+\t\t\ti40e_debug(hw, I40E_DEBUG_PACKAGE,\n+\t\t\t\t \"Failed to write profile: offset %d, info %d\",\n+\t\t\t\t offset, info);\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\treturn status;\n+}\n+\n+/**\n+ * i40evf_add_pinfo_to_list\n+ * @hw: pointer to the hardware structure\n+ * @profile: pointer to the profile segment of the package\n+ * @profile_info_sec: buffer for information section\n+ * @track_id: package tracking id\n+ *\n+ * Register a profile to the list of loaded profiles.\n+ */\n+enum i40e_status_code\n+i40evf_add_pinfo_to_list(struct i40e_hw *hw,\n+\t\t\t struct i40e_profile_segment *profile,\n+\t\t\t u8 *profile_info_sec, u32 track_id)\n+{\n+\ti40e_status status = 0;\n+\tstruct i40e_profile_section_header *sec = NULL;\n+\tstruct i40e_profile_info *pinfo;\n+\tu32 offset = 0, info = 0;\n+\n+\tsec = (struct i40e_profile_section_header *)profile_info_sec;\n+\tsec->tbl_size = 1;\n+\tsec->data_end = sizeof(struct i40e_profile_section_header) +\n+\t\t\tsizeof(struct i40e_profile_info);\n+\tsec->section.type = SECTION_TYPE_INFO;\n+\tsec->section.offset = sizeof(struct i40e_profile_section_header);\n+\tsec->section.size = sizeof(struct i40e_profile_info);\n+\tpinfo = (struct i40e_profile_info *)(profile_info_sec +\n+\t\t\t\t\t sec->section.offset);\n+\tpinfo->track_id = track_id;\n+\tpinfo->version = profile->version;\n+\tpinfo->op = I40E_PPP_ADD_TRACKID;\n+\tmemcpy(pinfo->name, profile->name, I40E_PPP_NAME_SIZE);\n+\n+\tstatus = i40evf_aq_write_ppp(hw, (void *)sec, sec->data_end,\n+\t\t\t\t track_id, &offset, &info, NULL);\n+\treturn status;\n+}\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_prototype.h b/drivers/net/ethernet/intel/i40evf/i40e_prototype.h\nindex ba6c6bd..329ce2b 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_prototype.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_prototype.h\n@@ -122,4 +122,21 @@ i40e_status i40e_write_phy_register(struct i40e_hw *hw, u8 page, u16 reg,\n u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num);\n i40e_status i40e_blink_phy_link_led(struct i40e_hw *hw,\n \t\t\t\t u32 time, u32 interval);\n+i40e_status i40evf_aq_write_ppp(struct i40e_hw *hw, void *buff,\n+\t\t\t\tu16 buff_size, u32 track_id,\n+\t\t\t\tu32 *error_offset, u32 *error_info,\n+\t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n+i40e_status i40evf_aq_get_ppp_list(struct i40e_hw *hw, void *buff,\n+\t\t\t\t u16 buff_size, u8 flags,\n+\t\t\t\t struct i40e_asq_cmd_details *cmd_details);\n+struct i40e_generic_seg_header *\n+i40evf_find_segment_in_package(u32 segment_type,\n+\t\t\t struct i40e_package_header *pkg_header);\n+enum i40e_status_code\n+i40evf_write_profile(struct i40e_hw *hw, struct i40e_profile_segment *i40e_seg,\n+\t\t u32 track_id);\n+enum i40e_status_code\n+i40evf_add_pinfo_to_list(struct i40e_hw *hw,\n+\t\t\t struct i40e_profile_segment *profile,\n+\t\t\t u8 *profile_info_sec, u32 track_id);\n #endif /* _I40E_PROTOTYPE_H_ */\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_type.h b/drivers/net/ethernet/intel/i40evf/i40e_type.h\nindex 16bb880..44bb9f0 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_type.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_type.h\n@@ -78,6 +78,7 @@ enum i40e_debug_mask {\n \tI40E_DEBUG_DCB\t\t\t= 0x00000400,\n \tI40E_DEBUG_DIAG\t\t\t= 0x00000800,\n \tI40E_DEBUG_FD\t\t\t= 0x00001000,\n+\tI40E_DEBUG_PACKAGE\t\t= 0x00002000,\n \n \tI40E_DEBUG_AQ_MESSAGE\t\t= 0x01000000,\n \tI40E_DEBUG_AQ_DESCRIPTOR\t= 0x02000000,\n@@ -1396,4 +1397,83 @@ enum i40e_reset_type {\n #define I40E_FD_INSET_FLEX_WORD57_SHIFT\t\t10\n #define I40E_FD_INSET_FLEX_WORD57_MASK\t\t(0x1ULL << \\\n \t\t\t\t\tI40E_FD_INSET_FLEX_WORD57_SHIFT)\n+\n+/* Version format for PPP */\n+struct i40e_ppp_version {\n+\tu8 major;\n+\tu8 minor;\n+\tu8 update;\n+\tu8 draft;\n+};\n+\n+#define I40E_PPP_NAME_SIZE\t32\n+\n+/* Package header */\n+struct i40e_package_header {\n+\tstruct i40e_ppp_version version;\n+\tu32 segment_count;\n+\tu32 segment_offset[1];\n+};\n+\n+/* Generic segment header */\n+struct i40e_generic_seg_header {\n+#define SEGMENT_TYPE_METADATA\t0x00000001\n+#define SEGMENT_TYPE_NOTES\t0x00000002\n+#define SEGMENT_TYPE_I40E\t0x00000011\n+#define SEGMENT_TYPE_X722\t0x00000012\n+\tu32 type;\n+\tstruct i40e_ppp_version version;\n+\tu32 size;\n+\tchar name[I40E_PPP_NAME_SIZE];\n+};\n+\n+struct i40e_metadata_segment {\n+\tstruct i40e_generic_seg_header header;\n+\tstruct i40e_ppp_version version;\n+\tu32 track_id;\n+\tchar name[I40E_PPP_NAME_SIZE];\n+};\n+\n+struct i40e_device_id_entry {\n+\tu32 vendor_dev_id;\n+\tu32 sub_vendor_dev_id;\n+};\n+\n+struct i40e_profile_segment {\n+\tstruct i40e_generic_seg_header header;\n+\tstruct i40e_ppp_version version;\n+\tchar name[I40E_PPP_NAME_SIZE];\n+\tu32 device_table_count;\n+\tstruct i40e_device_id_entry device_table[1];\n+};\n+\n+struct i40e_section_table {\n+\tu32 section_count;\n+\tu32 section_offset[1];\n+};\n+\n+struct i40e_profile_section_header {\n+\tu16 tbl_size;\n+\tu16 data_end;\n+\tstruct {\n+#define SECTION_TYPE_INFO\t0x00000010\n+#define SECTION_TYPE_MMIO\t0x00000800\n+#define SECTION_TYPE_AQ\t\t0x00000801\n+#define SECTION_TYPE_NOTE\t0x80000000\n+#define SECTION_TYPE_NAME\t0x80000001\n+\t\tu32 type;\n+\t\tu32 offset;\n+\t\tu32 size;\n+\t} section;\n+};\n+\n+struct i40e_profile_info {\n+\tu32 track_id;\n+\tstruct i40e_ppp_version version;\n+\tu8 op;\n+#define I40E_PPP_ADD_TRACKID\t\t0x01\n+#define I40E_PPP_REMOVE_TRACKID\t0x02\n+\tu8 reserved[7];\n+\tu8 name[I40E_PPP_NAME_SIZE];\n+};\n #endif /* _I40E_TYPE_H_ */\n", "prefixes": [ "next", "S70", "02/12" ] }