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GET /api/patches/738797/?format=api
{ "id": 738797, "url": "http://patchwork.ozlabs.org/api/patches/738797/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1489511727-10959-6-git-send-email-bimmy.pujari@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1489511727-10959-6-git-send-email-bimmy.pujari@intel.com>", "list_archive_url": null, "date": "2017-03-14T17:15:27", "name": "[next,S63,6/6] i40e/i40evf: Change the way we limit the maximum frame size for Rx", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "78f55947438eed8a6501a752aaab03e2b00323c7", "submitter": { "id": 68919, "url": "http://patchwork.ozlabs.org/api/people/68919/?format=api", "name": "Pujari, Bimmy", "email": "bimmy.pujari@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1489511727-10959-6-git-send-email-bimmy.pujari@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/738797/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/738797/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3vjKdl2cM2z9s2Q\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 15 Mar 2017 03:17:47 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id CC62689780;\n\tTue, 14 Mar 2017 16:17:45 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id xunx4QzFjSB5; Tue, 14 Mar 2017 16:17:40 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 3BBC9896CF;\n\tTue, 14 Mar 2017 16:17:40 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id BB6691BFEBB\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 14 Mar 2017 16:17:37 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id B8AC58A209\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 14 Mar 2017 16:17:37 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 8AoTvz4zFAKB for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 14 Mar 2017 16:17:36 +0000 (UTC)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id C06268A1F3\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 14 Mar 2017 16:17:36 +0000 (UTC)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t14 Mar 2017 09:17:35 -0700", "from bimmy.jf.intel.com (HELO bimmy.linux1.jf.intel.com)\n\t([10.166.35.87])\n\tby orsmga001.jf.intel.com with ESMTP; 14 Mar 2017 09:17:35 -0700" ], "Authentication-Results": "ozlabs.org;\n\tdkim=fail reason=\"key not found in DNS\" (0-bit key;\n\tunprotected) header.d=intel.com header.i=@intel.com\n\theader.b=\"Ysn0LgbF\"; dkim-atps=neutral", "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "DKIM-Signature": "v=1; a=rsa-sha256; c=simple/simple;\n\td=intel.com; i=@intel.com; q=dns/txt; s=intel;\n\tt=1489508256; x=1521044256;\n\th=from:to:cc:subject:date:message-id:in-reply-to: references;\n\tbh=Ca9FL+/cnu9815NKd2MocumUtOPcnSLW5VCskYiK1pQ=;\n\tb=Ysn0LgbFGaiIsJPCXU0nv/7WFIECZZIezUQ6sMf4guyHuJPNr73ov4bs\n\txZ0tUKnS8dcM9rBwsrGEea98RNDusA==;", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos; i=\"5.36,164,1486454400\"; d=\"scan'208\";\n\ta=\"1108362407\"", "From": "Bimmy Pujari <bimmy.pujari@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 14 Mar 2017 10:15:27 -0700", "Message-Id": "<1489511727-10959-6-git-send-email-bimmy.pujari@intel.com>", "X-Mailer": "git-send-email 2.4.11", "In-Reply-To": "<1489511727-10959-1-git-send-email-bimmy.pujari@intel.com>", "References": "<1489511727-10959-1-git-send-email-bimmy.pujari@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S63 6/6] i40e/i40evf: Change the way\n\twe limit the maximum frame size for Rx", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Alexander Duyck <alexander.h.duyck@intel.com>\n\nThis patch changes the way we handle the maximum frame size for the Rx\npath. Previously we were rounding up to 2K for a 1500 MTU and then brining\nthe max frame size down to MTU plus a fixed amount. With this patch\napplied what we now do is limit the maximum frame to 1.5K minus the value\nfor NET_IP_ALIGN for standard MTU, and for any MTU greater than 1500 we\nallow up to the maximum frame size. This makes the behavior more\nconsistent with the other drivers such as igb which had similar logic. In\naddition it reduces the test matrix for MTU since we only have two max\nframe sizes that are handled for Rx now.\n\nSigned-off-by: Alexander Duyck <alexander.h.duyck@intel.com>\nChange-ID: I23a9d3c857e7df04b0ef28c64df63e659c013f3f\n---\nTesting Hints:\n Verify MTU handling for MTU = 1500. You should be able to receive\n frames up to 1536 in size on a standard x86 system as NET_IP_ALIGN\n is 0.\n\n When jumbo frames are enabled you should be able to receive anything\n up to the maximum size supported by hardware which is 9.5K or 9726B\n in size.\n\n When the \"legacy-rx\" private flag is set you should be able to\n receive anything up to 9.5K in size.\n\n The behavior for MTU mismatches will change. A failing case is any\n in which we trigger a kernel panic. Receiving a frame larger than\n what was configured for the MTU is not a failure. \n\n drivers/net/ethernet/intel/i40e/i40e_main.c | 26 ++++++++++++----------\n drivers/net/ethernet/intel/i40e/i40e_txrx.h | 4 +---\n drivers/net/ethernet/intel/i40evf/i40e_txrx.h | 4 +---\n drivers/net/ethernet/intel/i40evf/i40evf.h | 4 ----\n drivers/net/ethernet/intel/i40evf/i40evf_main.c | 16 ++++++++++++-\n .../net/ethernet/intel/i40evf/i40evf_virtchnl.c | 14 ++++++++----\n 6 files changed, 41 insertions(+), 27 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex 4cfe9491..724a5a4 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -3002,7 +3002,8 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)\n \n \tring->rx_buf_len = vsi->rx_buf_len;\n \n-\trx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;\n+\trx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,\n+\t\t\t\t BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));\n \n \trx_ctx.base = (ring->dma / 128);\n \trx_ctx.qlen = ring->count;\n@@ -3082,17 +3083,18 @@ static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)\n \tint err = 0;\n \tu16 i;\n \n-\tif (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))\n-\t\tvsi->max_frame = vsi->netdev->mtu + ETH_HLEN\n-\t\t\t + ETH_FCS_LEN + VLAN_HLEN;\n-\telse\n-\t\tvsi->max_frame = I40E_RXBUFFER_2048;\n-\n-\tvsi->rx_buf_len = I40E_RXBUFFER_2048;\n-\n-\t/* round up for the chip's needs */\n-\tvsi->rx_buf_len = ALIGN(vsi->rx_buf_len,\n-\t\t\t\tBIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));\n+\tif (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {\n+\t\tvsi->max_frame = I40E_MAX_RXBUFFER;\n+\t\tvsi->rx_buf_len = I40E_RXBUFFER_2048;\n+#if (PAGE_SIZE < 8192)\n+\t} else if (vsi->netdev->mtu <= ETH_DATA_LEN) {\n+\t\tvsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;\n+\t\tvsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;\n+#endif\n+\t} else {\n+\t\tvsi->max_frame = I40E_MAX_RXBUFFER;\n+\t\tvsi->rx_buf_len = I40E_RXBUFFER_2048;\n+\t}\n \n \t/* set up individual rings */\n \tfor (i = 0; i < vsi->num_queue_pairs && !err; i++)\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h\nindex eb73372..d6609de 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h\n@@ -117,10 +117,8 @@ enum i40e_dyn_idx_t {\n \n /* Supported Rx Buffer Sizes (a multiple of 128) */\n #define I40E_RXBUFFER_256 256\n+#define I40E_RXBUFFER_1536 1536 /* 128B aligned standard Ethernet frame */\n #define I40E_RXBUFFER_2048 2048\n-#define I40E_RXBUFFER_3072 3072 /* For FCoE MTU of 2158 */\n-#define I40E_RXBUFFER_4096 4096\n-#define I40E_RXBUFFER_8192 8192\n #define I40E_MAX_RXBUFFER 9728 /* largest size for single descriptor */\n \n /* NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.h b/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\nindex aba40ed..3bb4d73 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.h\n@@ -104,10 +104,8 @@ enum i40e_dyn_idx_t {\n \n /* Supported Rx Buffer Sizes (a multiple of 128) */\n #define I40E_RXBUFFER_256 256\n+#define I40E_RXBUFFER_1536 1536 /* 128B aligned standard Ethernet frame */\n #define I40E_RXBUFFER_2048 2048\n-#define I40E_RXBUFFER_3072 3072 /* For FCoE MTU of 2158 */\n-#define I40E_RXBUFFER_4096 4096\n-#define I40E_RXBUFFER_8192 8192\n #define I40E_MAX_RXBUFFER 9728 /* largest size for single descriptor */\n \n /* NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40evf.h b/drivers/net/ethernet/intel/i40evf/i40evf.h\nindex e60cbfa..d61ecf6 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40evf.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40evf.h\n@@ -72,10 +72,6 @@ struct i40e_vsi {\n #define I40EVF_MAX_RXD\t\t4096\n #define I40EVF_MIN_RXD\t\t64\n #define I40EVF_REQ_DESCRIPTOR_MULTIPLE\t32\n-\n-/* Supported Rx Buffer Sizes */\n-#define I40EVF_RXBUFFER_2048\t2048\n-#define I40EVF_MAX_RXBUFFER\t16384 /* largest size for single descriptor */\n #define I40EVF_MAX_AQ_BUF_SIZE\t4096\n #define I40EVF_AQ_LEN\t\t32\n #define I40EVF_AQ_MAX_ERR\t20 /* times to try before resetting AQ */\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40evf_main.c b/drivers/net/ethernet/intel/i40evf/i40evf_main.c\nindex 6d666bd..fb2811c 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40evf_main.c\n+++ b/drivers/net/ethernet/intel/i40evf/i40evf_main.c\n@@ -686,12 +686,26 @@ static void i40evf_configure_tx(struct i40evf_adapter *adapter)\n **/\n static void i40evf_configure_rx(struct i40evf_adapter *adapter)\n {\n+\tunsigned int rx_buf_len = I40E_RXBUFFER_2048;\n+\tstruct net_device *netdev = adapter->netdev;\n \tstruct i40e_hw *hw = &adapter->hw;\n \tint i;\n \n+\t/* Legacy Rx will always default to a 2048 buffer size. */\n+#if (PAGE_SIZE < 8192)\n+\tif (!(adapter->flags & I40EVF_FLAG_LEGACY_RX)) {\n+\t\t/* We use a 1536 buffer size for configurations with\n+\t\t * standard Ethernet mtu. On x86 this gives us enough room\n+\t\t * for shared info and 192 bytes of padding.\n+\t\t */\n+\t\tif (netdev->mtu <= ETH_DATA_LEN)\n+\t\t\trx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;\n+\t}\n+#endif\n+\n \tfor (i = 0; i < adapter->num_active_queues; i++) {\n \t\tadapter->rx_rings[i].tail = hw->hw_addr + I40E_QRX_TAIL1(i);\n-\t\tadapter->rx_rings[i].rx_buf_len = I40EVF_RXBUFFER_2048;\n+\t\tadapter->rx_rings[i].rx_buf_len = rx_buf_len;\n \t}\n }\n \ndiff --git a/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c b/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c\nindex 4bc2488..032be8d 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c\n+++ b/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c\n@@ -234,7 +234,7 @@ void i40evf_configure_queues(struct i40evf_adapter *adapter)\n \tstruct i40e_virtchnl_vsi_queue_config_info *vqci;\n \tstruct i40e_virtchnl_queue_pair_info *vqpi;\n \tint pairs = adapter->num_active_queues;\n-\tint i, len;\n+\tint i, len, max_frame = I40E_MAX_RXBUFFER;\n \n \tif (adapter->current_op != I40E_VIRTCHNL_OP_UNKNOWN) {\n \t\t/* bail because we already have a command pending */\n@@ -249,6 +249,11 @@ void i40evf_configure_queues(struct i40evf_adapter *adapter)\n \tif (!vqci)\n \t\treturn;\n \n+\t/* Limit maximum frame size when jumbo frames is not enabled */\n+\tif (!(adapter->flags & I40EVF_FLAG_LEGACY_RX) &&\n+\t (adapter->netdev->mtu <= ETH_DATA_LEN))\n+\t\tmax_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;\n+\n \tvqci->vsi_id = adapter->vsi_res->vsi_id;\n \tvqci->num_queue_pairs = pairs;\n \tvqpi = vqci->qpair;\n@@ -264,9 +269,10 @@ void i40evf_configure_queues(struct i40evf_adapter *adapter)\n \t\tvqpi->rxq.queue_id = i;\n \t\tvqpi->rxq.ring_len = adapter->rx_rings[i].count;\n \t\tvqpi->rxq.dma_ring_addr = adapter->rx_rings[i].dma;\n-\t\tvqpi->rxq.max_pkt_size = adapter->netdev->mtu\n-\t\t\t\t\t+ ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;\n-\t\tvqpi->rxq.databuffer_size = adapter->rx_rings[i].rx_buf_len;\n+\t\tvqpi->rxq.max_pkt_size = max_frame;\n+\t\tvqpi->rxq.databuffer_size =\n+\t\t\tALIGN(adapter->rx_rings[i].rx_buf_len,\n+\t\t\t BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));\n \t\tvqpi++;\n \t}\n \n", "prefixes": [ "next", "S63", "6/6" ] }