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GET /api/patches/724870/?format=api
{ "id": 724870, "url": "http://patchwork.ozlabs.org/api/patches/724870/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170207022659.9864.44658.stgit@localhost.localdomain/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170207022659.9864.44658.stgit@localhost.localdomain>", "list_archive_url": null, "date": "2017-02-07T02:27:03", "name": "[next,v5,09/12] igb: Add support for using order 1 pages to receive large frames", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "2c6bde2e85d5495eb2daf7b07a3cd0a4fb13a343", "submitter": { "id": 252, "url": "http://patchwork.ozlabs.org/api/people/252/?format=api", "name": "Alexander Duyck", "email": "alexander.duyck@gmail.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170207022659.9864.44658.stgit@localhost.localdomain/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/724870/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/724870/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3vHSsb2mJnz9s2P\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 7 Feb 2017 13:27:15 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id E53952CDF2;\n\tTue, 7 Feb 2017 02:27:13 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id pMwRlyDe0l50; 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\n\tMon, 06 Feb 2017 18:27:04 -0800 (PST)", "From": "Alexander Duyck <alexander.duyck@gmail.com>", "To": "intel-wired-lan@lists.osuosl.org, jeffrey.t.kirsher@intel.com", "Date": "Mon, 06 Feb 2017 18:27:03 -0800", "Message-ID": "<20170207022659.9864.44658.stgit@localhost.localdomain>", "In-Reply-To": "<20170207022339.9864.87863.stgit@localhost.localdomain>", "References": "<20170207022339.9864.87863.stgit@localhost.localdomain>", "User-Agent": "StGit/0.17.1-dirty", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [next PATCH v5 09/12] igb: Add support for using\n\torder 1 pages to receive large frames", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Alexander Duyck <alexander.h.duyck@intel.com>\n\nThis patch adds support for using 3K buffers in order 1 pages the same way\nwe were using 2K buffers in 4K pages. We are reserving 1K of room for now\nto have space available for future headroom and tailroom when we enable\nbuild_skb support.\n\nOne side effect of this patch is that we can end up using a larger buffer\nif jumbo frames is enabled. The impact shouldn't be too great, but it\ncould hurt small packet performance for UDP workloads if jumbo frames is\nenabled as the truesize of frames will be larger.\n\nSigned-off-by: Alexander Duyck <alexander.h.duyck@intel.com>\n---\nv4: Split this code out of patch 6 of the original series.\n\n drivers/net/ethernet/intel/igb/igb.h | 30 +++++++++++++-\n drivers/net/ethernet/intel/igb/igb_main.c | 64 +++++++++++++++++++++--------\n 2 files changed, 76 insertions(+), 18 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h\nindex bffdfe65a0b6..eb91c87e0c1d 100644\n--- a/drivers/net/ethernet/intel/igb/igb.h\n+++ b/drivers/net/ethernet/intel/igb/igb.h\n@@ -142,9 +142,9 @@ struct vf_data_storage {\n /* Supported Rx Buffer Sizes */\n #define IGB_RXBUFFER_256\t256\n #define IGB_RXBUFFER_2048\t2048\n+#define IGB_RXBUFFER_3072\t3072\n #define IGB_RX_HDR_LEN\t\tIGB_RXBUFFER_256\n #define IGB_TS_HDR_LEN\t\t16\n-#define IGB_RX_BUFSZ\t\tIGB_RXBUFFER_2048\n \n #define IGB_SKB_PAD\t\t(NET_SKB_PAD + NET_IP_ALIGN)\n #if (PAGE_SIZE < 8192)\n@@ -313,12 +313,40 @@ struct igb_q_vector {\n };\n \n enum e1000_ring_flags_t {\n+\tIGB_RING_FLAG_RX_3K_BUFFER,\n \tIGB_RING_FLAG_RX_SCTP_CSUM,\n \tIGB_RING_FLAG_RX_LB_VLAN_BSWAP,\n \tIGB_RING_FLAG_TX_CTX_IDX,\n \tIGB_RING_FLAG_TX_DETECT_HANG\n };\n \n+#define ring_uses_large_buffer(ring) \\\n+\ttest_bit(IGB_RING_FLAG_RX_3K_BUFFER, &(ring)->flags)\n+#define set_ring_uses_large_buffer(ring) \\\n+\tset_bit(IGB_RING_FLAG_RX_3K_BUFFER, &(ring)->flags)\n+#define clear_ring_uses_large_buffer(ring) \\\n+\tclear_bit(IGB_RING_FLAG_RX_3K_BUFFER, &(ring)->flags)\n+\n+static inline unsigned int igb_rx_bufsz(struct igb_ring *ring)\n+{\n+#if (PAGE_SIZE < 8192)\n+\tif (ring_uses_large_buffer(ring))\n+\t\treturn IGB_RXBUFFER_3072;\n+#endif\n+\treturn IGB_RXBUFFER_2048;\n+}\n+\n+static inline unsigned int igb_rx_pg_order(struct igb_ring *ring)\n+{\n+#if (PAGE_SIZE < 8192)\n+\tif (ring_uses_large_buffer(ring))\n+\t\treturn 1;\n+#endif\n+\treturn 0;\n+}\n+\n+#define igb_rx_pg_size(_ring) (PAGE_SIZE << igb_rx_pg_order(_ring))\n+\n #define IGB_TXD_DCMD (E1000_ADVTXD_DCMD_EOP | E1000_ADVTXD_DCMD_RS)\n \n #define IGB_RX_DESC(R, i)\t\\\ndiff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c\nindex c5cb93ebc633..bdc21b00943c 100644\n--- a/drivers/net/ethernet/intel/igb/igb_main.c\n+++ b/drivers/net/ethernet/intel/igb/igb_main.c\n@@ -554,7 +554,7 @@ static void igb_dump(struct igb_adapter *adapter)\n \t\t\t\t\t 16, 1,\n \t\t\t\t\t page_address(buffer_info->page) +\n \t\t\t\t\t\t buffer_info->page_offset,\n-\t\t\t\t\t IGB_RX_BUFSZ, true);\n+\t\t\t\t\t igb_rx_bufsz(rx_ring), true);\n \t\t\t\t}\n \t\t\t}\n \t\t}\n@@ -3746,7 +3746,10 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,\n \n \t/* set descriptor configuration */\n \tsrrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;\n-\tsrrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;\n+\tif (ring_uses_large_buffer(ring))\n+\t\tsrrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;\n+\telse\n+\t\tsrrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;\n \tsrrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;\n \tif (hw->mac.type >= e1000_82580)\n \t\tsrrctl |= E1000_SRRCTL_TIMESTAMP;\n@@ -3776,6 +3779,23 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,\n \twr32(E1000_RXDCTL(reg_idx), rxdctl);\n }\n \n+static void igb_set_rx_buffer_len(struct igb_adapter *adapter,\n+\t\t\t\t struct igb_ring *rx_ring)\n+{\n+\t/* set build_skb and buffer size flags */\n+\tclear_ring_uses_large_buffer(rx_ring);\n+\n+\tif (adapter->flags & IGB_FLAG_RX_LEGACY)\n+\t\treturn;\n+\n+#if (PAGE_SIZE < 8192)\n+\tif (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)\n+\t\treturn;\n+\n+\tset_ring_uses_large_buffer(rx_ring);\n+#endif\n+}\n+\n /**\n * igb_configure_rx - Configure receive Unit after Reset\n * @adapter: board private structure\n@@ -3793,8 +3813,12 @@ static void igb_configure_rx(struct igb_adapter *adapter)\n \t/* Setup the HW Rx Head and Tail Descriptor Pointers and\n \t * the Base and Length of the Rx Descriptor Ring\n \t */\n-\tfor (i = 0; i < adapter->num_rx_queues; i++)\n-\t\tigb_configure_rx_ring(adapter, adapter->rx_ring[i]);\n+\tfor (i = 0; i < adapter->num_rx_queues; i++) {\n+\t\tstruct igb_ring *rx_ring = adapter->rx_ring[i];\n+\n+\t\tigb_set_rx_buffer_len(adapter, rx_ring);\n+\t\tigb_configure_rx_ring(adapter, rx_ring);\n+\t}\n }\n \n /**\n@@ -3969,13 +3993,13 @@ static void igb_clean_rx_ring(struct igb_ring *rx_ring)\n \t\tdma_sync_single_range_for_cpu(rx_ring->dev,\n \t\t\t\t\t buffer_info->dma,\n \t\t\t\t\t buffer_info->page_offset,\n-\t\t\t\t\t IGB_RX_BUFSZ,\n+\t\t\t\t\t igb_rx_bufsz(rx_ring),\n \t\t\t\t\t DMA_FROM_DEVICE);\n \n \t\t/* free resources associated with mapping */\n \t\tdma_unmap_page_attrs(rx_ring->dev,\n \t\t\t\t buffer_info->dma,\n-\t\t\t\t PAGE_SIZE,\n+\t\t\t\t igb_rx_pg_size(rx_ring),\n \t\t\t\t DMA_FROM_DEVICE,\n \t\t\t\t IGB_RX_DMA_ATTR);\n \t\t__page_frag_cache_drain(buffer_info->page,\n@@ -6872,7 +6896,7 @@ static inline bool igb_page_is_reserved(struct page *page)\n \n static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,\n \t\t\t\t struct page *page,\n-\t\t\t\t unsigned int truesize)\n+\t\t\t\t const unsigned int truesize)\n {\n \tunsigned int pagecnt_bias = rx_buffer->pagecnt_bias--;\n \n@@ -6886,12 +6910,14 @@ static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,\n \t\treturn false;\n \n \t/* flip page offset to other buffer */\n-\trx_buffer->page_offset ^= IGB_RX_BUFSZ;\n+\trx_buffer->page_offset ^= truesize;\n #else\n \t/* move offset up to the next cache line */\n \trx_buffer->page_offset += truesize;\n+#define IGB_LAST_OFFSET \\\n+\t(SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)\n \n-\tif (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))\n+\tif (rx_buffer->page_offset > IGB_LAST_OFFSET)\n \t\treturn false;\n #endif\n \n@@ -6931,7 +6957,7 @@ static bool igb_add_rx_frag(struct igb_ring *rx_ring,\n \tstruct page *page = rx_buffer->page;\n \tvoid *va = page_address(page) + rx_buffer->page_offset;\n #if (PAGE_SIZE < 8192)\n-\tunsigned int truesize = IGB_RX_BUFSZ;\n+\tunsigned int truesize = igb_rx_pg_size(rx_ring) / 2;\n #else\n \tunsigned int truesize = SKB_DATA_ALIGN(size);\n #endif\n@@ -7027,7 +7053,7 @@ static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,\n \t\t * any references we are holding to it\n \t\t */\n \t\tdma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,\n-\t\t\t\t PAGE_SIZE, DMA_FROM_DEVICE,\n+\t\t\t\t igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,\n \t\t\t\t IGB_RX_DMA_ATTR);\n \t\t__page_frag_cache_drain(page, rx_buffer->pagecnt_bias);\n \t}\n@@ -7280,21 +7306,23 @@ static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,\n \t\treturn true;\n \n \t/* alloc new page for storage */\n-\tpage = dev_alloc_page();\n+\tpage = dev_alloc_pages(igb_rx_pg_order(rx_ring));\n \tif (unlikely(!page)) {\n \t\trx_ring->rx_stats.alloc_failed++;\n \t\treturn false;\n \t}\n \n \t/* map page for use */\n-\tdma = dma_map_page_attrs(rx_ring->dev, page, 0, PAGE_SIZE,\n-\t\t\t\t DMA_FROM_DEVICE, IGB_RX_DMA_ATTR);\n+\tdma = dma_map_page_attrs(rx_ring->dev, page, 0,\n+\t\t\t\t igb_rx_pg_size(rx_ring),\n+\t\t\t\t DMA_FROM_DEVICE,\n+\t\t\t\t IGB_RX_DMA_ATTR);\n \n \t/* if mapping failed free memory back to system since\n \t * there isn't much point in holding memory we can't use\n \t */\n \tif (dma_mapping_error(rx_ring->dev, dma)) {\n-\t\t__free_page(page);\n+\t\t__free_pages(page, igb_rx_pg_order(rx_ring));\n \n \t\trx_ring->rx_stats.alloc_failed++;\n \t\treturn false;\n@@ -7317,6 +7345,7 @@ void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)\n \tunion e1000_adv_rx_desc *rx_desc;\n \tstruct igb_rx_buffer *bi;\n \tu16 i = rx_ring->next_to_use;\n+\tu16 bufsz;\n \n \t/* nothing to do */\n \tif (!cleaned_count)\n@@ -7326,14 +7355,15 @@ void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)\n \tbi = &rx_ring->rx_buffer_info[i];\n \ti -= rx_ring->count;\n \n+\tbufsz = igb_rx_bufsz(rx_ring);\n+\n \tdo {\n \t\tif (!igb_alloc_mapped_page(rx_ring, bi))\n \t\t\tbreak;\n \n \t\t/* sync the buffer for use by the device */\n \t\tdma_sync_single_range_for_device(rx_ring->dev, bi->dma,\n-\t\t\t\t\t\t bi->page_offset,\n-\t\t\t\t\t\t IGB_RX_BUFSZ,\n+\t\t\t\t\t\t bi->page_offset, bufsz,\n \t\t\t\t\t\t DMA_FROM_DEVICE);\n \n \t\t/* Refresh the desc even if buffer_addrs didn't change\n", "prefixes": [ "next", "v5", "09/12" ] }