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GET /api/patches/716308/?format=api
{ "id": 716308, "url": "http://patchwork.ozlabs.org/api/patches/716308/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170117163620.5423.4591.stgit@localhost.localdomain/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170117163620.5423.4591.stgit@localhost.localdomain>", "list_archive_url": null, "date": "2017-01-17T16:36:28", "name": "[next,v2,06/11] ixgbe: Use length to determine if descriptor is done", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "5e45745a9db78f2466ed05cc9e9013d0531a8f08", "submitter": { "id": 252, "url": "http://patchwork.ozlabs.org/api/people/252/?format=api", "name": "Alexander Duyck", "email": "alexander.duyck@gmail.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170117163620.5423.4591.stgit@localhost.localdomain/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/716308/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/716308/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3v2wt41V4Kz9s65\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 18 Jan 2017 03:44:12 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 7A9B5307FA;\n\tTue, 17 Jan 2017 16:44:10 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 8pBgmyH+pP5a; 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\n\tTue, 17 Jan 2017 08:36:29 -0800 (PST)", "From": "Alexander Duyck <alexander.duyck@gmail.com>", "To": "intel-wired-lan@lists.osuosl.org, jeffrey.t.kirsher@intel.com", "Date": "Tue, 17 Jan 2017 08:36:28 -0800", "Message-ID": "<20170117163620.5423.4591.stgit@localhost.localdomain>", "In-Reply-To": "<20170117163401.5423.37993.stgit@localhost.localdomain>", "References": "<20170117163401.5423.37993.stgit@localhost.localdomain>", "User-Agent": "StGit/0.17.1-dirty", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [next PATCH v2 06/11] ixgbe: Use length to\n\tdetermine if descriptor is done", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Alexander Duyck <alexander.h.duyck@intel.com>\n\nThis change makes it so that we use the length of the packet instead of the\nDD status bit to determine if a new descriptor is ready to be processed.\nThe obvious advantage is that it cuts down on reads as we don't really even\nneed the DD bit if going from a 0 to a non-zero value on size is enough to\ninform us that the packet has been completed.\n\nSigned-off-by: Alexander Duyck <alexander.h.duyck@intel.com>\n---\n\nv2: Update ethtool loopback test to use length check instead of DD check\n\n drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 2 +-\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 14 ++++++++------\n 2 files changed, 9 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c\nindex aa80ece9ea96..ab189fc09298 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c\n@@ -1909,7 +1909,7 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,\n \ttx_ntc = tx_ring->next_to_clean;\n \trx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);\n \n-\twhile (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD)) {\n+\twhile (rx_desc->wb.upper.length) {\n \t\t/* check Rx buffer */\n \t\trx_buffer = &rx_ring->rx_buffer_info[rx_ntc];\n \ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex 5e210fb71366..c93921256f2e 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -1653,8 +1653,8 @@ void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)\n \t\t\ti -= rx_ring->count;\n \t\t}\n \n-\t\t/* clear the status bits for the next_to_use descriptor */\n-\t\trx_desc->wb.upper.status_error = 0;\n+\t\t/* clear the length for the next_to_use descriptor */\n+\t\trx_desc->wb.upper.length = 0;\n \n \t\tcleaned_count--;\n \t} while (cleaned_count);\n@@ -2171,7 +2171,7 @@ static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,\n \n \t\trx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);\n \n-\t\tif (!rx_desc->wb.upper.status_error)\n+\t\tif (!rx_desc->wb.upper.length)\n \t\t\tbreak;\n \n \t\t/* This memory barrier is needed to keep us from reading\n@@ -3750,6 +3750,7 @@ void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,\n \t\t\t struct ixgbe_ring *ring)\n {\n \tstruct ixgbe_hw *hw = &adapter->hw;\n+\tunion ixgbe_adv_rx_desc *rx_desc;\n \tu64 rdba = ring->dma;\n \tu32 rxdctl;\n \tu8 reg_idx = ring->reg_idx;\n@@ -3784,6 +3785,10 @@ void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,\n \t\trxdctl |= 0x080420;\n \t}\n \n+\t/* initialize Rx descriptor 0 */\n+\trx_desc = IXGBE_RX_DESC(ring, 0);\n+\trx_desc->wb.upper.length = 0;\n+\n \t/* enable receive descriptor ring */\n \trxdctl |= IXGBE_RXDCTL_ENABLE;\n \tIXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);\n@@ -4999,9 +5004,6 @@ static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)\n \tsize = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;\n \tmemset(rx_ring->rx_buffer_info, 0, size);\n \n-\t/* Zero out the descriptor ring */\n-\tmemset(rx_ring->desc, 0, rx_ring->size);\n-\n \trx_ring->next_to_alloc = 0;\n \trx_ring->next_to_clean = 0;\n \trx_ring->next_to_use = 0;\n", "prefixes": [ "next", "v2", "06/11" ] }