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GET /api/patches/712179/?format=api
{ "id": 712179, "url": "http://patchwork.ozlabs.org/api/patches/712179/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1483739589-15480-1-git-send-email-bimmy.pujari@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1483739589-15480-1-git-send-email-bimmy.pujari@intel.com>", "list_archive_url": null, "date": "2017-01-06T21:53:06", "name": "[next,S58-V2,1/4] i40e-shared: fix up recent proxy and wol bits for X722_SUPPORT", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "eb65cbe32b12d73e8bd3cfa1a25f2a8427dc1c7e", "submitter": { "id": 68919, "url": "http://patchwork.ozlabs.org/api/people/68919/?format=api", "name": "Pujari, Bimmy", "email": "bimmy.pujari@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1483739589-15480-1-git-send-email-bimmy.pujari@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/712179/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/712179/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3twJHj2GS7z9t17\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 7 Jan 2017 08:54:57 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id AA5898982A;\n\tFri, 6 Jan 2017 21:54:55 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id DEAayhL2y4cc; Fri, 6 Jan 2017 21:54:54 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 8A2BE8982B;\n\tFri, 6 Jan 2017 21:54:54 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id 065721C0586\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 6 Jan 2017 21:54:53 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id F37D38981C\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 6 Jan 2017 21:54:52 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 2bsuiP4fxP8O for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 6 Jan 2017 21:54:52 +0000 (UTC)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id 05F518981B\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 6 Jan 2017 21:54:52 +0000 (UTC)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby orsmga102.jf.intel.com with ESMTP; 06 Jan 2017 13:54:51 -0800", "from bimmy.jf.intel.com (HELO bimmy.linux1.jf.intel.com)\n\t([134.134.2.167])\n\tby fmsmga006.fm.intel.com with ESMTP; 06 Jan 2017 13:54:49 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.33,326,1477983600\"; d=\"scan'208\";a=\"50964618\"", "From": "Bimmy Pujari <bimmy.pujari@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 6 Jan 2017 13:53:06 -0800", "Message-Id": "<1483739589-15480-1-git-send-email-bimmy.pujari@intel.com>", "X-Mailer": "git-send-email 2.4.11", "Cc": "Shannon Nelson <shannon.nelson@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S58-V2 1/4] i40e-shared: fix up\n\trecent proxy and wol bits for X722_SUPPORT", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Shannon Nelson <shannon.nelson@intel.com>\n\nSome opcodes added & reordered to be in numerical order with the\nrest of the opcodes.\nThis patch adds admin queue structs to support Wake on LAN feature\nfor X722.\n\nSigned-off-by: Shannon Nelson <shannon.nelson@intel.com>\nSigned-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h | 65 +++++++++++++++++++++-\n .../net/ethernet/intel/i40evf/i40e_adminq_cmd.h | 65 +++++++++++++++++++++-\n 2 files changed, 128 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\nindex 451f48b..251074c 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h\n@@ -132,6 +132,10 @@ enum i40e_admin_queue_opc {\n \ti40e_aqc_opc_list_func_capabilities\t= 0x000A,\n \ti40e_aqc_opc_list_dev_capabilities\t= 0x000B,\n \n+\t/* Proxy commands */\n+\ti40e_aqc_opc_set_proxy_config\t\t= 0x0104,\n+\ti40e_aqc_opc_set_ns_proxy_table_entry\t= 0x0105,\n+\n \t/* LAA */\n \ti40e_aqc_opc_mac_address_read\t= 0x0107,\n \ti40e_aqc_opc_mac_address_write\t= 0x0108,\n@@ -139,6 +143,10 @@ enum i40e_admin_queue_opc {\n \t/* PXE */\n \ti40e_aqc_opc_clear_pxe_mode\t= 0x0110,\n \n+\t/* WoL commands */\n+\ti40e_aqc_opc_set_wol_filter\t= 0x0120,\n+\ti40e_aqc_opc_get_wake_reason\t= 0x0121,\n+\n \t/* internal switch commands */\n \ti40e_aqc_opc_get_switch_config\t\t= 0x0200,\n \ti40e_aqc_opc_add_statistics\t\t= 0x0201,\n@@ -177,6 +185,7 @@ enum i40e_admin_queue_opc {\n \ti40e_aqc_opc_remove_control_packet_filter\t= 0x025B,\n \ti40e_aqc_opc_add_cloud_filters\t\t= 0x025C,\n \ti40e_aqc_opc_remove_cloud_filters\t= 0x025D,\n+\ti40e_aqc_opc_clear_wol_switch_filters\t= 0x025E,\n \n \ti40e_aqc_opc_add_mirror_rule\t= 0x0260,\n \ti40e_aqc_opc_delete_mirror_rule\t= 0x0261,\n@@ -563,6 +572,56 @@ struct i40e_aqc_clear_pxe {\n \n I40E_CHECK_CMD_LENGTH(i40e_aqc_clear_pxe);\n \n+/* Set WoL Filter (0x0120) */\n+\n+struct i40e_aqc_set_wol_filter {\n+\t__le16 filter_index;\n+#define I40E_AQC_MAX_NUM_WOL_FILTERS\t8\n+#define I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_SHIFT\t15\n+#define I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_MASK\t(0x1 << \\\n+\t\tI40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_SHIFT)\n+\n+#define I40E_AQC_SET_WOL_FILTER_INDEX_SHIFT\t\t0\n+#define I40E_AQC_SET_WOL_FILTER_INDEX_MASK\t(0x7 << \\\n+\t\tI40E_AQC_SET_WOL_FILTER_INDEX_SHIFT)\n+\t__le16 cmd_flags;\n+#define I40E_AQC_SET_WOL_FILTER\t\t\t\t0x8000\n+#define I40E_AQC_SET_WOL_FILTER_NO_TCO_WOL\t\t0x4000\n+#define I40E_AQC_SET_WOL_FILTER_ACTION_CLEAR\t\t0\n+#define I40E_AQC_SET_WOL_FILTER_ACTION_SET\t\t1\n+\t__le16 valid_flags;\n+#define I40E_AQC_SET_WOL_FILTER_ACTION_VALID\t\t0x8000\n+#define I40E_AQC_SET_WOL_FILTER_NO_TCO_ACTION_VALID\t0x4000\n+\tu8 reserved[2];\n+\t__le32\taddress_high;\n+\t__le32\taddress_low;\n+};\n+\n+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_wol_filter);\n+\n+struct i40e_aqc_set_wol_filter_data {\n+\tu8 filter[128];\n+\tu8 mask[16];\n+};\n+\n+I40E_CHECK_STRUCT_LEN(0x90, i40e_aqc_set_wol_filter_data);\n+\n+/* Get Wake Reason (0x0121) */\n+\n+struct i40e_aqc_get_wake_reason_completion {\n+\tu8 reserved_1[2];\n+\t__le16 wake_reason;\n+#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_SHIFT\t0\n+#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_MASK (0xFF << \\\n+\t\tI40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_SHIFT)\n+#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_SHIFT\t8\n+#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_MASK\t(0xFF << \\\n+\t\tI40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_SHIFT)\n+\tu8 reserved_2[12];\n+};\n+\n+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_wake_reason_completion);\n+\n /* Switch configuration commands (0x02xx) */\n \n /* Used by many indirect commands that only pass an seid and a buffer in the\n@@ -645,6 +704,8 @@ struct i40e_aqc_set_port_parameters {\n #define I40E_AQ_SET_P_PARAMS_PAD_SHORT_PACKETS\t2 /* must set! */\n #define I40E_AQ_SET_P_PARAMS_DOUBLE_VLAN_ENA\t4\n \t__le16\tbad_frame_vsi;\n+#define I40E_AQ_SET_P_PARAMS_BFRAME_SEID_SHIFT\t0x0\n+#define I40E_AQ_SET_P_PARAMS_BFRAME_SEID_MASK\t0x3FF\n \t__le16\tdefault_seid; /* reserved for command */\n \tu8\treserved[10];\n };\n@@ -696,6 +757,7 @@ I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_resource_alloc_element_resp);\n /* Set Switch Configuration (direct 0x0205) */\n struct i40e_aqc_set_switch_config {\n \t__le16\tflags;\n+/* flags used for both fields below */\n #define I40E_AQ_SET_SWITCH_CFG_PROMISC\t\t0x0001\n #define I40E_AQ_SET_SWITCH_CFG_L2_FILTER\t0x0002\n \t__le16\tvalid_flags;\n@@ -1844,11 +1906,12 @@ struct i40e_aqc_get_link_status {\n #define I40E_AQ_CONFIG_FEC_RS_ENA\t0x02\n #define I40E_AQ_CONFIG_CRC_ENA\t\t0x04\n #define I40E_AQ_CONFIG_PACING_MASK\t0x78\n-\tu8\texternal_power_ability;\n+\tu8\tpower_desc;\n #define I40E_AQ_LINK_POWER_CLASS_1\t0x00\n #define I40E_AQ_LINK_POWER_CLASS_2\t0x01\n #define I40E_AQ_LINK_POWER_CLASS_3\t0x02\n #define I40E_AQ_LINK_POWER_CLASS_4\t0x03\n+#define I40E_AQ_PWR_CLASS_MASK\t\t0x03\n \tu8\treserved[4];\n };\n \ndiff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\nindex eeb9864..c28cb8f 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h\n@@ -132,6 +132,10 @@ enum i40e_admin_queue_opc {\n \ti40e_aqc_opc_list_func_capabilities\t= 0x000A,\n \ti40e_aqc_opc_list_dev_capabilities\t= 0x000B,\n \n+\t/* Proxy commands */\n+\ti40e_aqc_opc_set_proxy_config\t\t= 0x0104,\n+\ti40e_aqc_opc_set_ns_proxy_table_entry\t= 0x0105,\n+\n \t/* LAA */\n \ti40e_aqc_opc_mac_address_read\t= 0x0107,\n \ti40e_aqc_opc_mac_address_write\t= 0x0108,\n@@ -139,6 +143,10 @@ enum i40e_admin_queue_opc {\n \t/* PXE */\n \ti40e_aqc_opc_clear_pxe_mode\t= 0x0110,\n \n+\t/* WoL commands */\n+\ti40e_aqc_opc_set_wol_filter\t= 0x0120,\n+\ti40e_aqc_opc_get_wake_reason\t= 0x0121,\n+\n \t/* internal switch commands */\n \ti40e_aqc_opc_get_switch_config\t\t= 0x0200,\n \ti40e_aqc_opc_add_statistics\t\t= 0x0201,\n@@ -177,6 +185,7 @@ enum i40e_admin_queue_opc {\n \ti40e_aqc_opc_remove_control_packet_filter\t= 0x025B,\n \ti40e_aqc_opc_add_cloud_filters\t\t= 0x025C,\n \ti40e_aqc_opc_remove_cloud_filters\t= 0x025D,\n+\ti40e_aqc_opc_clear_wol_switch_filters\t= 0x025E,\n \n \ti40e_aqc_opc_add_mirror_rule\t= 0x0260,\n \ti40e_aqc_opc_delete_mirror_rule\t= 0x0261,\n@@ -558,6 +567,56 @@ struct i40e_aqc_clear_pxe {\n \n I40E_CHECK_CMD_LENGTH(i40e_aqc_clear_pxe);\n \n+/* Set WoL Filter (0x0120) */\n+\n+struct i40e_aqc_set_wol_filter {\n+\t__le16 filter_index;\n+#define I40E_AQC_MAX_NUM_WOL_FILTERS\t8\n+#define I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_SHIFT\t15\n+#define I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_MASK\t(0x1 << \\\n+\t\tI40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_SHIFT)\n+\n+#define I40E_AQC_SET_WOL_FILTER_INDEX_SHIFT\t\t0\n+#define I40E_AQC_SET_WOL_FILTER_INDEX_MASK\t(0x7 << \\\n+\t\tI40E_AQC_SET_WOL_FILTER_INDEX_SHIFT)\n+\t__le16 cmd_flags;\n+#define I40E_AQC_SET_WOL_FILTER\t\t\t\t0x8000\n+#define I40E_AQC_SET_WOL_FILTER_NO_TCO_WOL\t\t0x4000\n+#define I40E_AQC_SET_WOL_FILTER_ACTION_CLEAR\t\t0\n+#define I40E_AQC_SET_WOL_FILTER_ACTION_SET\t\t1\n+\t__le16 valid_flags;\n+#define I40E_AQC_SET_WOL_FILTER_ACTION_VALID\t\t0x8000\n+#define I40E_AQC_SET_WOL_FILTER_NO_TCO_ACTION_VALID\t0x4000\n+\tu8 reserved[2];\n+\t__le32\taddress_high;\n+\t__le32\taddress_low;\n+};\n+\n+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_wol_filter);\n+\n+struct i40e_aqc_set_wol_filter_data {\n+\tu8 filter[128];\n+\tu8 mask[16];\n+};\n+\n+I40E_CHECK_STRUCT_LEN(0x90, i40e_aqc_set_wol_filter_data);\n+\n+/* Get Wake Reason (0x0121) */\n+\n+struct i40e_aqc_get_wake_reason_completion {\n+\tu8 reserved_1[2];\n+\t__le16 wake_reason;\n+#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_SHIFT\t0\n+#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_MASK (0xFF << \\\n+\t\tI40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_SHIFT)\n+#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_SHIFT\t8\n+#define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_MASK\t(0xFF << \\\n+\t\tI40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_SHIFT)\n+\tu8 reserved_2[12];\n+};\n+\n+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_wake_reason_completion);\n+\n /* Switch configuration commands (0x02xx) */\n \n /* Used by many indirect commands that only pass an seid and a buffer in the\n@@ -640,6 +699,8 @@ struct i40e_aqc_set_port_parameters {\n #define I40E_AQ_SET_P_PARAMS_PAD_SHORT_PACKETS\t2 /* must set! */\n #define I40E_AQ_SET_P_PARAMS_DOUBLE_VLAN_ENA\t4\n \t__le16\tbad_frame_vsi;\n+#define I40E_AQ_SET_P_PARAMS_BFRAME_SEID_SHIFT\t0x0\n+#define I40E_AQ_SET_P_PARAMS_BFRAME_SEID_MASK\t0x3FF\n \t__le16\tdefault_seid; /* reserved for command */\n \tu8\treserved[10];\n };\n@@ -691,6 +752,7 @@ I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_resource_alloc_element_resp);\n /* Set Switch Configuration (direct 0x0205) */\n struct i40e_aqc_set_switch_config {\n \t__le16\tflags;\n+/* flags used for both fields below */\n #define I40E_AQ_SET_SWITCH_CFG_PROMISC\t\t0x0001\n #define I40E_AQ_SET_SWITCH_CFG_L2_FILTER\t0x0002\n \t__le16\tvalid_flags;\n@@ -1839,11 +1901,12 @@ struct i40e_aqc_get_link_status {\n #define I40E_AQ_CONFIG_FEC_RS_ENA\t0x02\n #define I40E_AQ_CONFIG_CRC_ENA\t\t0x04\n #define I40E_AQ_CONFIG_PACING_MASK\t0x78\n-\tu8\texternal_power_ability;\n+\tu8\tpower_desc;\n #define I40E_AQ_LINK_POWER_CLASS_1\t0x00\n #define I40E_AQ_LINK_POWER_CLASS_2\t0x01\n #define I40E_AQ_LINK_POWER_CLASS_3\t0x02\n #define I40E_AQ_LINK_POWER_CLASS_4\t0x03\n+#define I40E_AQ_PWR_CLASS_MASK\t\t0x03\n \tu8\treserved[4];\n };\n \n", "prefixes": [ "next", "S58-V2", "1/4" ] }