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GET /api/patches/705564/?format=api
{ "id": 705564, "url": "http://patchwork.ozlabs.org/api/patches/705564/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/148167460358.100113.4250492914764774244.stgit@mdrustad-wks.jf.intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<148167460358.100113.4250492914764774244.stgit@mdrustad-wks.jf.intel.com>", "list_archive_url": null, "date": "2016-12-14T00:16:43", "name": "[V7,3/4] ixgbe: Implement firmware interface to access some PHYs", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "4ab0b0222ead022beb04ccd220f5b2c50d973be4", "submitter": { "id": 13252, "url": "http://patchwork.ozlabs.org/api/people/13252/?format=api", "name": "Rustad, Mark D", "email": "mark.d.rustad@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/148167460358.100113.4250492914764774244.stgit@mdrustad-wks.jf.intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/705564/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/705564/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3tdcZV6rXWz9t0v\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 14 Dec 2016 11:16:50 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 715CF89699;\n\tWed, 14 Dec 2016 00:16:49 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id GLwYeWNLeQkt; Wed, 14 Dec 2016 00:16:48 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id A2C6C89EB6;\n\tWed, 14 Dec 2016 00:16:48 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id A86AB1C13C6\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 14 Dec 2016 00:16:47 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id A0DEE89E95\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 14 Dec 2016 00:16:47 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Cvp_BJgoWAJ8 for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 14 Dec 2016 00:16:44 +0000 (UTC)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id 35D6D89EA3\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 14 Dec 2016 00:16:44 +0000 (UTC)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga104.fm.intel.com with ESMTP; 13 Dec 2016 16:16:43 -0800", "from mdrustad-wks.jf.intel.com ([134.134.3.111])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Dec 2016 16:16:43 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos; i=\"5.33,343,1477983600\"; d=\"scan'208\";\n\ta=\"1081481920\"", "From": "Mark D Rustad <mark.d.rustad@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 13 Dec 2016 16:16:43 -0800", "Message-ID": "<148167460358.100113.4250492914764774244.stgit@mdrustad-wks.jf.intel.com>", "In-Reply-To": "<148167450737.100113.5506383673737911262.stgit@mdrustad-wks.jf.intel.com>", "References": "<148167450737.100113.5506383673737911262.stgit@mdrustad-wks.jf.intel.com>", "User-Agent": "StGit/unknown-version", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH V7 3/4] ixgbe: Implement firmware\n\tinterface to access some PHYs", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "Implement new interface for firmware commands to access some PHYs.\n\nSigned-off-by: Mark Rustad <mark.d.rustad@intel.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_common.h | 2 +\n drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 66 +++++++++++++++++++++++\n drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 45 ++++++++++++++++\n 3 files changed, 113 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h\nindex 671a0cdf6935..e083732adf64 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h\n@@ -116,6 +116,8 @@ u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);\n s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length,\n \t\t\t\t u32 timeout, bool return_data);\n s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 len, u32 timeout);\n+s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,\n+\t\t\t u32 (*data)[FW_PHY_ACT_DATA_COUNT]);\n void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);\n bool ixgbe_mng_present(struct ixgbe_hw *hw);\n bool ixgbe_mng_enabled(struct ixgbe_hw *hw);\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\nindex 2b590fcb82b5..acdbd81df3a4 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h\n@@ -2645,6 +2645,59 @@ enum ixgbe_fdir_pballoc_type {\n #define FW_INT_PHY_REQ_LEN\t\t10\n #define FW_INT_PHY_REQ_READ\t\t0\n #define FW_INT_PHY_REQ_WRITE\t\t1\n+#define FW_PHY_ACT_REQ_CMD\t\t5\n+#define FW_PHY_ACT_DATA_COUNT\t\t4\n+#define FW_PHY_ACT_REQ_LEN\t\t(4 + 4 * FW_PHY_ACT_DATA_COUNT)\n+#define FW_PHY_ACT_INIT_PHY\t\t1\n+#define FW_PHY_ACT_SETUP_LINK\t\t2\n+#define FW_PHY_ACT_LINK_SPEED_10\tBIT(0)\n+#define FW_PHY_ACT_LINK_SPEED_100\tBIT(1)\n+#define FW_PHY_ACT_LINK_SPEED_1G\tBIT(2)\n+#define FW_PHY_ACT_LINK_SPEED_2_5G\tBIT(3)\n+#define FW_PHY_ACT_LINK_SPEED_5G\tBIT(4)\n+#define FW_PHY_ACT_LINK_SPEED_10G\tBIT(5)\n+#define FW_PHY_ACT_LINK_SPEED_20G\tBIT(6)\n+#define FW_PHY_ACT_LINK_SPEED_25G\tBIT(7)\n+#define FW_PHY_ACT_LINK_SPEED_40G\tBIT(8)\n+#define FW_PHY_ACT_LINK_SPEED_50G\tBIT(9)\n+#define FW_PHY_ACT_LINK_SPEED_100G\tBIT(10)\n+#define FW_PHY_ACT_SETUP_LINK_PAUSE_SHIFT 16\n+#define FW_PHY_ACT_SETUP_LINK_PAUSE_MASK (3 << \\\n+\t\t\t\t\t HW_PHY_ACT_SETUP_LINK_PAUSE_SHIFT)\n+#define FW_PHY_ACT_SETUP_LINK_PAUSE_NONE 0u\n+#define FW_PHY_ACT_SETUP_LINK_PAUSE_TX\t1u\n+#define FW_PHY_ACT_SETUP_LINK_PAUSE_RX\t2u\n+#define FW_PHY_ACT_SETUP_LINK_PAUSE_RXTX 3u\n+#define FW_PHY_ACT_SETUP_LINK_LP\tBIT(18)\n+#define FW_PHY_ACT_SETUP_LINK_HP\tBIT(19)\n+#define FW_PHY_ACT_SETUP_LINK_EEE\tBIT(20)\n+#define FW_PHY_ACT_SETUP_LINK_AN\tBIT(22)\n+#define FW_PHY_ACT_SETUP_LINK_RSP_DOWN\tBIT(0)\n+#define FW_PHY_ACT_GET_LINK_INFO\t3\n+#define FW_PHY_ACT_GET_LINK_INFO_EEE\tBIT(19)\n+#define FW_PHY_ACT_GET_LINK_INFO_FC_TX\tBIT(20)\n+#define FW_PHY_ACT_GET_LINK_INFO_FC_RX\tBIT(21)\n+#define FW_PHY_ACT_GET_LINK_INFO_POWER\tBIT(22)\n+#define FW_PHY_ACT_GET_LINK_INFO_AN_COMPLETE\tBIT(24)\n+#define FW_PHY_ACT_GET_LINK_INFO_TEMP\tBIT(25)\n+#define FW_PHY_ACT_GET_LINK_INFO_LP_FC_TX\tBIT(28)\n+#define FW_PHY_ACT_GET_LINK_INFO_LP_FC_RX\tBIT(29)\n+#define FW_PHY_ACT_FORCE_LINK_DOWN\t4\n+#define FW_PHY_ACT_FORCE_LINK_DOWN_OFF\tBIT(0)\n+#define FW_PHY_ACT_PHY_SW_RESET\t\t5\n+#define FW_PHY_ACT_PHY_HW_RESET\t\t6\n+#define FW_PHY_ACT_GET_PHY_INFO\t\t7\n+#define FW_PHY_ACT_UD_2\t\t\t0x1002\n+#define FW_PHY_ACT_UD_2_10G_KR_EEE\tBIT(6)\n+#define FW_PHY_ACT_UD_2_10G_KX4_EEE\tBIT(5)\n+#define FW_PHY_ACT_UD_2_1G_KX_EEE\tBIT(4)\n+#define FW_PHY_ACT_UD_2_10G_T_EEE\tBIT(3)\n+#define FW_PHY_ACT_UD_2_1G_T_EEE\tBIT(2)\n+#define FW_PHY_ACT_UD_2_100M_TX_EEE\tBIT(1)\n+#define FW_PHY_ACT_RETRIES\t\t50\n+#define FW_PHY_INFO_SPEED_MASK\t\t0xFFFu\n+#define FW_PHY_INFO_ID_HI_MASK\t\t0xFFFF0000u\n+#define FW_PHY_INFO_ID_LO_MASK\t\t0x0000FFFFu\n \n /* Host Interface Command Structures */\n struct ixgbe_hic_hdr {\n@@ -2745,6 +2798,19 @@ struct ixgbe_hic_internal_phy_resp {\n \t__be32 read_data;\n };\n \n+struct ixgbe_hic_phy_activity_req {\n+\tstruct ixgbe_hic_hdr hdr;\n+\tu8 port_number;\n+\tu8 pad;\n+\t__le16 activity_id;\n+\t__be32 data[FW_PHY_ACT_DATA_COUNT];\n+};\n+\n+struct ixgbe_hic_phy_activity_resp {\n+\tstruct ixgbe_hic_hdr hdr;\n+\t__be32 data[FW_PHY_ACT_DATA_COUNT];\n+};\n+\n /* Transmit Descriptor - Advanced */\n union ixgbe_adv_tx_desc {\n \tstruct {\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\nindex e58bd77d9197..9284b8f0178d 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c\n@@ -402,6 +402,51 @@ ixgbe_write_i2c_combined_generic_unlocked(struct ixgbe_hw *hw,\n \treturn ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false);\n }\n \n+/**\n+ * ixgbe_fw_phy_activity - Perform an activity on a PHY\n+ * @hw: pointer to hardware structure\n+ * @activity: activity to perform\n+ * @data: Pointer to 4 32-bit words of data\n+ */\n+s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,\n+\t\t\t u32 (*data)[FW_PHY_ACT_DATA_COUNT])\n+{\n+\tunion {\n+\t\tstruct ixgbe_hic_phy_activity_req cmd;\n+\t\tstruct ixgbe_hic_phy_activity_resp rsp;\n+\t} hic;\n+\tu16 retries = FW_PHY_ACT_RETRIES;\n+\ts32 rc;\n+\tu32 i;\n+\n+\tdo {\n+\t\tmemset(&hic, 0, sizeof(hic));\n+\t\thic.cmd.hdr.cmd = FW_PHY_ACT_REQ_CMD;\n+\t\thic.cmd.hdr.buf_len = FW_PHY_ACT_REQ_LEN;\n+\t\thic.cmd.hdr.checksum = FW_DEFAULT_CHECKSUM;\n+\t\thic.cmd.port_number = hw->bus.lan_id;\n+\t\thic.cmd.activity_id = cpu_to_le16(activity);\n+\t\tfor (i = 0; i < ARRAY_SIZE(hic.cmd.data); ++i)\n+\t\t\thic.cmd.data[i] = cpu_to_be32((*data)[i]);\n+\n+\t\trc = ixgbe_host_interface_command(hw, &hic.cmd, sizeof(hic.cmd),\n+\t\t\t\t\t\t IXGBE_HI_COMMAND_TIMEOUT,\n+\t\t\t\t\t\t true);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t\tif (hic.rsp.hdr.cmd_or_resp.ret_status ==\n+\t\t FW_CEM_RESP_STATUS_SUCCESS) {\n+\t\t\tfor (i = 0; i < FW_PHY_ACT_DATA_COUNT; ++i)\n+\t\t\t\t(*data)[i] = be32_to_cpu(hic.rsp.data[i]);\n+\t\t\treturn 0;\n+\t\t}\n+\t\tusleep_range(20, 30);\n+\t\t--retries;\n+\t} while (retries > 0);\n+\n+\treturn IXGBE_ERR_HOST_INTERFACE_COMMAND;\n+}\n+\n /** ixgbe_init_eeprom_params_X550 - Initialize EEPROM params\n * @hw: pointer to hardware structure\n *\n", "prefixes": [ "V7", "3/4" ] }