Patch Detail
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GET /api/patches/695629/?format=api
{ "id": 695629, "url": "http://patchwork.ozlabs.org/api/patches/695629/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1479307230-16650-9-git-send-email-claudiu.manoil@nxp.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1479307230-16650-9-git-send-email-claudiu.manoil@nxp.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1479307230-16650-9-git-send-email-claudiu.manoil@nxp.com/", "date": "2016-11-16T14:40:21", "name": "[08/17] soc/qman: Don't add a new platform device for dma mapping", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "8f55aecbb68e6999d0ff2b05cd4c4373da442dfc", "submitter": { "id": 68115, "url": "http://patchwork.ozlabs.org/api/people/68115/?format=api", "name": "Claudiu Manoil", "email": "claudiu.manoil@nxp.com" }, "delegate": { "id": 1707, "url": "http://patchwork.ozlabs.org/api/users/1707/?format=api", "username": "scottwood", "first_name": "Scott", "last_name": "Wood", "email": "scottwood@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1479307230-16650-9-git-send-email-claudiu.manoil@nxp.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/695629/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/695629/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3tJnJw06Rmz9t0w\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 17 Nov 2016 01:51:44 +1100 (AEDT)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3tJnJv67KMzDw8Q\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 17 Nov 2016 01:51:43 +1100 (AEDT)", "from NAM03-CO1-obe.outbound.protection.outlook.com\n\t(mail-co1nam03on0067.outbound.protection.outlook.com [104.47.40.67])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3tJn4M3NJgzDvVl\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 17 Nov 2016 01:40:51 +1100 (AEDT)", "from DM5PR03CA0007.namprd03.prod.outlook.com (10.175.104.17) by\n\tCY4PR03MB2472.namprd03.prod.outlook.com (10.168.165.8) with Microsoft\n\tSMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id\n\t15.1.707.6; Wed, 16 Nov 2016 14:40:46 +0000", "from BL2FFO11OLC015.protection.gbl (2a01:111:f400:7c09::109) by\n\tDM5PR03CA0007.outlook.office365.com (2603:10b6:3:118::17) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id\n\t15.1.721.10 via Frontend Transport; Wed, 16 Nov 2016 14:40:46 +0000", "from az84smr01.freescale.net (192.88.158.2) by\n\tBL2FFO11OLC015.mail.protection.outlook.com (10.173.160.81) with\n\tMicrosoft\n\tSMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id\n\t15.1.721.5 via Frontend Transport; Wed, 16 Nov 2016 14:40:46 +0000", "from fsr-fed1764-016.ea.freescale.net\n\t(fsr-fed1764-016.ea.freescale.net [10.171.81.161])\n\tby az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tuAGEeVKb005542; Wed, 16 Nov 2016 07:40:44 -0700" ], "Authentication-Results": "spf=fail (sender IP is 192.88.158.2)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none; nxp.com; dmarc=fail action=none header.from=nxp.com;\n\tnxp.com; \n\tdkim=none (message not signed) header.d=none;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.158.2 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.158.2; helo=az84smr01.freescale.net;", "X-IncomingTopHeaderMarker": "OriginalChecksum:; UpperCasedChecksum:;\n\tSizeAsReceived:721; Count:10", "From": "Claudiu Manoil <claudiu.manoil@nxp.com>", "To": "<linuxppc-dev@lists.ozlabs.org>", "Subject": "[PATCH 08/17] soc/qman: Don't add a new platform device for dma\n\tmapping", "Date": "Wed, 16 Nov 2016 16:40:21 +0200", "Message-ID": "<1479307230-16650-9-git-send-email-claudiu.manoil@nxp.com>", "X-Mailer": "git-send-email 1.7.11.7", "In-Reply-To": "<1479307230-16650-1-git-send-email-claudiu.manoil@nxp.com>", "References": "<1479307230-16650-1-git-send-email-claudiu.manoil@nxp.com>", "X-IncomingHeaderCount": "10", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131237808466655381;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); 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BCL:0; PCL:0; RULEID:(22001);\n\tSRVR:CY4PR03MB2472; ", "X-Microsoft-Antispam-PRVS": "<CY4PR03MB24720686226C2194692DDBC096BE0@CY4PR03MB2472.namprd03.prod.outlook.com>", "X-Exchange-Antispam-Report-Test": "UriScan:(185117386973197)(227817650892897)(275809806118684); ", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(6095035)(601004)(2401047)(13015025)(13023025)(5005006)(8121501046)(13017025)(13018025)(13024025)(10201501046)(3002001)(6055026)(6096035);\n\tSRVR:CY4PR03MB2472; BCL:0; PCL:0; RULEID:(400006); SRVR:CY4PR03MB2472;", "X-Forefront-PRVS": "01283822F8", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "16 Nov 2016 14:40:46.2911\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.158.2]; \n\tHelo=[az84smr01.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY4PR03MB2472", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "Scott Wood <oss@buserror.net>, roy.pledge@nxp.com", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "The qman portals are platform devices themselves, so they should\nhandle dma mappings. Creating a dummy platform device in order to\nsupport dma mapping operations is not justified (and not portable).\nInstead, do the mapping against the first portal that has been\ninitialised.\n\nSigned-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>\n---\n drivers/soc/fsl/qbman/qman.c | 31 ++++++++++---------------------\n drivers/soc/fsl/qbman/qman_portal.c | 11 +++++++++++\n drivers/soc/fsl/qbman/qman_priv.h | 1 +\n 3 files changed, 22 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c\nindex b4ef4a3..a0020d2 100644\n--- a/drivers/soc/fsl/qbman/qman.c\n+++ b/drivers/soc/fsl/qbman/qman.c\n@@ -962,8 +962,6 @@ struct qman_portal {\n \tu32 sdqcr;\n \t/* probing time config params for cpu-affine portals */\n \tconst struct qm_portal_config *config;\n-\t/* needed for providing a non-NULL device to dma_map_***() */\n-\tstruct platform_device *pdev;\n \t/* 2-element array. cgrs[0] is mask, cgrs[1] is snapshot. */\n \tstruct qman_cgrs *cgrs;\n \t/* linked-list of CSCN handlers. */\n@@ -1133,7 +1131,6 @@ static int qman_create_portal(struct qman_portal *portal,\n \t\t\t const struct qman_cgrs *cgrs)\n {\n \tstruct qm_portal *p;\n-\tchar buf[16];\n \tint ret;\n \tu32 isdr;\n \n@@ -1196,15 +1193,6 @@ static int qman_create_portal(struct qman_portal *portal,\n \tportal->sdqcr = QM_SDQCR_SOURCE_CHANNELS | QM_SDQCR_COUNT_UPTO3 |\n \t\t\tQM_SDQCR_DEDICATED_PRECEDENCE | QM_SDQCR_TYPE_PRIO_QOS |\n \t\t\tQM_SDQCR_TOKEN_SET(0xab) | QM_SDQCR_CHANNELS_DEDICATED;\n-\tsprintf(buf, \"qportal-%d\", c->channel);\n-\tportal->pdev = platform_device_alloc(buf, -1);\n-\tif (!portal->pdev)\n-\t\tgoto fail_devalloc;\n-\tif (dma_set_mask(&portal->pdev->dev, DMA_BIT_MASK(40)))\n-\t\tgoto fail_devadd;\n-\tret = platform_device_add(portal->pdev);\n-\tif (ret)\n-\t\tgoto fail_devadd;\n \tisdr = 0xffffffff;\n \tqm_out(p, QM_REG_ISDR, isdr);\n \tportal->irq_sources = 0;\n@@ -1256,10 +1244,6 @@ static int qman_create_portal(struct qman_portal *portal,\n fail_affinity:\n \tfree_irq(c->irq, portal);\n fail_irq:\n-\tplatform_device_del(portal->pdev);\n-fail_devadd:\n-\tplatform_device_put(portal->pdev);\n-fail_devalloc:\n \tkfree(portal->cgrs);\n fail_cgrs:\n \tqm_mc_finish(p);\n@@ -1321,9 +1305,6 @@ static void qman_destroy_portal(struct qman_portal *qm)\n \tqm_dqrr_finish(&qm->p);\n \tqm_eqcr_finish(&qm->p);\n \n-\tplatform_device_del(qm->pdev);\n-\tplatform_device_put(qm->pdev);\n-\n \tqm->config = NULL;\n }\n \n@@ -1817,8 +1798,16 @@ int qman_init_fq(struct qman_fq *fq, u32 flags, struct qm_mcc_initfq *opts)\n \t\t\tmemset(&mcc->initfq.fqd.context_a, 0,\n \t\t\t\tsizeof(mcc->initfq.fqd.context_a));\n \t\t} else {\n-\t\t\tphys_fq = dma_map_single(&p->pdev->dev, fq, sizeof(*fq),\n-\t\t\t\t\t\t DMA_TO_DEVICE);\n+\t\t\tstruct qman_portal *p = qman_dma_portal;\n+\n+\t\t\tphys_fq = dma_map_single(p->config->dev, fq,\n+\t\t\t\t\t\t sizeof(*fq), DMA_TO_DEVICE);\n+\t\t\tif (dma_mapping_error(p->config->dev, phys_fq)) {\n+\t\t\t\tdev_err(p->config->dev, \"dma_mapping failed\\n\");\n+\t\t\t\tret = -EIO;\n+\t\t\t\tgoto out;\n+\t\t\t}\n+\n \t\t\tqm_fqd_stashing_set64(&mcc->initfq.fqd, phys_fq);\n \t\t}\n \t}\ndiff --git a/drivers/soc/fsl/qbman/qman_portal.c b/drivers/soc/fsl/qbman/qman_portal.c\nindex 6651168..e6da2ea 100644\n--- a/drivers/soc/fsl/qbman/qman_portal.c\n+++ b/drivers/soc/fsl/qbman/qman_portal.c\n@@ -30,6 +30,8 @@\n \n #include \"qman_priv.h\"\n \n+struct qman_portal *qman_dma_portal;\n+\n /* Enable portal interupts (as opposed to polling mode) */\n #define CONFIG_FSL_DPA_PIRQ_SLOW 1\n #define CONFIG_FSL_DPA_PIRQ_FAST 1\n@@ -150,6 +152,10 @@ static struct qman_portal *init_pcfg(struct qm_portal_config *pcfg)\n \t\t/* all assigned portals are initialized now */\n \t\tqman_init_cgr_all();\n \t}\n+\n+\tif (!qman_dma_portal)\n+\t\tqman_dma_portal = p;\n+\n \tspin_unlock(&qman_lock);\n \n \tdev_info(pcfg->dev, \"Portal initialised, cpu %d\\n\", pcfg->cpu);\n@@ -310,6 +316,11 @@ static int qman_portal_probe(struct platform_device *pdev)\n \tspin_unlock(&qman_lock);\n \tpcfg->cpu = cpu;\n \n+\tif (dma_set_mask(dev, DMA_BIT_MASK(40))) {\n+\t\tdev_err(dev, \"dma_set_mask() failed\\n\");\n+\t\tgoto err_portal_init;\n+\t}\n+\n \tif (!init_pcfg(pcfg)) {\n \t\tdev_err(dev, \"portal init failed\\n\");\n \t\tgoto err_portal_init;\ndiff --git a/drivers/soc/fsl/qbman/qman_priv.h b/drivers/soc/fsl/qbman/qman_priv.h\nindex 5cf821e..59b4b46 100644\n--- a/drivers/soc/fsl/qbman/qman_priv.h\n+++ b/drivers/soc/fsl/qbman/qman_priv.h\n@@ -367,5 +367,6 @@ struct qman_portal *qman_create_affine_portal(\n #define QM_PIRQ_VISIBLE\t(QM_PIRQ_SLOW | QM_PIRQ_DQRI)\n \n extern struct qman_portal *affine_portals[NR_CPUS];\n+extern struct qman_portal *qman_dma_portal;\n const struct qm_portal_config *qman_get_qm_portal_config(\n \t\t\t\t\t\tstruct qman_portal *portal);\n", "prefixes": [ "08/17" ] }