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GET /api/patches/690681/?format=api
{ "id": 690681, "url": "http://patchwork.ozlabs.org/api/patches/690681/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20161103052032.GD8368@fergus.ozlabs.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20161103052032.GD8368@fergus.ozlabs.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20161103052032.GD8368@fergus.ozlabs.ibm.com/", "date": "2016-11-03T05:20:32", "name": "[2/4] selftests/powerpc/64: Test all paths through copy routines", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cfa80b8507b8b685cb135fc2c28710c2b61da40a", "submitter": { "id": 67079, "url": "http://patchwork.ozlabs.org/api/people/67079/?format=api", "name": "Paul Mackerras", "email": "paulus@ozlabs.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20161103052032.GD8368@fergus.ozlabs.ibm.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/690681/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/690681/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org", "linuxppc-dev@ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3t8YL85G93z9t10\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 3 Nov 2016 16:24:16 +1100 (AEDT)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3t8YL849yrzDvYn\n\tfor <patchwork-incoming@ozlabs.org>;\n\tThu, 3 Nov 2016 16:24:16 +1100 (AEDT)", "from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3t8YK158L8zDvQQ\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 3 Nov 2016 16:23:17 +1100 (AEDT)", "by ozlabs.org (Postfix)\n\tid 3t8YK14JfYz9t2g; Thu, 3 Nov 2016 16:23:17 +1100 (AEDT)", "by ozlabs.org (Postfix, from userid 1003)\n\tid 3t8YK13Whjz9t2D; Thu, 3 Nov 2016 16:23:17 +1100 (AEDT)" ], "Date": "Thu, 3 Nov 2016 16:20:32 +1100", "From": "Paul Mackerras <paulus@ozlabs.org>", "To": "linuxppc-dev@ozlabs.org", "Subject": "[PATCH 2/4] selftests/powerpc/64: Test all paths through copy\n\troutines", "Message-ID": "<20161103052032.GD8368@fergus.ozlabs.ibm.com>", "References": "<20161103051949.GC8368@fergus.ozlabs.ibm.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=us-ascii", "Content-Disposition": "inline", "In-Reply-To": "<20161103051949.GC8368@fergus.ozlabs.ibm.com>", "User-Agent": "Mutt/1.5.24 (2015-08-30)", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "The hand-coded assembler 64-bit copy routines include feature sections\nthat select one code path or another depending on which CPU we are\nexecuting on. The self-tests for these copy routines end up testing\njust one path. This adds a mechanism for selecting any desired code\npath at compile time, and makes 2 or 3 versions of each test, each\nusing a different code path, so as to cover all the possible paths.\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>\n---\n arch/powerpc/lib/copyuser_64.S | 7 +++++\n arch/powerpc/lib/copyuser_power7.S | 21 ++++++++-------\n arch/powerpc/lib/memcpy_64.S | 9 +++++--\n arch/powerpc/lib/memcpy_power7.S | 22 ++++++++--------\n tools/testing/selftests/powerpc/copyloops/Makefile | 30 +++++++++++++++++-----\n .../selftests/powerpc/copyloops/asm/ppc_asm.h | 21 ++++++++-------\n 6 files changed, 68 insertions(+), 42 deletions(-)", "diff": "diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S\nindex 1c5247c..668d816 100644\n--- a/arch/powerpc/lib/copyuser_64.S\n+++ b/arch/powerpc/lib/copyuser_64.S\n@@ -10,6 +10,11 @@\n #include <asm/ppc_asm.h>\n #include <asm/export.h>\n \n+#ifndef SELFTEST_CASE\n+/* 0 == most CPUs, 1 == POWER6, 2 == Cell */\n+#define SELFTEST_CASE\t0\n+#endif\n+\n #ifdef __BIG_ENDIAN__\n #define sLd sld\t\t/* Shift towards low-numbered address. */\n #define sHd srd\t\t/* Shift towards high-numbered address. */\n@@ -77,6 +82,7 @@ _GLOBAL(__copy_tofrom_user_base)\n * At the time of writing the only CPU that has this combination of bits\n * set is Power6.\n */\n+test_feature = (SELFTEST_CASE == 1)\n BEGIN_FTR_SECTION\n \tnop\n FTR_SECTION_ELSE\n@@ -86,6 +92,7 @@ ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \\\n .Ldst_aligned:\n \taddi\tr3,r3,-16\n r3_offset = 16\n+test_feature = (SELFTEST_CASE == 0)\n BEGIN_FTR_SECTION\n \tandi.\tr0,r4,7\n \tbne\t.Lsrc_unaligned\ndiff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S\nindex da0c568..b2f7211 100644\n--- a/arch/powerpc/lib/copyuser_power7.S\n+++ b/arch/powerpc/lib/copyuser_power7.S\n@@ -19,6 +19,11 @@\n */\n #include <asm/ppc_asm.h>\n \n+#ifndef SELFTEST_CASE\n+/* 0 == don't use VMX, 1 == use VMX */\n+#define SELFTEST_CASE\t0\n+#endif\n+\n #ifdef __BIG_ENDIAN__\n #define LVS(VRT,RA,RB)\t\tlvsl\tVRT,RA,RB\n #define VPERM(VRT,VRA,VRB,VRC)\tvperm\tVRT,VRA,VRB,VRC\n@@ -92,7 +97,6 @@\n \n \n _GLOBAL(__copy_tofrom_user_power7)\n-#ifdef CONFIG_ALTIVEC\n \tcmpldi\tr5,16\n \tcmpldi\tcr1,r5,4096\n \n@@ -101,16 +105,11 @@ _GLOBAL(__copy_tofrom_user_power7)\n \tstd\tr5,-STACKFRAMESIZE+STK_REG(R29)(r1)\n \n \tblt\t.Lshort_copy\n-\tbgt\tcr1,.Lvmx_copy\n-#else\n-\tcmpldi\tr5,16\n \n-\tstd\tr3,-STACKFRAMESIZE+STK_REG(R31)(r1)\n-\tstd\tr4,-STACKFRAMESIZE+STK_REG(R30)(r1)\n-\tstd\tr5,-STACKFRAMESIZE+STK_REG(R29)(r1)\n-\n-\tblt\t.Lshort_copy\n-#endif\n+test_feature = SELFTEST_CASE\n+BEGIN_FTR_SECTION\n+\tbgt\tcr1,.Lvmx_copy\n+END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC_COMP)\n \n .Lnonvmx_copy:\n \t/* Get the source 8B aligned */\n@@ -290,8 +289,8 @@ err1;\tstb\tr0,0(r3)\n \taddi\tr1,r1,STACKFRAMESIZE\n \tb\t.Lnonvmx_copy\n \n-#ifdef CONFIG_ALTIVEC\n .Lvmx_copy:\n+#ifdef CONFIG_ALTIVEC\n \tmflr\tr0\n \tstd\tr0,16(r1)\n \tstdu\tr1,-STACKFRAMESIZE(r1)\ndiff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S\nindex f4d6088..ea363ad 100644\n--- a/arch/powerpc/lib/memcpy_64.S\n+++ b/arch/powerpc/lib/memcpy_64.S\n@@ -10,6 +10,11 @@\n #include <asm/ppc_asm.h>\n #include <asm/export.h>\n \n+#ifndef SELFTEST_CASE\n+/* For big-endian, 0 == most CPUs, 1 == POWER6, 2 == Cell */\n+#define SELFTEST_CASE\t0\n+#endif\n+\n \t.align\t7\n _GLOBAL_TOC(memcpy)\n BEGIN_FTR_SECTION\n@@ -19,9 +24,7 @@ BEGIN_FTR_SECTION\n \tstd\tr3,-STACKFRAMESIZE+STK_REG(R31)(r1)\t/* save destination pointer for return value */\n #endif\n FTR_SECTION_ELSE\n-#ifndef SELFTEST\n \tb\tmemcpy_power7\n-#endif\n ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)\n #ifdef __LITTLE_ENDIAN__\n \t/* dumb little-endian memcpy that will get replaced at runtime */\n@@ -45,6 +48,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)\n cleared.\n At the time of writing the only CPU that has this combination of bits\n set is Power6. */\n+test_feature = (SELFTEST_CASE == 1)\n BEGIN_FTR_SECTION\n \tnop\n FTR_SECTION_ELSE\n@@ -53,6 +57,7 @@ ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \\\n CPU_FTR_UNALIGNED_LD_STD)\n .Ldst_aligned:\n \taddi\tr3,r3,-16\n+test_feature = (SELFTEST_CASE == 0)\n BEGIN_FTR_SECTION\n \tandi.\tr0,r4,7\n \tbne\t.Lsrc_unaligned\ndiff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S\nindex 786234f..c4f4e3b 100644\n--- a/arch/powerpc/lib/memcpy_power7.S\n+++ b/arch/powerpc/lib/memcpy_power7.S\n@@ -19,7 +19,10 @@\n */\n #include <asm/ppc_asm.h>\n \n-_GLOBAL(memcpy_power7)\n+#ifndef SELFTEST_CASE\n+/* 0 == don't use VMX, 1 == use VMX */\n+#define SELFTEST_CASE\t0\n+#endif\n \n #ifdef __BIG_ENDIAN__\n #define LVS(VRT,RA,RB)\t\tlvsl\tVRT,RA,RB\n@@ -29,21 +32,16 @@ _GLOBAL(memcpy_power7)\n #define VPERM(VRT,VRA,VRB,VRC)\tvperm\tVRT,VRB,VRA,VRC\n #endif\n \n-#ifdef CONFIG_ALTIVEC\n+_GLOBAL(memcpy_power7)\n \tcmpldi\tr5,16\n \tcmpldi\tcr1,r5,4096\n-\n \tstd\tr3,-STACKFRAMESIZE+STK_REG(R31)(r1)\n-\n \tblt\t.Lshort_copy\n-\tbgt\tcr1,.Lvmx_copy\n-#else\n-\tcmpldi\tr5,16\n \n-\tstd\tr3,-STACKFRAMESIZE+STK_REG(R31)(r1)\n-\n-\tblt\t.Lshort_copy\n-#endif\n+test_feature = SELFTEST_CASE\n+BEGIN_FTR_SECTION\n+\tbgt\tcr1, .Lvmx_copy\n+END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC_COMP)\n \n .Lnonvmx_copy:\n \t/* Get the source 8B aligned */\n@@ -223,8 +221,8 @@ _GLOBAL(memcpy_power7)\n \taddi\tr1,r1,STACKFRAMESIZE\n \tb\t.Lnonvmx_copy\n \n-#ifdef CONFIG_ALTIVEC\n .Lvmx_copy:\n+#ifdef CONFIG_ALTIVEC\n \tmflr\tr0\n \tstd\tr4,-STACKFRAMESIZE+STK_REG(R30)(r1)\n \tstd\tr5,-STACKFRAMESIZE+STK_REG(R29)(r1)\ndiff --git a/tools/testing/selftests/powerpc/copyloops/Makefile b/tools/testing/selftests/powerpc/copyloops/Makefile\nindex 384843e..1b351c3 100644\n--- a/tools/testing/selftests/powerpc/copyloops/Makefile\n+++ b/tools/testing/selftests/powerpc/copyloops/Makefile\n@@ -7,17 +7,35 @@ CFLAGS += -maltivec\n # Use our CFLAGS for the implicit .S rule\n ASFLAGS = $(CFLAGS)\n \n-TEST_PROGS := copyuser_64 copyuser_power7 memcpy_64 memcpy_power7\n+TEST_PROGS :=\tcopyuser_64_t0 copyuser_64_t1 copyuser_64_t2 \\\n+\t\tcopyuser_p7_t0 copyuser_p7_t1 \\\n+\t\tmemcpy_64_t0 memcpy_64_t1 memcpy_64_t2 \\\n+\t\tmemcpy_p7_t0 memcpy_p7_t1\n+\n EXTRA_SOURCES := validate.c ../harness.c\n \n all: $(TEST_PROGS)\n \n-copyuser_64: CPPFLAGS += -D COPY_LOOP=test___copy_tofrom_user_base\n-copyuser_power7: CPPFLAGS += -D COPY_LOOP=test___copy_tofrom_user_power7\n-memcpy_64: CPPFLAGS += -D COPY_LOOP=test_memcpy\n-memcpy_power7: CPPFLAGS += -D COPY_LOOP=test_memcpy_power7\n+copyuser_64_t%:\tcopyuser_64.S $(EXTRA_SOURCES)\n+\t$(CC) $(CPPFLAGS) $(CFLAGS) \\\n+\t\t-D COPY_LOOP=test___copy_tofrom_user_base \\\n+\t\t-D SELFTEST_CASE=$(subst copyuser_64_t,,$@) -o $@ $^\n+\n+copyuser_p7_t%:\tcopyuser_power7.S $(EXTRA_SOURCES)\n+\t$(CC) $(CPPFLAGS) $(CFLAGS) \\\n+\t\t-D COPY_LOOP=test___copy_tofrom_user_power7 \\\n+\t\t-D SELFTEST_CASE=$(subst copyuser_p7_t,,$@) -o $@ $^\n+\n+# Strictly speaking, we only need the memcpy_64 test cases for big-endian\n+memcpy_64_t%:\tmemcpy_64.S $(EXTRA_SOURCES)\n+\t$(CC) $(CPPFLAGS) $(CFLAGS) \\\n+\t\t-D COPY_LOOP=test_memcpy \\\n+\t\t-D SELFTEST_CASE=$(subst memcpy_64_t,,$@) -o $@ $^\n \n-$(TEST_PROGS): $(EXTRA_SOURCES)\n+memcpy_p7_t%:\tmemcpy_power7.S $(EXTRA_SOURCES)\n+\t$(CC) $(CPPFLAGS) $(CFLAGS) \\\n+\t\t-D COPY_LOOP=test_memcpy_power7 \\\n+\t\t-D SELFTEST_CASE=$(subst memcpy_p7_t,,$@) -o $@ $^\n \n include ../../lib.mk\n \ndiff --git a/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h b/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h\nindex 50ae7d2..7eb0cd6 100644\n--- a/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h\n+++ b/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h\n@@ -40,17 +40,16 @@ FUNC_START(enter_vmx_copy)\n FUNC_START(exit_vmx_copy)\n \tblr\n \n-FUNC_START(memcpy_power7)\n-\tblr\n-\n-FUNC_START(__copy_tofrom_user_power7)\n-\tblr\n-\n FUNC_START(__copy_tofrom_user_base)\n \tblr\n \n-#define BEGIN_FTR_SECTION\n-#define FTR_SECTION_ELSE\n-#define ALT_FTR_SECTION_END_IFCLR(x)\n-#define ALT_FTR_SECTION_END(x, y)\n-#define END_FTR_SECTION_IFCLR(x)\n+#define BEGIN_FTR_SECTION\t\t.if test_feature\n+#define FTR_SECTION_ELSE\t\t.else\n+#define ALT_FTR_SECTION_END_IFCLR(x)\t.endif\n+#define ALT_FTR_SECTION_END_IFSET(x)\t.endif\n+#define ALT_FTR_SECTION_END(x, y)\t.endif\n+#define END_FTR_SECTION_IFCLR(x)\t.endif\n+#define END_FTR_SECTION_IFSET(x)\t.endif\n+\n+/* Default to taking the first of any alternative feature sections */\n+test_feature = 1\n", "prefixes": [ "2/4" ] }