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GET /api/patches/678520/?format=api
{ "id": 678520, "url": "http://patchwork.ozlabs.org/api/patches/678520/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1475685046-16900-14-git-send-email-bimmy.pujari@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1475685046-16900-14-git-send-email-bimmy.pujari@intel.com>", "list_archive_url": null, "date": "2016-10-05T16:30:43", "name": "[next,S49-V2,13/15] i40e: use a mutex instead of spinlock in PTP user entry points", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "307baf643ea8aa796eac9a19a5d97ac5201f1721", "submitter": { "id": 68919, "url": "http://patchwork.ozlabs.org/api/people/68919/?format=api", "name": "Pujari, Bimmy", "email": "bimmy.pujari@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/1475685046-16900-14-git-send-email-bimmy.pujari@intel.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/678520/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/678520/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@lists.osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3sq1XR2Nrtz9sD5\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 6 Oct 2016 03:32:23 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id D0AEBC2366;\n\tWed, 5 Oct 2016 16:32:21 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 8L8metE2aLga; Wed, 5 Oct 2016 16:32:20 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 1D47BC239B;\n\tWed, 5 Oct 2016 16:32:16 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id A056C1CE508\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 5 Oct 2016 16:32:12 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 9BF06925C0\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 5 Oct 2016 16:32:12 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id GbuqIYMmsE54 for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 5 Oct 2016 16:32:11 +0000 (UTC)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id 08701925C8\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 5 Oct 2016 16:32:11 +0000 (UTC)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n\tby fmsmga105.fm.intel.com with ESMTP; 05 Oct 2016 09:32:10 -0700", "from bimmy.jf.intel.com (HELO bimmy.linux1.jf.intel.com)\n\t([134.134.2.167])\n\tby fmsmga005.fm.intel.com with ESMTP; 05 Oct 2016 09:32:10 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.31,449,1473145200\"; d=\"scan'208\";a=\"16526398\"", "From": "Bimmy Pujari <bimmy.pujari@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 5 Oct 2016 09:30:43 -0700", "Message-Id": "<1475685046-16900-14-git-send-email-bimmy.pujari@intel.com>", "X-Mailer": "git-send-email 2.4.11", "In-Reply-To": "<1475685046-16900-1-git-send-email-bimmy.pujari@intel.com>", "References": "<1475685046-16900-1-git-send-email-bimmy.pujari@intel.com>", "Subject": "[Intel-wired-lan] [next PATCH S49-V2 13/15] i40e: use a mutex\n\tinstead of spinlock in PTP user entry points", "X-BeenThere": "intel-wired-lan@lists.osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.lists.osuosl.org>", "List-Unsubscribe": "<http://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@lists.osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@lists.osuosl.org?subject=help>", "List-Subscribe": "<http://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@lists.osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@lists.osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@lists.osuosl.org>" }, "content": "From: Jacob Keller <jacob.e.keller@intel.com>\n\nWe need a locking mechanism to protect the hardware SYSTIME register\nwhich is split over 2 values, and has internal hardware latching. We\ncan't allow multiple accesses at the same time. However....\n\nThe spinlock_t is overkill here, especially use of spin_lock_irqsave,\nsince every PTP access will halt hardirqs. Notice that the only places\nwhich need the SYSTIME value are user context and are capable of sleeping.\nThus, it is safe to use a mutex here instead of the spinlock.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nChange-ID: I971761a89b58c6aad953590162e85a327fbba232\n---\n drivers/net/ethernet/intel/i40e/i40e.h | 2 +-\n drivers/net/ethernet/intel/i40e/i40e_ptp.c | 20 +++++++-------------\n 2 files changed, 8 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h\nindex 60dbb5b..21f2bb3 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e.h\n@@ -430,7 +430,7 @@ struct i40e_pf {\n \tstruct sk_buff *ptp_tx_skb;\n \tstruct hwtstamp_config tstamp_config;\n \tunsigned long last_rx_ptp_check;\n-\tspinlock_t tmreg_lock; /* Used to protect the device time registers. */\n+\tstruct mutex tmreg_lock; /* Used to protect the SYSTIME registers. */\n \tu64 ptp_base_adj;\n \tu32 tx_hwtstamp_timeouts;\n \tu32 rx_hwtstamp_cleared;\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c\nindex f1fecea..177b7fb 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c\n@@ -159,16 +159,15 @@ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)\n {\n \tstruct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);\n \tstruct timespec64 now, then;\n-\tunsigned long flags;\n \n \tthen = ns_to_timespec64(delta);\n-\tspin_lock_irqsave(&pf->tmreg_lock, flags);\n+\tmutex_lock(&pf->tmreg_lock);\n \n \ti40e_ptp_read(pf, &now);\n \tnow = timespec64_add(now, then);\n \ti40e_ptp_write(pf, (const struct timespec64 *)&now);\n \n-\tspin_unlock_irqrestore(&pf->tmreg_lock, flags);\n+\tmutex_unlock(&pf->tmreg_lock);\n \n \treturn 0;\n }\n@@ -184,11 +183,10 @@ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)\n static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)\n {\n \tstruct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);\n-\tunsigned long flags;\n \n-\tspin_lock_irqsave(&pf->tmreg_lock, flags);\n+\tmutex_lock(&pf->tmreg_lock);\n \ti40e_ptp_read(pf, ts);\n-\tspin_unlock_irqrestore(&pf->tmreg_lock, flags);\n+\tmutex_unlock(&pf->tmreg_lock);\n \n \treturn 0;\n }\n@@ -205,11 +203,10 @@ static int i40e_ptp_settime(struct ptp_clock_info *ptp,\n \t\t\t const struct timespec64 *ts)\n {\n \tstruct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);\n-\tunsigned long flags;\n \n-\tspin_lock_irqsave(&pf->tmreg_lock, flags);\n+\tmutex_lock(&pf->tmreg_lock);\n \ti40e_ptp_write(pf, ts);\n-\tspin_unlock_irqrestore(&pf->tmreg_lock, flags);\n+\tmutex_unlock(&pf->tmreg_lock);\n \n \treturn 0;\n }\n@@ -658,10 +655,7 @@ void i40e_ptp_init(struct i40e_pf *pf)\n \t\treturn;\n \t}\n \n-\t/* we have to initialize the lock first, since we can't control\n-\t * when the user will enter the PHC device entry points\n-\t */\n-\tspin_lock_init(&pf->tmreg_lock);\n+\tmutex_init(&pf->tmreg_lock);\n \n \t/* ensure we have a clock device */\n \terr = i40e_ptp_create_clock(pf);\n", "prefixes": [ "next", "S49-V2", "13/15" ] }